pic18fxx20.h

PIC单片机PICC环境下PIC18FXX20系列通用头文件

/* pic18fxx20.h
   Header file for the Microchip controllers,

	PIC18F6520
	PIC18F6620
	PIC18F6720
	PIC18F8520
	PIC18F8620
	PIC18F8720

 *** note that due to duality, the bits declared in RCSTA1/2 TXSTA1/2 are also declared ***
 *** with the number corresponding to their parent register eg: CSRC -> CSRC1 and CSRC2 ***
 
 */

#if defined(_18F6520) || defined(_18F6620) || defined(_18F6720)
#define __PIC18F6X20
#else
#define __PIC18F8X20
#endif

#if defined(_18F6520) || defined(_18F8520)
#define __PIC18FX520
#elif defined(_18F6620) || defined(_18F8620)
#define __PIC18FX620
#else
#define __PIC18FX720
#endif

// Special Function Registers

static volatile near unsigned char	TOSU		@ 0xFFF;
static volatile near unsigned char	TOSH		@ 0xFFE;
static volatile near unsigned char	TOSL		@ 0xFFD;
static volatile near unsigned char	STKPTR		@ 0xFFC;
static volatile near unsigned char	PCLATU		@ 0xFFB;
static volatile near unsigned char	PCLATH		@ 0xFFA;
static volatile near unsigned char	PCL		@ 0xFF9;
static volatile far unsigned char *	TBLPTR		@ 0xFF6;
static volatile near unsigned char	TBLPTRU		@ 0xFF8;
static volatile near unsigned char	TBLPTRH		@ 0xFF7;
static volatile near unsigned char	TBLPTRL		@ 0xFF6;
static volatile	near unsigned char	TABLAT		@ 0xFF5;
static volatile near unsigned char	PRODH		@ 0xFF4;
static volatile near unsigned char	PRODL		@ 0xFF3;
static volatile near unsigned char	INTCON		@ 0xFF2;
static 		near unsigned char	INTCON2		@ 0xFF1;
static volatile near unsigned char	INTCON3		@ 0xFF0;
static volatile near unsigned char	INDF0		@ 0xFEF;
static volatile near unsigned char	POSTINC0	@ 0xFEE;
static volatile near unsigned char	POSTDEC0	@ 0xFED;
static volatile near unsigned char	PREINC0		@ 0xFEC;
static volatile near unsigned char	PLUSW0		@ 0xFEB;
static volatile near unsigned char	FSR0H		@ 0xFEA;
static volatile near unsigned char	FSR0L		@ 0xFE9;
static volatile near unsigned char	WREG		@ 0xFE8;
static volatile near unsigned char	INDF1		@ 0xFE7;
static volatile near unsigned char	POSTINC1	@ 0xFE6;
static volatile near unsigned char	POSTDEC1	@ 0xFE5;
static volatile near unsigned char	PREINC1		@ 0xFE4;
static volatile near unsigned char	PLUSW1		@ 0xFE3;
static volatile near unsigned char	FSR1H		@ 0xFE2;
static volatile near unsigned char	FSR1L		@ 0xFE1;
static 		near unsigned char	BSR		@ 0xFE0;
static volatile near unsigned char	INDF2		@ 0xFDF;
static volatile near unsigned char	POSTINC2	@ 0xFDE;
static volatile near unsigned char	POSTDEC2	@ 0xFDD;
static volatile near unsigned char	PREINC2		@ 0xFDC;
static volatile near unsigned char	PLUSW2		@ 0xFDB;
static volatile near unsigned char	FSR2H		@ 0xFDA;
static volatile near unsigned char	FSR2L		@ 0xFD9;
static volatile near unsigned char	STATUS		@ 0xFD8;
static volatile near unsigned int	TMR0		@ 0xFD6;
static volatile near unsigned char	TMR0H		@ 0xFD7;
static volatile near unsigned char	TMR0L		@ 0xFD6;
static 		near unsigned char	T0CON		@ 0xFD5;
static 		near unsigned char	OSCCON		@ 0xFD3;
static volatile near unsigned char	LVDCON		@ 0xFD2;
static volatile near unsigned char	WDTCON		@ 0xFD1;
static volatile near unsigned char	RCON		@ 0xFD0;
static volatile near unsigned int	TMR1		@ 0xFCE;
static volatile near unsigned char	TMR1H		@ 0xFCF;
static volatile near unsigned char	TMR1L		@ 0xFCE;
static 		near unsigned char	T1CON		@ 0xFCD;
static volatile near unsigned char	TMR2		@ 0xFCC;
static 		near unsigned char	PR2		@ 0xFCB;
static 		near unsigned char	T2CON		@ 0xFCA;
static volatile near unsigned char	SSPBUF		@ 0xFC9;
static 		near unsigned char	SSPADD		@ 0xFC8;
static volatile near unsigned char	SSPSTAT		@ 0xFC7;
static volatile near unsigned char	SSPCON1		@ 0xFC6;
static volatile near unsigned char	SSPCON2		@ 0xFC5;
static volatile near unsigned int	ADRES		@ 0xFC3;
static volatile near unsigned char	ADRESH		@ 0xFC4;
static volatile near unsigned char	ADRESL		@ 0xFC3;
static volatile near unsigned char	ADCON0		@ 0xFC2;
static 		near unsigned char	ADCON1		@ 0xFC1;
static 		near unsigned char	ADCON2		@ 0xFC0;
static volatile near unsigned int	CCPR1		@ 0xFBE;
static volatile near unsigned char	CCPR1H		@ 0xFBF;
static volatile near unsigned char	CCPR1L		@ 0xFBE;
static volatile near unsigned char	CCP1CON		@ 0xFBD;
static volatile near unsigned int	CCPR2		@ 0xFBB;
static volatile near unsigned char	CCPR2H		@ 0xFBC;
static volatile near unsigned char	CCPR2L		@ 0xFBB;
static volatile near unsigned char	CCP2CON		@ 0xFBA;
static volatile near unsigned int	CCPR3		@ 0xFB8;
static volatile near unsigned char	CCPR3H		@ 0xFB9;
static volatile near unsigned char	CCPR3L		@ 0xFB8;
static volatile near unsigned char	CCP3CON		@ 0xFB7;
static volatile near unsigned char	CVRCON		@ 0xFB5;
static volatile near unsigned char	CMCON		@ 0xFB4;
static volatile near unsigned int	TMR3		@ 0xFB2;
static volatile near unsigned char	TMR3H		@ 0xFB3;
static volatile near unsigned char	TMR3L		@ 0xFB2;
static 		near unsigned char	T3CON		@ 0xFB1;
static volatile near unsigned char	PSPCON		@ 0xFB0;
static 		near unsigned char	SPBRG1		@ 0xFAF;
static volatile near unsigned char	RCREG1		@ 0xFAE;
static volatile near unsigned char	TXREG1		@ 0xFAD;
static volatile near unsigned char	TXSTA1		@ 0xFAC;
static volatile near unsigned char	RCSTA1		@ 0xFAB;
// alternate definitions for compatability with mono USART devices
static 		near unsigned char	SPBRG		@ 0xFAF;
static volatile near unsigned char	RCREG		@ 0xFAE;
static volatile near unsigned char	TXREG		@ 0xFAD;
static volatile near unsigned char	TXSTA		@ 0xFAC;
static volatile near unsigned char	RCSTA		@ 0xFAB;
static 		near unsigned char	EEADRH		@ 0xFAA;
static 		near unsigned char	EEADR		@ 0xFA9;
static volatile	near unsigned char	EEDATA		@ 0xFA8;
static volatile near unsigned char	EECON2		@ 0xFA7;
static volatile near unsigned char	EECON1		@ 0xFA6;
static		near unsigned char	IPR3		@ 0xFA5;
static volatile near unsigned char	PIR3		@ 0xFA4;
static		near unsigned char	PIE3		@ 0xFA3;
static		near unsigned char	IPR2		@ 0xFA2;
static volatile near unsigned char	PIR2		@ 0xFA1;
static		near unsigned char	PIE2		@ 0xFA0;
static		near unsigned char	IPR1		@ 0xF9F;
static volatile near unsigned char	PIR1		@ 0xF9E;
static		near unsigned char	PIE1		@ 0xF9D;
#if defined(__PIC18F8X20)
static		near unsigned char	MEMCON		@ 0xF9C;
static volatile near unsigned char	TRISJ		@ 0xF9A;
static volatile near unsigned char	TRISH		@ 0xF99;
#endif
static volatile near unsigned char	TRISG		@ 0xF98;
static volatile near unsigned char	TRISF		@ 0xF97;
static volatile near unsigned char	TRISE		@ 0xF96;
static volatile near unsigned char	TRISD		@ 0xF95;
static volatile near unsigned char	TRISC		@ 0xF94;
static volatile near unsigned char	TRISB		@ 0xF93;
static volatile near unsigned char	TRISA		@ 0xF92;
#if defined(__PIC18F8X20)
static volatile near unsigned char	LATJ		@ 0xF91;
static volatile near unsigned char	LATH		@ 0xF90;
#endif
static volatile near unsigned char	LATG		@ 0xF8F;
static volatile near unsigned char	LATF		@ 0xF8E;
static volatile near unsigned char	LATE		@ 0xF8D;
static volatile near unsigned char	LATD		@ 0xF8C;
static volatile near unsigned char	LATC		@ 0xF8B;
static volatile near unsigned char	LATB		@ 0xF8A;
static volatile near unsigned char	LATA		@ 0xF89;
#if defined(__PIC18F8X20)
static volatile near unsigned char	PORTJ		@ 0xF88;
static volatile near unsigned char	PORTH		@ 0xF87;
#endif
static volatile near unsigned char	PORTG		@ 0xF86;
static volatile near unsigned char	PORTF		@ 0xF85;
static volatile near unsigned char	PORTE		@ 0xF84;
static volatile near unsigned char	PORTD		@ 0xF83;
static volatile near unsigned char	PORTC		@ 0xF82;
static volatile near unsigned char	PORTB		@ 0xF81;
static volatile near unsigned char	PORTA		@ 0xF80;
static volatile near unsigned char	TMR4		@ 0xF78;
static 		near unsigned char	PR4		@ 0xF77;
static 		near unsigned char	T4CON		@ 0xF76;
static volatile near unsigned int	CCPR4		@ 0xF74;
static volatile near unsigned char	CCPR4H		@ 0xF75;
static volatile near unsigned char	CCPR4L		@ 0xF74;
static volatile near unsigned char	CCP4CON		@ 0xF73;
static volatile near unsigned int	CCPR5		@ 0xF71;
static volatile near unsigned char	CCPR5H		@ 0xF72;
static volatile near unsigned char	CCPR5L		@ 0xF71;
static volatile near unsigned char	CCP5CON		@ 0xF70;
static 		near unsigned char	SPBRG2		@ 0xF6F;
static volatile near unsigned char	RCREG2		@ 0xF6E;
static volatile near unsigned char	TXREG2		@ 0xF6D;
static volatile near unsigned char	TXSTA2		@ 0xF6C;
static volatile near unsigned char	RCSTA2		@ 0xF6B;


//Defining individual bits

// STKPTR Register
static volatile	near bit	STKFUL	@ ((unsigned)&STKPTR*8)+7;	// stack full flag
static volatile	near bit	STKUNF	@ ((unsigned)&STKPTR*8)+6;	// stack underflow flag

// INTCON Register
static		near bit	GIE	@ ((unsigned)&INTCON*8)+7;	// global interrupt enable
static		near bit	GIEH	@ ((unsigned)&INTCON*8)+7;	// enable high priority interrupts
static		near bit	PEIE	@ ((unsigned)&INTCON*8)+6;	// peripheral interrupt enable
static		near bit	GIEL	@ ((unsigned)&INTCON*8)+6;	// enable low priority peripheral interrupts
static		near bit	TMR0IE	@ ((unsigned)&INTCON*8)+5;	// TMR0 overflow interrupt enable
static		near bit	INT0IE	@ ((unsigned)&INTCON*8)+4;	// external interrupt 0 enable
static		near bit	RBIE	@ ((unsigned)&INTCON*8)+3;	// RB port change interrupt enable
static volatile	near bit	TMR0IF	@ ((unsigned)&INTCON*8)+2;	// TMR0 overflow interrupt flag
static volatile	near bit	INT0IF	@ ((unsigned)&INTCON*8)+1;	// external interrupt 0 flag
static volatile	near bit	RBIF	@ ((unsigned)&INTCON*8)+0;	// RB port change interrupt flag

// INTCON2 Register
static		near bit	RBPU	@ ((unsigned)&INTCON2*8)+7;	// port B pull-up enable
static		near bit	INTEDG0	@ ((unsigned)&INTCON2*8)+6;	// external interrupt 0 edge select
static		near bit	INTEDG1	@ ((unsigned)&INTCON2*8)+5;	// external interrupt 1 edge select
static 		near bit	INTEDG2	@ ((unsigned)&INTCON2*8)+4;	// external interrupt 2 edge select
static 		near bit	INTEDG3	@ ((unsigned)&INTCON2*8)+3;	// external interrupt 3 edge select
static		near bit	TMR0IP	@ ((unsigned)&INTCON2*8)+2;	// TMR0 overflow interrupt priority
static 		near bit	INT3IP	@ ((unsigned)&INTCON2*8)+1;	// external interrupt 3 priority
static		near bit	RBIP	@ ((unsigned)&INTCON2*8)+0;	// RB port change interrupt priority

// INTCON3 Register
static		near bit	INT2IP	@ ((unsigned)&INTCON3*8)+7;	// external interrupt 2 priority
static		near bit	INT1IP	@ ((unsigned)&INTCON3*8)+6;	// external interrupt 1 priority
static		near bit	INT3IE	@ ((unsigned)&INTCON3*8)+5;	// external interrupt 3 enable
static		near bit	INT2IE	@ ((unsigned)&INTCON3*8)+4;	// external interrupt 2 enable
static		near bit	INT1IE	@ ((unsigned)&INTCON3*8)+3;	// external interrupt 1 enable
static volatile	near bit	INT3IF	@ ((unsigned)&INTCON3*8)+2;	// external interrupt 3 flag
static volatile	near bit	INT2IF	@ ((unsigned)&INTCON3*8)+1;	// external interrupt 2 flag
static volatile	near bit	INT1IF	@ ((unsigned)&INTCON3*8)+0;	// external interrupt 1 flag

// STATUS Register
static volatile	near bit	NEGATIVE @ ((unsigned)&STATUS*8)+4;	// negative result
static volatile	near bit	OV	@ ((unsigned)&STATUS*8)+3;	// overflow status
static volatile	near bit	ZERO	@ ((unsigned)&STATUS*8)+2;	// zero result
static volatile	near bit	DC	@ ((unsigned)&STATUS*8)+1;	// digit carry
static volatile	near bit	CARRY	@ ((unsigned)&STATUS*8)+0;	// carry/borrow

// T0CON Register
static		near bit	TMR0ON	@ ((unsigned)&T0CON*8)+7;	// TMR0 on/off
static		near bit	T08BIT	@ ((unsigned)&T0CON*8)+6;	// 8/16 bit select
static		near bit	T0CS	@ ((unsigned)&T0CON*8)+5;	// TMR0 Source Select
static		near bit	T0SE	@ ((unsigned)&T0CON*8)+4;	// TMR0 Source Edge Select
static		near bit	PSA	@ ((unsigned)&T0CON*8)+3;	// Prescaler Assignment
static		near bit	T0PS2	@ ((unsigned)&T0CON*8)+2;	// Prescaler
static		near bit	T0PS1	@ ((unsigned)&T0CON*8)+1;
static		near bit	T0PS0	@ ((unsigned)&T0CON*8)+0;

// OSCCON Register
static		near bit	SCS	@ ((unsigned)&OSCCON*8)+0;	// system clock switch bit