sr103se60pub.h

日本IRON os 在汽车电子中的应用 高度机密

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8930
 */
extern	volatile	union	TG12ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	sc0tid:1;
		ui16_t	sc0empid:1;
		ui16_t	reserve0:2;
		ui16_t	sc0tir:1;
		ui16_t	sc0empir:1;
		ui16_t	reserve1:2;
		ui16_t	sc0tie:1;
		ui16_t	sc0empie:1;
		ui16_t	reserve2:2;
		ui16_t	g12lv:3;
		ui16_t	reserve3:1;
	}bf;
}g12icr;
#define	ui16_CPU_G12ICR     g12icr.mem
#define	bCPU_SC0TID         g12icr.bf.sc0tid        /*!< 們倛侽 庴怣姰椆妱崬傒専弌 */
#define	bCPU_SC0EMPID       g12icr.bf.sc0empid      /*!< 們倛侽 俥俬俥俷僼儖妱崬傒専弌 */
#define	bCPU_SC0TIR         g12icr.bf.sc0tir        /*!< 們倛侽 庴怣姰椆妱崬傒梫媮 */
#define	bCPU_SC0EMPIR       g12icr.bf.sc0empir      /*!< 們倛侽 俥俬俥俷僼儖妱崬傒梫媮 */
#define	bCPU_SC0TIE         g12icr.bf.sc0tie        /*!< 們倛侽 庴怣姰椆妱崬傒嫋壜 */
#define	bCPU_SC0EMPIE       g12icr.bf.sc0empie      /*!< 們倛侽 俥俬俥俷僼儖妱崬傒嫋壜 */
#define	bCPU_G12LV          g12icr.bf.g12lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8934
 */
extern	volatile	union	TG13ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	dm0id:1;
		ui16_t	dmr0id:1;
		ui16_t	dmf0id:1;
		ui16_t	reserve0:1;
		ui16_t	dm0ir:1;
		ui16_t	dmr0ir:1;
		ui16_t	dmf0ir:1;
		ui16_t	reserve1:1;
		ui16_t	dm0ie:1;
		ui16_t	dmr0ie:1;
		ui16_t	dmf0ie:1;
		ui16_t	reserve2:1;
		ui16_t	g13lv:3;
		ui16_t	reserve3:1;
	}bf;
}g13icr;
#define	ui16_CPU_G13ICR     g13icr.mem
#define	bCPU_DM0ID          g13icr.bf.dm0id         /*!< 俢俵俙侽揮憲廔椆専弌 */
#define	bCPU_DMR0ID         g13icr.bf.dmr0id        /*!< 俢俵俙侽揮憲廔椆屻梫媮専弌 */
#define	bCPU_DMF0ID         g13icr.bf.dmf0id        /*!< 俢俵俙侽僆乕僶乕僼儘乕専弌 */
#define	bCPU_DM0IR          g13icr.bf.dm0ir         /*!< 俢俵俙侽揮憲廔椆 梫媮 */
#define	bCPU_DMR0IR         g13icr.bf.dmr0ir        /*!< 俢俵俙侽揮憲廔椆屻 梫媮 梫媮 */
#define	bCPU_DMF0IR         g13icr.bf.dmf0ir        /*!< 俢俵俙侽僆乕僶乕僼儘乕 梫媮 */
#define	bCPU_DM0IE          g13icr.bf.dm0ie         /*!< 俢俵俙侽揮憲廔椆 嫋壜 */
#define	bCPU_DMR0IE         g13icr.bf.dmr0ie        /*!< 俢俵俙侽揮憲廔椆屻梫媮 嫋壜 */
#define	bCPU_DMF0IE         g13icr.bf.dmf0ie        /*!< 俢俵俙侽僆乕僶乕僼儘乕 嫋壜 */
#define	bCPU_G13LV          g13icr.bf.g13lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8938
 */
extern	volatile	union	TG14ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	dm1id:1;
		ui16_t	dmr1id:1;
		ui16_t	dmf1id:1;
		ui16_t	reserve0:1;
		ui16_t	dm1ir:1;
		ui16_t	dmr1ir:1;
		ui16_t	dmf1ir:1;
		ui16_t	reserve1:1;
		ui16_t	dm1ie:1;
		ui16_t	dmr1ie:1;
		ui16_t	dmf1ie:1;
		ui16_t	reserve2:1;
		ui16_t	g14lv:3;
		ui16_t	reserve3:1;
	}bf;
}g14icr;
#define	ui16_CPU_G14ICR     g14icr.mem
#define	bCPU_DM1ID          g14icr.bf.dm1id         /*!< 俢俵俙侾揮憲廔椆 */
#define	bCPU_DMR1ID         g14icr.bf.dmr1id        /*!< 俢俵俙侾揮憲廔椆屻梫媮 */
#define	bCPU_DMF1ID         g14icr.bf.dmf1id        /*!< 俢俵俙侾僆乕僶乕僼儘乕 */
#define	bCPU_DM1IR          g14icr.bf.dm1ir         /*!< 俢俵俙侾揮憲廔椆 */
#define	bCPU_DMR1IR         g14icr.bf.dmr1ir        /*!< 俢俵俙侾揮憲廔椆屻梫媮 */
#define	bCPU_DMF1IR         g14icr.bf.dmf1ir        /*!< 俢俵俙侾僆乕僶乕僼儘乕 */
#define	bCPU_DM1IE          g14icr.bf.dm1ie         /*!< 俢俵俙侾揮憲廔椆 */
#define	bCPU_DMR1IE         g14icr.bf.dmr1ie        /*!< 俢俵俙侾揮憲廔椆屻梫媮 */
#define	bCPU_DMF1IE         g14icr.bf.dmf1ie        /*!< 俢俵俙侾僆乕僶乕僼儘乕 */
#define	bCPU_G14LV          g14icr.bf.g14lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x893c
 */
extern	volatile	union	TG15ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	dm2id:1;
		ui16_t	dmr2id:1;
		ui16_t	dmf2id:1;
		ui16_t	reserve0:1;
		ui16_t	dm2ir:1;
		ui16_t	dmr2ir:1;
		ui16_t	dmf2ir:1;
		ui16_t	reserve1:1;
		ui16_t	dm2ie:1;
		ui16_t	dmr2ie:1;
		ui16_t	dmf2ie:1;
		ui16_t	reserve2:1;
		ui16_t	g15lv:3;
		ui16_t	reserve3:1;
	}bf;
}g15icr;
#define	ui16_CPU_G15ICR     g15icr.mem
#define	bCPU_DM2ID          g15icr.bf.dm2id         /*!< 俢俵俙俀揮憲廔椆 */
#define	bCPU_DMR2ID         g15icr.bf.dmr2id        /*!< 俢俵俙俀揮憲廔椆屻梫媮 */
#define	bCPU_DMF2ID         g15icr.bf.dmf2id        /*!< 俢俵俙俀僆乕僶乕僼儘乕 */
#define	bCPU_DM2IR          g15icr.bf.dm2ir         /*!< 俢俵俙俀揮憲廔椆 */
#define	bCPU_DMR2IR         g15icr.bf.dmr2ir        /*!< 俢俵俙俀揮憲廔椆屻梫媮 */
#define	bCPU_DMF2IR         g15icr.bf.dmf2ir        /*!< 俢俵俙俀僆乕僶乕僼儘乕 */
#define	bCPU_DM2IE          g15icr.bf.dm2ie         /*!< 俢俵俙俀揮憲廔椆 */
#define	bCPU_DMR2IE         g15icr.bf.dmr2ie        /*!< 俢俵俙俀揮憲廔椆屻梫媮 */
#define	bCPU_DMF2IE         g15icr.bf.dmf2ie        /*!< 俢俵俙俀僆乕僶乕僼儘乕 */
#define	bCPU_G15LV          g15icr.bf.g15lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8940
 */
extern	volatile	union	TG16ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	dm3id:1;
		ui16_t	dmr3id:1;
		ui16_t	dmf3id:1;
		ui16_t	reserve0:1;
		ui16_t	dm3ir:1;
		ui16_t	dmr3ir:1;
		ui16_t	dmf3ir:1;
		ui16_t	reserve1:1;
		ui16_t	dm3ie:1;
		ui16_t	dmr3ie:1;
		ui16_t	dmf3ie:1;
		ui16_t	reserve2:1;
		ui16_t	g16lv:3;
		ui16_t	reserve3:1;
	}bf;
}g16icr;
#define	ui16_CPU_G16ICR     g16icr.mem
#define	bCPU_DM3ID          g16icr.bf.dm3id         /*!< 俢俵俙俁揮憲廔椆 */
#define	bCPU_DMR3ID         g16icr.bf.dmr3id        /*!< 俢俵俙俁揮憲廔椆屻梫媮 */
#define	bCPU_DMF3ID         g16icr.bf.dmf3id        /*!< 俢俵俙俁僆乕僶乕僼儘乕 */
#define	bCPU_DM3IR          g16icr.bf.dm3ir         /*!< 俢俵俙俁揮憲廔椆 */
#define	bCPU_DMR3IR         g16icr.bf.dmr3ir        /*!< 俢俵俙俁揮憲廔椆屻梫媮 */
#define	bCPU_DMF3IR         g16icr.bf.dmf3ir        /*!< 俢俵俙俁僆乕僶乕僼儘乕 */
#define	bCPU_DM3IE          g16icr.bf.dm3ie         /*!< 俢俵俙俁揮憲廔椆 */
#define	bCPU_DMR3IE         g16icr.bf.dmr3ie        /*!< 俢俵俙俁揮憲廔椆屻梫媮 */
#define	bCPU_DMF3IE         g16icr.bf.dmf3ie        /*!< 俢俵俙俁僆乕僶乕僼儘乕 */
#define	bCPU_G16LV          g16icr.bf.g16lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8944
 */
extern	volatile	ui16_t	g17icr;
#define	ui16_CPU_G17ICR	g17icr

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8948
 */
extern	volatile	ui16_t	g18icr;
#define	ui16_CPU_G18ICR	g18icr

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x894c
 */
extern	volatile	ui16_t	g19icr;
#define	ui16_CPU_G19ICR	g19icr

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8950
 */
extern	volatile	ui16_t	g20icr;
#define	ui16_CPU_G20ICR	g20icr

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8954
 */
extern	volatile	union	TG21ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	irq1id:1;
		ui16_t	reserve0:3;
		ui16_t	irq1ir:1;
		ui16_t	reserve1:3;
		ui16_t	irq1ie:1;
		ui16_t	reserve2:3;
		ui16_t	g21lv:3;
		ui16_t	reserve3:1;
	}bf;
}g21icr;
#define	ui16_CPU_G21ICR     g21icr.mem
#define	bCPU_IRQ1ID         g21icr.bf.irq1id        /*!< 奜晹抂巕妱崬傒侾専弌 */
#define	bCPU_IRQ1IR         g21icr.bf.irq1ir        /*!< 奜晹抂巕妱崬傒侾梫媮 */
#define	bCPU_IRQ1IE         g21icr.bf.irq1ie        /*!< 奜晹抂巕妱崬傒侾嫋壜 */
#define	bCPU_G21LV          g21icr.bf.g21lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8958
 */
extern	volatile	union	TG22ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	irq2id:1;
		ui16_t	reserve0:3;
		ui16_t	irq2ir:1;
		ui16_t	reserve1:3;
		ui16_t	irq2ie:1;
		ui16_t	reserve2:3;
		ui16_t	g22lv:3;
		ui16_t	reserve3:1;
	}bf;
}g22icr;
#define	ui16_CPU_G22ICR     g22icr.mem
#define	bCPU_IRQ2ID         g22icr.bf.irq2id        /*!< 奜晹抂巕妱崬傒俀専弌 */
#define	bCPU_IRQ2IR         g22icr.bf.irq2ir        /*!< 奜晹抂巕妱崬傒俀梫媮 */
#define	bCPU_IRQ2IE         g22icr.bf.irq2ie        /*!< 奜晹抂巕妱崬傒俀嫋壜 */
#define	bCPU_G22LV          g22icr.bf.g22lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x895c
 */
extern	volatile	union	TG23ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	irq3id:1;
		ui16_t	reserve0:3;
		ui16_t	irq3ir:1;
		ui16_t	reserve1:3;
		ui16_t	irq3ie:1;
		ui16_t	reserve2:3;
		ui16_t	g23lv:3;
		ui16_t	reserve3:1;
	}bf;
}g23icr;
#define	ui16_CPU_G23ICR     g23icr.mem
#define	bCPU_IRQ3ID         g23icr.bf.irq3id        /*!< 奜晹抂巕妱崬傒俁専弌 */
#define	bCPU_IRQ3IR         g23icr.bf.irq3ir        /*!< 奜晹抂巕妱崬傒俁梫媮 */
#define	bCPU_IRQ3IE         g23icr.bf.irq3ie        /*!< 奜晹抂巕妱崬傒俁嫋壜 */
#define	bCPU_G23LV          g23icr.bf.g23lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8960
 */
extern	volatile	union	TG24ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	irq4id:1;
		ui16_t	reserve0:3;
		ui16_t	irq4ir:1;
		ui16_t	reserve1:3;
		ui16_t	irq4ie:1;
		ui16_t	reserve2:3;
		ui16_t	g24lv:3;
		ui16_t	reserve3:1;
	}bf;
}g24icr;
#define	ui16_CPU_G24ICR     g24icr.mem
#define	bCPU_IRQ4ID         g24icr.bf.irq4id        /*!< 奜晹抂巕妱崬傒係専弌 */
#define	bCPU_IRQ4IR         g24icr.bf.irq4ir        /*!< 奜晹抂巕妱崬傒係梫媮 */
#define	bCPU_IRQ4IE         g24icr.bf.irq4ie        /*!< 奜晹抂巕妱崬傒係嫋壜 */
#define	bCPU_G24LV          g24icr.bf.g24lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8964
 */
extern	volatile	union	TG25ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	irq5id:1;
		ui16_t	reserve0:3;
		ui16_t	irq5ir:1;
		ui16_t	reserve1:3;
		ui16_t	irq5ie:1;
		ui16_t	reserve2:3;
		ui16_t	g25lv:3;
		ui16_t	reserve3:1;
	}bf;
}g25icr;
#define	ui16_CPU_G25ICR     g25icr.mem
#define	bCPU_IRQ5ID         g25icr.bf.irq5id        /*!< 奜晹抂巕妱崬傒俆専弌 */
#define	bCPU_IRQ5IR         g25icr.bf.irq5ir        /*!< 奜晹抂巕妱崬傒俆梫媮 */
#define	bCPU_IRQ5IE         g25icr.bf.irq5ie        /*!< 奜晹抂巕妱崬傒俆嫋壜 */
#define	bCPU_G25LV          g25icr.bf.g25lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8968
 */
extern	volatile	union	TG26ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	irq6id:1;
		ui16_t	reserve0:3;
		ui16_t	irq6ir:1;
		ui16_t	reserve1:3;
		ui16_t	irq6ie:1;
		ui16_t	reserve2:3;
		ui16_t	g26lv:3;
		ui16_t	reserve3:1;
	}bf;
}g26icr;
#define	ui16_CPU_G26ICR     g26icr.mem
#define	bCPU_IRQ6ID         g26icr.bf.irq6id        /*!< 奜晹抂巕妱崬傒俇専弌 */
#define	bCPU_IRQ6IR         g26icr.bf.irq6ir        /*!< 奜晹抂巕妱崬傒俇梫媮 */
#define	bCPU_IRQ6IE         g26icr.bf.irq6ie        /*!< 奜晹抂巕妱崬傒俇嫋壜 */
#define	bCPU_G26LV          g26icr.bf.g26lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x896c
 */
extern	volatile	union	TG27ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	irq7id:1;
		ui16_t	reserve0:3;
		ui16_t	irq7ir:1;
		ui16_t	reserve1:3;
		ui16_t	irq7ie:1;
		ui16_t	reserve2:3;
		ui16_t	g27lv:3;
		ui16_t	reserve3:1;
	}bf;
}g27icr;
#define	ui16_CPU_G27ICR     g27icr.mem
#define	bCPU_IRQ7ID         g27icr.bf.irq7id        /*!< 奜晹抂巕妱崬傒俈専弌 */
#define	bCPU_IRQ7IR         g27icr.bf.irq7ir        /*!< 奜晹抂巕妱崬傒俈梫媮 */
#define	bCPU_IRQ7IE         g27icr.bf.irq7ie        /*!< 奜晹抂巕妱崬傒俈嫋壜 */
#define	bCPU_G27LV          g27icr.bf.g27lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8970
 */
extern	volatile	union	TG28ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	sc1rid:1;
		ui16_t	sc1flid:1;
		ui16_t	sc1erid:1;
		ui16_t	reserve0:1;
		ui16_t	sc1rir:1;
		ui16_t	sc1flir:1;
		ui16_t	sc1erir:1;
		ui16_t	reserve1:1;
		ui16_t	sc1rie:1;
		ui16_t	sc1flie:1;
		ui16_t	sc1erie:1;
		ui16_t	reserve2:1;
		ui16_t	g28lv:3;
		ui16_t	reserve3:1;
	}bf;
}g28icr;
#define	ui16_CPU_G28ICR     g28icr.mem
#define	bCPU_SC1RID         g28icr.bf.sc1rid        /*!< 們倛侾 庴怣姰椆妱崬傒専弌 */
#define	bCPU_SC1FLID        g28icr.bf.sc1flid       /*!< 們倛侾 俥俬俥俷僼儖妱崬傒専弌 */
#define	bCPU_SC1ERID        g28icr.bf.sc1erid       /*!< 們倛侾 僄儔乕妱崬傒専弌 */
#define	bCPU_SC1RIR         g28icr.bf.sc1rir        /*!< 們倛侾 庴怣姰椆妱崬傒梫媮 */
#define	bCPU_SC1FLIR        g28icr.bf.sc1flir       /*!< 們倛侾 俥俬俥俷僼儖妱崬傒梫媮 */
#define	bCPU_SC1ERIR        g28icr.bf.sc1erir       /*!< 們倛侾 僄儔乕妱崬傒梫媮 */
#define	bCPU_SC1RIE         g28icr.bf.sc1rie        /*!< 們倛侾 庴怣姰椆妱崬傒嫋壜 */
#define	bCPU_SC1FLIE        g28icr.bf.sc1flie       /*!< 們倛侾 俥俬俥俷僼儖妱崬傒嫋壜 */
#define	bCPU_SC1ERIE        g28icr.bf.sc1erie       /*!< 們倛侾 僄儔乕妱崬傒嫋壜 */
#define	bCPU_G28LV          g28icr.bf.g28lv         /*!< 妱崬傒桪愭儗儀儖 */

/*!
 *	@name	妱崬傒惂屼
 *	@brief	0x8974
 */
extern	volatile	union	TG29ICR_tag{
	ui16_t	mem;
	struct{
		ui16_t	sc1tid:1;
		ui16_t	sc1empid:1;
		ui16_t	reserve0:2;
		ui16_t	sc1tir:1;
		ui16_t	sc1empir:1;
		ui16_t	reserve1:2;
		ui16_t	sc1tie:1;
		ui16_t	sc1empie:1;
		ui16_t	reserve2:2;
		ui16_t	g29lv:3;
		ui16_t	reserve3:1;
	}bf;
}g29icr;
#define	ui16_CPU_G29ICR     g29icr.mem