sr103se60pub.h

日本IRON os 在汽车电子中的应用 高度机密

/****************************************************************************/
/*!
  @file		sr103SE60PUB.c
  @brief	MN103SE60梡摿庩儗僕僗僞掕媊僼傽僀儖乮俽俽婯栺弨嫆乯
  @version	$Revision: 2.00 $
  @date		2007/XX/XX
  @author	Matsushita Electronics Co.,Ltd.
*/
/*****************************************************************************/
#ifndef __SR103SE60_H__
#define __SR103SE60_H__

/*!
 *	@name	妱崬傒儀僋僩儖
 *	@brief	0x8000
 */
extern	volatile	ui16_t	ivar0;
#define	ui16_CPU_IVAR0	ivar0

/*!
 *	@name	妱崬傒儀僋僩儖
 *	@brief	0x8004
 */
extern	volatile	ui16_t	ivar1;
#define	ui16_CPU_IVAR1	ivar1

/*!
 *	@name	妱崬傒儀僋僩儖
 *	@brief	0x8008
 */
extern	volatile	ui16_t	ivar2;
#define	ui16_CPU_IVAR2	ivar2

/*!
 *	@name	妱崬傒儀僋僩儖
 *	@brief	0x800c
 */
extern	volatile	ui16_t	ivar3;
#define	ui16_CPU_IVAR3	ivar3

/*!
 *	@name	妱崬傒儀僋僩儖
 *	@brief	0x8010
 */
extern	volatile	ui16_t	ivar4;
#define	ui16_CPU_IVAR4	ivar4

/*!
 *	@name	妱崬傒儀僋僩儖
 *	@brief	0x8014
 */
extern	volatile	ui16_t	ivar5;
#define	ui16_CPU_IVAR5	ivar5

/*!
 *	@name	妱崬傒儀僋僩儖
 *	@brief	0x8018
 */
extern	volatile	ui16_t	ivar6;
#define	ui16_CPU_IVAR6	ivar6

/*!
 *	@name	妱崬傒儀僋僩儖
 *	@brief	0x801c
 */
extern	volatile	ui16_t	ivbr;
#define	ui16_CPU_IVBR	ivbr

/*!
 *	@name	僉儍僢僔儏惂屼
 *	@brief	0x8070
 */
extern	volatile	union	TCHCTR_tag{
	ui16_t	mem;
	struct{
		ui16_t	icen:1;
		ui16_t	dcen:1;
		ui16_t	icbusy:1;
		ui16_t	dcbusy:1;
		ui16_t	icinv:1;
		ui16_t	dcinv:1;
		ui16_t	reserve0:1;
		ui16_t	icwmd0:1;
		ui16_t	icwmd1:1;
		ui16_t	reserve1:2;
		ui16_t	dcwmd0:1;
		ui16_t	dcwmd1:1;
		ui16_t	reserve2:2;
	}bf;
}chctr;
#define	ui16_CPU_CHCTR      chctr.mem
#define	bCPU_ICEN           chctr.bf.icen          /*!< 柦椷僉儍僢僔儏僀僱乕僽儖 */
#define	bCPU_DCEN           chctr.bf.dcen          /*!< 僨乕僞僉儍僢僔儏僀僱乕僽儖 */
#define	bCPU_ICBUSY         chctr.bf.icbusy        /*!< 柦椷僉儍僢僔儏價僕乕 */
#define	bCPU_DCBUSY         chctr.bf.dcbusy        /*!< 僨乕僞僉儍僢僔儏價僕乕 */
#define	bCPU_ICINV          chctr.bf.icinv         /*!< 柦椷僉儍僢僔儏僀儞僶儕僨乕僩 */
#define	bCPU_DCINV          chctr.bf.dcinv         /*!< 僨乕僞僉儍僢僔儏僀儞僶儕僨乕僩 */
#define	bCPU_ICWMD0         chctr.bf.icwmd0        /*!< 柦椷僉儍僢僔儏僂僃僀儌乕僪乮僂僃僀侽乯 */
#define	bCPU_ICWMD1         chctr.bf.icwmd1        /*!< 柦椷僉儍僢僔儏僂僃僀儌乕僪乮僂僃僀侾乯 */
#define	bCPU_DCWMD0         chctr.bf.dcwmd0        /*!< 僨乕僞僉儍僢僔儏僂僃僀儌乕僪乮僂僃僀侽乯 */
#define	bCPU_DCWMD1         chctr.bf.dcwmd1        /*!< 僨乕僞僉儍僢僔儏僂僃僀儌乕僪乮僂僃僀侾乯 */

/*!
 *	@name	僂僅僢僠僪僢僌
 *	@brief	0x8200
 */
extern	volatile	ui8_t	wdbc;
#define	ui8_CPU_WDBC	wdbc

/*!
 *	@name	僂僅僢僠僪僢僌
 *	@brief	0x8202
 */
extern	volatile	union	TWDCTR_tag{
	ui8_t	mem;
	struct{
		ui8_t	wdck:3;
		ui8_t	reserve0:1;
		ui8_t	wdovf:1;
		ui8_t	wdovt:1;
		ui8_t	wdrst:1;
		ui8_t	wdcne:1;
	}bf;
}wdctr;
#define	ui8_CPU_WDCTR      wdctr.mem
#define	bCPU_WDCK           wdctr.bf.wdck          /*!< 僋儘僢僋僜乕僗慖戰 */
#define	bCPU_WDOVF          wdctr.bf.wdovf         /*!< 倂俢俷倁俥撉傒弌偟 */
#define	bCPU_WDOVT          wdctr.bf.wdovt         /*!< 僂僅僢僠僪僢僌僞僀儅僆乕僶乕僼儘乕弌椡偺慖戰 */
#define	bCPU_WDRST          wdctr.bf.wdrst         /*!< 僶僀僫儕僇僂儞僞儕僙僢僩 */
#define	bCPU_WDCNE          wdctr.bf.wdcne         /*!< 僂僅僢僠僪僢僌摦嶌嫋壜價僢僩 */

/*!
 *	@name	僂僅僢僠僪僢僌
 *	@brief	0x8204
 */
extern	volatile	union	TRSTCTR_tag{
	ui8_t	mem;
	struct{
		ui8_t	chiprst:1;
		ui8_t	reserve0:7;
	}bf;
}rstctr;
#define	ui8_CPU_RSTCTR     rstctr.mem
#define	bCPU_CHIPRST        rstctr.bf.chiprst       /*!< 僙儖僼儕僙僢僩 */

/*!
 *	@name	僶僗僐儞僩儘乕儔
 *	@brief	0x8420
 */
extern	volatile	ui16_t	memctr0;
#define	ui16_CPU_MEMCTR0	memctr0

/*!
 *	@name	僶僗僐儞僩儘乕儔
 *	@brief	0x8422
 */
extern	volatile	ui16_t	memctr1;
#define	ui16_CPU_MEMCTR1	memctr1

/*!
 *	@name	僶僗僐儞僩儘乕儔
 *	@brief	0x8424
 */
extern	volatile	ui16_t	memctr2;
#define	ui16_CPU_MEMCTR2	memctr2

/*!
 *	@name	僶僗僐儞僩儘乕儔
 *	@brief	0x8426
 */
extern	volatile	ui16_t	memctr3;
#define	ui16_CPU_MEMCTR3	memctr3

/*!
 *	@name	僶僗僐儞僩儘乕儔
 *	@brief	0x8428
 */
extern	volatile	ui16_t	memctr4;
#define	ui16_CPU_MEMCTR4	memctr4

/*!
 *	@name	僶僗僐儞僩儘乕儔
 *	@brief	0x842a
 */
extern	volatile	ui16_t	memctr5;
#define	ui16_CPU_MEMCTR5	memctr5

/*!
 *	@name	僶僗僐儞僩儘乕儔
 *	@brief	0x842c
 */
extern	volatile	ui16_t	memctr6;
#define	ui16_CPU_MEMCTR6	memctr6

/*!
 *	@name	僶僗僐儞僩儘乕儔
 *	@brief	0x842e
 */
extern	volatile	ui16_t	memctr7;
#define	ui16_CPU_MEMCTR7	memctr7

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8500
 */
extern	volatile	union	TDM0CTR_tag{
	ui32_t	mem;
	struct{
		ui32_t	dm0bg:6;
		ui32_t	dm0sam:2;
		ui32_t	dm0dam:2;
		ui32_t	reserve0:1;
		ui32_t	dm0tm:2;
		ui32_t	dm0ut:2;
		ui32_t	reserve1:1;
		ui32_t	dm0ten:1;
		ui32_t	reserve2:7;
		ui32_t	dm0rqf:1;
		ui32_t	reserve3:3;
		ui32_t	dm0ovf:1;
		ui32_t	reserve4:3;
	}bf;
}dm0ctr;
#define	ui32_CPU_DM0CTR     dm0ctr.mem
#define	bCPU_DM0BG          dm0ctr.bf.dm0bg         /*!< DMA婲摦梫場 */
#define	bCPU_DM0SAM         dm0ctr.bf.dm0sam        /*!< 僜乕僗懁傾僪儗僢僔儞僌儌乕僪 */
#define	bCPU_DM0DAM         dm0ctr.bf.dm0dam        /*!< 僨僗僥傿僱乕僔儑儞懁傾僪儗僢僔儞僌儌乕僪 */
#define	bCPU_DM0TM          dm0ctr.bf.dm0tm         /*!< DMA揮憲儌乕僪 */
#define	bCPU_DM0UT          dm0ctr.bf.dm0ut         /*!< DMA揮憲扨埵 */
#define	bCPU_DM0TEN         dm0ctr.bf.dm0ten        /*!<  */
#define	bCPU_DM0RQF         dm0ctr.bf.dm0rqf        /*!<  */
#define	bCPU_DM0OVF         dm0ctr.bf.dm0ovf        /*!<  */

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8504
 */
extern	volatile	ui32_t	dm0src;
#define	ui32_CPU_DM0SRC	dm0src

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8508
 */
extern	volatile	ui32_t	dm0dst;
#define	ui32_CPU_DM0DST	dm0dst

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x850c
 */
extern	volatile	ui16_t	dm0cnt;
#define	ui16_CPU_DM0CNT	dm0cnt

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x850e
 */
extern	volatile	ui8_t	dm0cyc;
#define	ui8_CPU_DM0CYC	dm0cyc

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8510
 */
extern	volatile	union	TDM1CTR_tag{
	ui32_t	mem;
	struct{
		ui32_t	dm1bg:6;
		ui32_t	dm1sam:2;
		ui32_t	dm1dam:2;
		ui32_t	reserve0:1;
		ui32_t	dm1tm:2;
		ui32_t	dm1ut:2;
		ui32_t	reserve1:1;
		ui32_t	dm1ten:1;
		ui32_t	reserve2:7;
		ui32_t	dm1rqf:1;
		ui32_t	reserve3:3;
		ui32_t	dm1ovf:1;
		ui32_t	reserve4:3;
	}bf;
}dm1ctr;
#define	ui32_CPU_DM1CTR     dm1ctr.mem
#define	bCPU_DM1BG          dm1ctr.bf.dm1bg         /*!< DMA婲摦梫場 */
#define	bCPU_DM1SAM         dm1ctr.bf.dm1sam        /*!< 僜乕僗懁傾僪儗僢僔儞僌儌乕僪 */
#define	bCPU_DM1DAM         dm1ctr.bf.dm1dam        /*!< 僨僗僥傿僱乕僔儑儞懁傾僪儗僢僔儞僌儌乕僪 */
#define	bCPU_DM1TM          dm1ctr.bf.dm1tm         /*!< DMA揮憲儌乕僪 */
#define	bCPU_DM1UT          dm1ctr.bf.dm1ut         /*!< DMA揮憲扨埵 */
#define	bCPU_DM1TEN         dm1ctr.bf.dm1ten        /*!<  */
#define	bCPU_DM1RQF         dm1ctr.bf.dm1rqf        /*!<  */
#define	bCPU_DM1OVF         dm1ctr.bf.dm1ovf        /*!<  */

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8514
 */
extern	volatile	ui32_t	dm1src;
#define	ui32_CPU_DM1SRC	dm1src

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8518
 */
extern	volatile	ui32_t	dm1dst;
#define	ui32_CPU_DM1DST	dm1dst

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x851c
 */
extern	volatile	ui16_t	dm1cnt;
#define	ui16_CPU_DM1CNT	dm1cnt

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x851e
 */
extern	volatile	ui8_t	dm1cyc;
#define	ui8_CPU_DM1CYC	dm1cyc

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8520
 */
extern	volatile	union	TDM2CTR_tag{
	ui32_t	mem;
	struct{
		ui32_t	dm2bg:6;
		ui32_t	dm2sam:2;
		ui32_t	dm2dam:2;
		ui32_t	reserve0:1;
		ui32_t	dm2tm:2;
		ui32_t	dm2ut:2;
		ui32_t	reserve1:1;
		ui32_t	dm2ten:1;
		ui32_t	reserve2:7;
		ui32_t	dm2rqf:1;
		ui32_t	reserve3:3;
		ui32_t	dm2ovf:1;
		ui32_t	reserve4:3;
	}bf;
}dm2ctr;
#define	ui32_CPU_DM2CTR     dm2ctr.mem
#define	bCPU_DM2BG          dm2ctr.bf.dm2bg         /*!< DMA婲摦梫場 */
#define	bCPU_DM2SAM         dm2ctr.bf.dm2sam        /*!< 僜乕僗懁傾僪儗僢僔儞僌儌乕僪 */
#define	bCPU_DM2DAM         dm2ctr.bf.dm2dam        /*!< 僨僗僥傿僱乕僔儑儞懁傾僪儗僢僔儞僌儌乕僪 */
#define	bCPU_DM2TM          dm2ctr.bf.dm2tm         /*!< DMA揮憲儌乕僪 */
#define	bCPU_DM2UT          dm2ctr.bf.dm2ut         /*!< DMA揮憲扨埵 */
#define	bCPU_DM2TEN         dm2ctr.bf.dm2ten        /*!<  */
#define	bCPU_DM2RQF         dm2ctr.bf.dm2rqf        /*!<  */
#define	bCPU_DM2OVF         dm2ctr.bf.dm2ovf        /*!<  */

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8524
 */
extern	volatile	ui32_t	dm2src;
#define	ui32_CPU_DM2SRC	dm2src

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8528
 */
extern	volatile	ui32_t	dm2dst;
#define	ui32_CPU_DM2DST	dm2dst

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x852c
 */
extern	volatile	ui16_t	dm2cnt;
#define	ui16_CPU_DM2CNT	dm2cnt

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x852e
 */
extern	volatile	ui8_t	dm2cyc;
#define	ui8_CPU_DM2CYC	dm2cyc

/*!
 *	@name	DMA僐儞僩儘乕儔
 *	@brief	0x8530
 */
extern	volatile	union	TDM3CTR_tag{
	ui32_t	mem;
	struct{
		ui32_t	dm3bg:6;
		ui32_t	dm3sam:2;
		ui32_t	dm3dam:2;
		ui32_t	reserve0:1;
		ui32_t	dm3tm:2;
		ui32_t	dm3ut:2;
		ui32_t	reserve1:1;
		ui32_t	dm3ten:1;
		ui32_t	reserve2:7;
		ui32_t	dm3rqf:1;
		ui32_t	reserve3:3;
		ui32_t	dm3ovf:1;
		ui32_t	reserve4:3;
	}bf;
}dm3ctr;
#define	ui32_CPU_DM3CTR     dm3ctr.mem
#define	bCPU_DM3BG          dm3ctr.bf.dm3bg         /*!< DMA婲摦梫場 */
#define	bCPU_DM3SAM         dm3ctr.bf.dm3sam        /*!< 僜乕僗懁傾僪儗僢僔儞僌儌乕僪 */
#define	bCPU_DM3DAM         dm3ctr.bf.dm3dam        /*!< 僨僗僥傿僱乕僔儑儞懁傾僪儗僢僔儞僌儌乕僪 */
#define	bCPU_DM3TM          dm3ctr.bf.dm3tm         /*!< DMA揮憲儌乕僪 */
#define	bCPU_DM3UT          dm3ctr.bf.dm3ut         /*!< DMA揮憲扨埵 */
#define	bCPU_DM3TEN         dm3ctr.bf.dm3ten        /*!<  */
#define	bCPU_DM3RQF         dm3ctr.bf.dm3rqf        /*!<  */
#define	bCPU_DM3OVF         dm3ctr.bf.dm3ovf        /*!<  */

/*!
 *	@name	DMA僐儞僩儘乕儔