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📄 xemac_intr_dma.c

📁 powerpc405开发板的linux网口驱动程序
💻 C
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/* $Id: xemac_intr_dma.c,v 1.6 2006/12/05 13:23:01 mta Exp $ *//********************************************************************************       XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"*       AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND*       SOLUTIONS FOR XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE,*       OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,*       APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION*       THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,*       AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE*       FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY*       WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE*       IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR*       REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF*       INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS*       FOR A PARTICULAR PURPOSE.**       (c) Copyright 2003 Xilinx Inc.*       All rights reserved.*******************************************************************************//*****************************************************************************//**** @file xemac_intr_dma.c** Contains functions used in interrupt mode when configured with scatter-gather* DMA.** The interrupt handler, XEmac_IntrHandlerDma(), must be connected by the user* to the interrupt controller.** <pre>* MODIFICATION HISTORY:** Ver   Who  Date     Changes* ----- ---- -------- ---------------------------------------------------------* 1.00a rpm  07/31/01 First release* 1.00b rpm  02/20/02 Repartitioned files and functions* 1.00c rpm  12/05/02 New version includes support for simple DMA and the delay*                     argument to SgSend* 1.00c rpm  02/03/03 The XST_DMA_SG_COUNT_EXCEEDED return code was removed*                     from SetPktThreshold in the internal DMA driver. Also*                     avoided compiler warnings by initializing Result in the*                     interrupt service routines.* 1.00c rpm  03/26/03 Fixed a problem in the interrupt service routines where*                     the interrupt status was toggled clear after a call to*                     ErrorHandler, but if ErrorHandler reset the device the*                     toggle actually asserted the interrupt because the*                     reset had cleared it.* 1.00d rpm  09/26/03 New version includes support PLB Ethernet and v2.00a of*                     the packet fifo driver.* 1.00e rmm  04/06/04 Instead of invoking once for each packet received,*                     send/recv callbacks are invoked once for all packets.*                     Added functions XEmac_GetSgRecvFreeDesc() and XEmac_Get-*                     SgSendFreeDesc().* 1.01a ecm  09/01/05 Added DRE and Checksum Offload support through Control*                     words in instance which are set at initialization.* 1.01a xd   03/22/06 Fixed a multi-descriptor packet related bug that tx sgdma*                     engine is restarted in case no scatter gather disabled*                     bit is set yet* </pre>*******************************************************************************//***************************** Include Files *********************************/#include "xbasic_types.h"#include "xemac_i.h"#include "xio.h"#include "xbuf_descriptor.h"#include "xdma_channel.h"#include "xipif_v1_23_b.h"      /* Uses v1.23b of the IPIF *//************************** Constant Definitions *****************************//**************************** Type Definitions *******************************//***************** Macros (Inline Functions) Definitions *********************//************************** Variable Definitions *****************************//************************** Function Prototypes ******************************/static void HandleDmaRecvIntr(XEmac *InstancePtr);static void HandleDmaSendIntr(XEmac *InstancePtr);static void HandleEmacDmaIntr(XEmac *InstancePtr);/*****************************************************************************//**** Send an Ethernet frame using scatter-gather DMA. The caller attaches the* frame to one or more buffer descriptors, then calls this function once for* each descriptor. The caller is responsible for allocating and setting up the* descriptor. An entire Ethernet frame may or may not be contained within one* descriptor.  This function simply inserts the descriptor into the scatter-* gather engine's transmit list. The caller is responsible for providing mutual* exclusion to guarantee that a frame is contiguous in the transmit list. The* buffer attached to the descriptor must be 32-bit aligned if using the OPB* Ethernet core and 64-bit aligned if using the PLB Ethernet core.** The driver updates the descriptor with the device control register before* being inserted into the transmit list.  If this is the last descriptor in* the frame, the inserts are committed, which means the descriptors for this* frame are now available for transmission.** It is assumed that the upper layer software supplies a correctly formatted* Ethernet frame, including the destination and source addresses, the* type/length field, and the data field.  It is also assumed that upper layer* software does not append FCS at the end of the frame.** This call is non-blocking.  Notification of error or successful transmission* is done asynchronously through the send or error callback function.** @param InstancePtr is a pointer to the XEmac instance to be worked on.* @param BdPtr is the address of a descriptor to be inserted into the transmit*        ring.* @param Delay indicates whether to start the scatter-gather DMA channel*        immediately, or whether to wait. This allows the user to build up a*        list of more than one descriptor before starting the transmission of*        the packets, which allows the application to keep up with DMA and have*        a constant stream of frames being transmitted. Use XEM_SGDMA_NODELAY or*        XEM_SGDMA_DELAY, defined in xemac.h, as the value of this argument. If*        the user chooses to delay and build a list, the user must call this*        function with the XEM_SGDMA_NODELAY option or call XEmac_Start() to*        kick off the tranmissions.** @return** - XST_SUCCESS if the buffer was successfull sent* - XST_DEVICE_IS_STOPPED if the Ethernet MAC has not been started yet* - XST_NOT_SGDMA if the device is not in scatter-gather DMA mode* - XST_DMA_SG_LIST_FULL if the descriptor list for the DMA channel is full* - XST_DMA_SG_BD_LOCKED if the DMA channel cannot insert the descriptor into*   the list because a locked descriptor exists at the insert point* - XST_DMA_SG_NOTHING_TO_COMMIT if even after inserting a descriptor into the*   list, the DMA channel believes there are no new descriptors to commit. If*   this is ever encountered, there is likely a thread mutual exclusion problem*   on transmit.** @note** This function is not thread-safe. The user must provide mutually exclusive* access to this function if there are to be multiple threads that can call it.** @internal** A status that should never be returned from this function, although* the code is set up to handle it, is XST_DMA_SG_NO_LIST. Starting the device* requires a list to be created, and this function requires the device to be* started.*******************************************************************************/XStatus XEmac_SgSend(XEmac *InstancePtr, XBufDescriptor *BdPtr, int Delay){    XStatus Result;    Xuint32 BdControl;    XASSERT_NONVOID(InstancePtr != XNULL);    XASSERT_NONVOID(BdPtr != XNULL);    XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);    /*     * Be sure the device is configured for scatter-gather DMA, then be sure     * it is started.     */    if (!XEmac_mIsSgDma(InstancePtr))    {        return XST_NOT_SGDMA;    }    /*     * Set some descriptor control word defaults (source address increment     * and local destination address) and the destination address     * (the FIFO).  These are the same for every transmit descriptor.     */    BdControl = XBufDescriptor_GetControl(BdPtr);    XBufDescriptor_SetControl(BdPtr, BdControl | (InstancePtr->TxDmaControlWord));    /*     * If the TX channel has Checksum offload enabled, do not overwrite     * the Data in the destination address location, it is offload related     * not the actual address for the data to be written to     */    if ((InstancePtr->TxDmaControlWord & XDC_DMACR_CS_OFFLOAD_MASK) == 0)    {        XBufDescriptor_SetDestAddress(BdPtr,                    InstancePtr->BaseAddress + XEM_PFIFO_TXDATA_OFFSET);    }    /*     * Put the descriptor in the send list. The DMA component accesses data     * here that can also be modified in interrupt context, so a critical     * section is required.     */    XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);    Result = XDmaChannel_PutDescriptor(&InstancePtr->SendChannel, BdPtr);    if (Result != XST_SUCCESS)    {        XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);        return Result;    }    /*     * If this is the last buffer in the frame, commit the inserts and start     * the DMA engine if necessary     */    if (XBufDescriptor_IsLastControl(BdPtr))    {        Result = XDmaChannel_CommitPuts(&InstancePtr->SendChannel);        if (Result != XST_SUCCESS)        {            XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);            return Result;        }        if (Delay == XEM_SGDMA_NODELAY)        {            /*             * Start the DMA channel. Ignore the return status since we know the             * list exists and has at least one entry and we don't care if the             * channel is already started.  The DMA component accesses data here             * that can be modified at interrupt or task levels, so a critical             * section is required.             */            (void)XDmaChannel_SgStart(&InstancePtr->SendChannel);            (InstancePtr->SendChannel).Committed = XFALSE;        }    }    XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);    return XST_SUCCESS;}/*****************************************************************************//**** Add a descriptor, with an attached empty buffer, into the receive descriptor* list. The buffer attached to the descriptor must be 32-bit aligned if using* the OPB Ethernet core and 64-bit aligned if using the PLB Ethernet core.* This function is used by the upper layer software during initialization when* first setting up the receive descriptors, and also during reception of frames* to replace filled buffers with empty buffers. This function can be called* when the device is started or stopped. Note that it does start the scatter-* gather DMA engine.  Although this is not necessary during initialization, it* is not a problem during initialization because the MAC receiver is not yet* started.** The buffer attached to the descriptor must be aligned on both the front end* and the back end.** Notification of received frames are done asynchronously through the receive* callback function.** @param InstancePtr is a pointer to the XEmac instance to be worked on.* @param BdPtr is a pointer to the buffer descriptor that will be added to the*        descriptor list.** @return** - XST_SUCCESS if a descriptor was successfully returned to the driver* - XST_NOT_SGDMA if the device is not in scatter-gather DMA mode* - XST_DMA_SG_LIST_FULL if the receive descriptor list is full* - XST_DMA_SG_BD_LOCKED if the DMA channel cannot insert the descriptor into*   the list because a locked descriptor exists at the insert point.* - XST_DMA_SG_NOTHING_TO_COMMIT if even after inserting a descriptor into the*   list, the DMA channel believes there are no new descriptors to commit.** @internal** A status that should never be returned from this function, although* the code is set up to handle it, is XST_DMA_SG_NO_LIST. Starting the device* requires a list to be created, and this function requires the device to be* started.*******************************************************************************/XStatus XEmac_SgRecv(XEmac *InstancePtr, XBufDescriptor *BdPtr){    XStatus Result;    Xuint32 BdControl;    XASSERT_NONVOID(InstancePtr != XNULL);    XASSERT_NONVOID(BdPtr != XNULL);    XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);    /*     * Be sure the device is configured for scatter-gather DMA     */    if (!XEmac_mIsSgDma(InstancePtr))    {        return XST_NOT_SGDMA;    }    /*     * Set some descriptor control word defaults (destination address increment     * and local source address) and the source address (the FIFO). These are     * the same for every receive descriptor.     */    BdControl = XBufDescriptor_GetControl(BdPtr);    XBufDescriptor_SetControl(BdPtr, BdControl | (InstancePtr->RxDmaControlWord));    XBufDescriptor_SetSrcAddress(BdPtr,                      InstancePtr->BaseAddress + XEM_PFIFO_RXDATA_OFFSET);    /*     * Put the descriptor into the channel's descriptor list and commit.     * Although this function is likely called within interrupt context, there     * is the possibility that the upper layer software queues it to a task.     * In this case, a critical section is needed here to protect shared data     * in the DMA component.     */    XIIF_V123B_GINTR_DISABLE(InstancePtr->BaseAddress);    Result = XDmaChannel_PutDescriptor(&InstancePtr->RecvChannel, BdPtr);    if (Result != XST_SUCCESS)    {        XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);        return Result;    }    Result = XDmaChannel_CommitPuts(&InstancePtr->RecvChannel);    if (Result != XST_SUCCESS)    {        XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);        return Result;    }    /*     * Start the DMA channel. Ignore the return status since we know the list     * exists and has at least one entry and we don't care if the channel is     * already started. The DMA component accesses data here that can be     * modified at interrupt or task levels, so a critical section is required.     */    (void)XDmaChannel_SgStart(&InstancePtr->RecvChannel);    XIIF_V123B_GINTR_ENABLE(InstancePtr->BaseAddress);    return XST_SUCCESS;}/*****************************************************************************//**** The interrupt handler for the Ethernet driver when configured with scatter-

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