xuartns550_options.c

powerpc405下linux的串口驱动程序

     */
    XASSERT_NONVOID(InstancePtr != XNULL);
    XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);

    /* Read the value of the FIFO control register so that the threshold
     * can be retrieved, this read takes special register processing
     */
    FcrRegister = ReadFcrRegister(InstancePtr->BaseAddress);

    /* Return only the trigger level from the register value */

    return FcrRegister & XUN_FIFO_RX_TRIGGER;
}

/****************************************************************************/
/**
*
* This functions sets the receive FIFO trigger level. The receive trigger
* level specifies the number of bytes in the receive FIFO that cause a receive
* data event (interrupt) to be generated. The FIFOs must be enabled to set the
* trigger level.
*
* @param    InstancePtr is a pointer to the XUartNs550 instance to be worked on.
* @param    TriggerLevel contains the trigger level to set. Constants which
*           define each trigger level are contained in the file xuartns550.h
*           and named XUN_FIFO_TRIGGER_*.
*
* @return
*
* - XST_SUCCESS if the trigger level was set
* - XST_UART_CONFIG_ERROR if the trigger level could not be set, either the
*   hardware does not support the FIFOs or FIFOs are not enabled
*
* @note
*
* None.
*
*****************************************************************************/
XStatus XUartNs550_SetFifoThreshold(XUartNs550 *InstancePtr,
                                    Xuint8 TriggerLevel)
{
    Xuint8 FcrRegister;

    /*
     * Assert validates the input arguments
     */
    XASSERT_NONVOID(InstancePtr != XNULL);
    XASSERT_NONVOID((TriggerLevel == XUN_FIFO_TRIGGER_14)  ||
                    (TriggerLevel == XUN_FIFO_TRIGGER_08)  ||
                    (TriggerLevel == XUN_FIFO_TRIGGER_04)  ||
                    (TriggerLevel == XUN_FIFO_TRIGGER_01));
    XASSERT_NONVOID(InstancePtr->IsReady == XCOMPONENT_IS_READY);

    /* Read the value of the FIFO control register, this read takes special
     * register processing
     */
    FcrRegister = ReadFcrRegister(InstancePtr->BaseAddress);

    /* If the FIFO control register indicates that FIFOs are disabled,
     * then either they are just disabled or it has no FIFOs, return an error
     */
    if ((FcrRegister & XUN_FIFO_ENABLE) == 0)
    {
        return XST_UART_CONFIG_ERROR;
    }

    /* Set the receive FIFO trigger level by clearing out the old level in
     * the FIFO control register and writing in the new level
     */
    FcrRegister &= ~XUN_FIFO_RX_TRIGGER;
    FcrRegister |= TriggerLevel;

    /* Write the new value for the FIFO control register to it such that the
     * threshold is changed, writing to it is normal unlike reading from it
     */
    XIo_Out8(InstancePtr->BaseAddress + XUN_FCR_OFFSET, FcrRegister);

    return XST_SUCCESS;
}

/****************************************************************************/
/**
*
* This function returns the last errors that have occurred in the specified
* UART. It also clears the errors such that they cannot be retrieved again.
* The errors include parity error, receive overrun error, framing error, and
* break detection.
*
* The last errors is an accumulation of the errors each time an error is
* discovered in the driver. A status is checked for each received byte and
* this status is accumulated in the last errors.
*
* If this function is called after receiving a buffer of data, it will indicate
* any errors that occurred for the bytes of the buffer. It does not indicate
* which bytes contained errors.
*
* @param    InstancePtr is a pointer to the XUartNs550 instance to be worked on.
*
* @return
*
* The last errors that occurred. The errors are bit masks that are contained
* in the file xuartns550.h and named XUN_ERROR_*.
*
* @note
*
* None.
*
*****************************************************************************/
Xuint8 XUartNs550_GetLastErrors(XUartNs550 *InstancePtr)
{
    Xuint8 Temp = InstancePtr->LastErrors;

    /*
     * Assert validates the input arguments
     */
    XASSERT_NONVOID(InstancePtr != XNULL);

    /* Clear the last errors and return the previous value */

    InstancePtr->LastErrors = 0;

    /* Only return the bits that are reported errors which include
     * receive overrun, framing, parity and break detection, the last errors
     * variable holds an accumulation of the line status register bits which
     * have been set
     */
    return Temp & XUN_LSR_ERROR_BREAK;
}

/****************************************************************************/
/**
*
* This function gets the modem status from the specified UART. The modem
* status indicates any changes of the modem signals. This function allows
* the modem status to be read in a polled mode. The modem status is updated
* whenever it is read such that reading it twice may not yield the same
* results.
*
* @param    InstancePtr is a pointer to the XUartNs550 instance to be worked on.
*
* @return
*
* The modem status which are bit masks that are contained in the file
* xuartns550.h and named XUN_MODEM_*.
*
* @note
*
* The bit masks used for the modem status are the exact bits of the modem
* status register with no abstraction.
*
*****************************************************************************/
Xuint8 XUartNs550_GetModemStatus(XUartNs550 *InstancePtr)
{
    Xuint8 ModemStatusRegister;

    /*
     * Assert validates the input arguments
     */
    XASSERT_NONVOID(InstancePtr != XNULL);

    /* Read the modem status register to return
     */
    ModemStatusRegister = XIo_In8(InstancePtr->BaseAddress +
                                  XUN_MSR_OFFSET);
    return ModemStatusRegister;
}

/****************************************************************************/
/**
*
* This function determines if the specified UART is sending data. If the
* transmitter register is not empty, it is sending data.
*
* @param    InstancePtr is a pointer to the XUartNs550 instance to be worked on.
*
* @return
*
* A value of XTRUE if the UART is sending data, otherwise XFALSE.
*
* @note
*
* None.
*
*****************************************************************************/
Xboolean XUartNs550_IsSending(XUartNs550 *InstancePtr)
{
    Xuint8 LsrRegister;

    /*
     * Assert validates the input arguments
     */
    XASSERT_NONVOID(InstancePtr != XNULL);

    /* Read the line status register to determine if the transmitter is
     * empty
     */
    LsrRegister = XIo_In8(InstancePtr->BaseAddress + XUN_LSR_OFFSET);

    /* If the transmitter is not empty then indicate that the UART is still
     * sending some data
     */
    return ((LsrRegister & XUN_LSR_TX_EMPTY) == 0);
}

/****************************************************************************/
/**
*
* This functions reads the FIFO control register. It's primary purpose is to
* isolate the special processing for reading this register. It is necessary
* to write to the line control register, then read the FIFO control register,
* and then restore the line control register.
*
* @param    BaseAddress contains the base address of the registers in the
*           device.
*
* @return
*
* The contents of the FIFO control register.
*
* @note
*
* None.
*
*****************************************************************************/
static Xuint8 ReadFcrRegister(Xuint32 BaseAddress)
{
    Xuint8 LcrRegister;
    Xuint8 FcrRegister;
    Xuint8 IerRegister;

    /*
     * Enter a critical section here by disabling Uart interrupts.  We do
     * not want to receive an interrupt while we have the FCR latched since
     * the interrupt handler may want to read the IIR.
     */
    IerRegister = XIo_In8(BaseAddress + XUN_IER_OFFSET);
    XIo_Out8(BaseAddress + XUN_IER_OFFSET, 0);

    /* Get the line control register contents and set the divisor latch
     * access bit so the FIFO control register can be read, this can't
     * be done with a true 16550, but is a feature in the Xilinx device
     */
    LcrRegister = XIo_In8(BaseAddress + XUN_LCR_OFFSET);
    XIo_Out8(BaseAddress + XUN_LCR_OFFSET, LcrRegister | XUN_LCR_DLAB);

    /* Read the FIFO control register so it can be returned */

    FcrRegister = XIo_In8(BaseAddress + XUN_FCR_OFFSET);

    /* Restore the line control register to it's original contents such
     * that the DLAB bit is no longer set and return the register
     */
    XIo_Out8(BaseAddress + XUN_LCR_OFFSET, LcrRegister);

    /*
     * Exit the critical section by restoring the IER
     */
    XIo_Out8(BaseAddress + XUN_IER_OFFSET, IerRegister);

    return FcrRegister;
}