l2_dmac.c

凌阳MP3 spSPCA755yuanma

/*++

Copyright (c) 2001 Sunplus Technology Co., Ltd.

Module Name:

        L2_dmac.c

Abstract:

        Module related to L2 DMAC functions

Environment:

        Keil C51 Compiler

Revision History:

        11/12/2001      WZH    created                 

--*/
//=============================================================================
//Header file
//=============================================================================
#include "general.h"

//=============================================================================
//Symbol
//=============================================================================
//-----------------------------------------------------------------------------
//Constant
//-----------------------------------------------------------------------------

//-----------------------------------------------------------------------------
//Variable
//-----------------------------------------------------------------------------

//=============================================================================
//Program       
//=============================================================================

//-----------------------------------------------------------------------------
//L2_DoDMA
//-----------------------------------------------------------------------------
/* 
routine description:
        DMA data transfer, the source and the desitination cannot be the same
arguments:
        Src: the source of DMA
                0: DRAM -- No Used !!
                1: CPU 4K SRAM (0x1000 ~ 0x1FFF)
                2: Storage Media
                3: Audio -->> USB Host !!
                4: USB
                5: DMA data port (0x2300)
        Dst: the destination of DMA
                0: DRAM--No Used !!
                1: CPU 4K SRAM (0x1000 ~ 0x1FFF)
                2: Storage Media
                3: Audio -->> USB Host !!
                4: USB
                5: DMA data port (0x2300)
        nByte: the number of byte in the DMA data transfer (tha maximum size is 1024)
        Mode: 
                0: the function return after the DMA is completed
                1: the function return immediately after the DMA is trigger (SRAM client is restricted)
        FlashPageDMA
                0: normal operation
                1: if flash is one of the DMA source/destination, flash accessing is always in the unit of page
                        the insufficent data is stuffing by 0's
return value:
        0x00   - success
        others - error
*/
UCHAR L2_DoDMA(UCHAR Src,UCHAR Dst, USHORT nByte, UCHAR Mode, UCHAR FlashPageDMA) USING_0
{
    data UCHAR sramflag; 	// WWWW
	data UCHAR dmamode;	// WWWW

        //PRINT_L2("        L2_DoDMA: Enter L2_DoDMA(Src=%x,Dst=%x,nByte=%x,Mode=%x,FlashPageDMA=%x)\n",(USHORT)Src,(USHORT)Dst,nByte,(USHORT)Mode,(USHORT)FlashPageDMA);

		nByte = nByte - 1;
        dmamode = Mode;

		XBYTE[0x2301] = (Dst<<4)|Src;

        XBYTE[0x2304] = 0x09;                                // reset DMA machine
		XBYTE[0x2304] = 0x08;
        XBYTE[0x23C0] = 0x00;

        if(FlashPageDMA)   
			XBYTE[0x2304] |= 0x02;            // padding 0's to flash
		else
		    XBYTE[0x2304] &= 0xfd;

		if((nByte>>10)!=0) return 0x01;                      // DMA size

	        XBYTE[0x2302] = (UCHAR)nByte&0xff;
			XBYTE[0x2303] = (UCHAR)(nByte>>8)&0x03;

		sramflag = 0;
        if(Src==0x01 || Dst==0x01)
        {
			#if (K_CHIP_SET == K_CHIP_533)
                XBYTE[0x2C00] &= 0x1d;
                XBYTE[0x2C11]  = 0x02;
                XBYTE[0x2C00] |= 0x02;
        	#elif (K_CHIP_SET == K_CHIP_8591)
                XBYTE[0x2100] &= 0x1d;
                XBYTE[0x2111]  = 0x02;
                XBYTE[0x2100] |= 0x02;
			#endif

	        sramflag = 1;
        }

        XBYTE[0x23B0] = 0x01;                                // trigger DMA

	if(dmamode) return L2K_SUCCESS;
	else while(XBYTE[0x23C0]==0) ;                       // wait for DMA complete

	XBYTE[0x23C0] = 0x00;
        if(sramflag == 1)
        {
			#if (K_CHIP_SET == K_CHIP_533)
                XBYTE[0x2C00] &= 0x1d;
                XBYTE[0x2C11]  = 0x00;
                XBYTE[0x2C00] |= 0x02;
        	#elif (K_CHIP_SET == K_CHIP_8591)
                XBYTE[0x2100] &= 0x1d;
                XBYTE[0x2111]  = 0x00;
                XBYTE[0x2100] |= 0x02;
			#endif
        }

    //PRINT_L2("        L2_DoDMA: Exit L2_DoDMA\n");
    return L2K_SUCCESS;
}

// 110102@wyeo
#if 0
//-----------------------------------------------------------------------------
//L2_ResetDMA
//-----------------------------------------------------------------------------
/* 
routine description:
        Reset DMA controller 
*/
void L2_ResetDMA(void) USING_0
{
        //PRINT_L2("        L2_ResetDMA: Enter L2_ResetDMA\n");

        XBYTE[0x2310] = 0x10;
        XBYTE[0x2304] = 0x09;    
		XBYTE[0x2304] = 0x08;

        //PRINT_L2("        L2_ResetDMA: Exit L2_ResetDMA\n");
}

//-----------------------------------------------------------------------------
//L2_CheckDMACmp
//-----------------------------------------------------------------------------
/* 
routine description:
        Check whether DMA is complete.
        If DMA is completed, clear the flag and report
arguments:
        Cmp:
                0: DMA is not completed
                1: DMA is completed
*/
void L2_CheckDMACmp(UCHAR* Cmp) USING_0
{
        //PRINT_L2("        L2_CheckDMACmp: Enter L2_CheckDMACmp\n");

        *Cmp = XBYTE[0x23C0];
        if(*Cmp) XBYTE[0x23C0] = 0x00; 

        //PRINT_L2("        L2_CheckDMACmp: Exit L2_CheckDMACmp\n");
}
#endif

//-----------------------------------------------------------------------------
//L2_SetSRAMDMA
//-----------------------------------------------------------------------------
/* 
routine description:
        SRAM DMA setting
arguments:
        SRAMAddr: 4K SRAM buffer, starting address (0x0000 - 0x0FFF)
return value:
        0x00   - success
        others - error
*/
UCHAR L2_SetSRAMDMA(USHORT SRAMAddr) USING_0
{
        //PRINT_L2("        L2_SetSRAMDMA: Enter L2_SetSRAMDMA(SRAMAddr=%x)\n",SRAMAddr);
        if((SRAMAddr & 0xF000)!=0) return 0x01 ;

		#if (K_CHIP_SET == K_CHIP_533)
	        XBYTE[0x2C12] = (UCHAR)SRAMAddr&0xFF;
    	    XBYTE[0x2C13] = (UCHAR)(SRAMAddr>>8)&0x0F;    
			XBYTE[0x2C11] |= 0x04;
			XBYTE[0x2C11] &= 0xFB;
       	#elif (K_CHIP_SET == K_CHIP_8591)
	        XBYTE[0x2112] = (UCHAR)SRAMAddr&0xFF;
    	    XBYTE[0x2113] = (UCHAR)(SRAMAddr>>8)&0x0F;    
			XBYTE[0x2111] |= 0x04;
			XBYTE[0x2111] &= 0xFB;
		#endif

        //PRINT_L2("        L2_SetSRAMDMA: Exit L2_SetSRAMDMA\n");

        return L2K_SUCCESS;
}

//-----------------------------------------------------------------------------
//L2_SetUSBDMA
//-----------------------------------------------------------------------------
/* 
routine description:
        USB DMA setting
arguments:
        USBDMASrc: 
                0: endpoint 3
                1: endpoint 8
        USBDMADst:
                0: endpoint 2
                1: endpoint 4
                2: endpoint 7
                3: endpoint 9
return value:
  0x00	 - success
  others - error
*/
UCHAR L2_SetUSBDMA(UCHAR USBDMASrc, UCHAR USBDMADst) USING_0
{
        //PRINT_L2("        L2_SetUSBDMA: Enter L2_SetUSBDMA(USBDMASrc=%x,USBDMADst=%x)\n",(USHORT)USBDMASrc,(USHORT)USBDMADst);
	
	XBYTE[0x2510] = USBDMASrc;
	XBYTE[0x2511] = USBDMADst;

        //PRINT_L2("        L2_SetUSBDMA: Exit L2_SetUSBDMA\n");

        return L2K_SUCCESS;
}