📄 l1_storage.c
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if (i != 0)
{
//check CF status register not busy and ready
Ready = 0x00;
while ((Ready & 0xc0) != 0x40)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
if (i == 256)
{
Scnt = 0;
}
else
{
Scnt = (UCHAR)i;
}
// Write command
L2_CFComMemWr(0x00,0x02,Scnt); // SecCnt
L2_CFComMemWr(0x00,0x03,SecNum); // SecNu
L2_CFComMemWr(0x00,0x04,CylLow); // CylLow
L2_CFComMemWr(0x00,0x05,CylHigh); // CylHigh
L2_CFComMemWr(0x00,0x06,Haddr); // Logical addrss
// Write Sector command
L2_CFComMemWr(0x00,0x07,0x31);
// DMA
for (tmp = 0; tmp < i ; tmp++)
{
Ready = 0x00;
while (Ready != 0x58)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
/* Chamber PA8591
if (Src == 0)
{
L2_SetDRAMDMA(dramaddr);
}
*/
L2_CFSetMemA(0x00,0x00);
//richie@mi 0411 mark
//L2_DoDMA(Src,2,SecSize,0,0);
//richie@mi 0411 begin
if (Src != K_DMA_USB)
{ // sync mode
L2_DoDMA(Src,2,SecSize,0,0);
}
else
{
UCHAR bi;
// async mode
L2_DoDMA(Src,2,SecSize,1,0);
for (bi=0;bi<8;bi++)
{
while (XBYTE[K_USB_CLASS_OUT_BUF_SIZE] > 0) ; //wait for 0 in bulk buffer
XBYTE[0x25a1] = K_USB_CLASS_OUT_OPEN;//0x02;//open bulk out
while ((XBYTE[0x25c2] & K_USB_CLASS_OUT_ACK_MASK) == 0) ; //wait pc ack
XBYTE[0x25c2] = XBYTE[0x25c2] & K_USB_CLASS_OUT_ACK_RESET;//reset 0x25c2
}
while (XBYTE[K_USB_CLASS_OUT_BUF_SIZE] > 0) ; //wait for 0 in bulk buffer
}
//richie@mi 0411 end
//check CF status register not busy and ready
Ready = 0x00;
while ((Ready & 0xc0) != 0x40)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
if (Src == 0)
{
dramaddr += (ULONG)(SecSize >> 1);
}
}
//check CF status register not busy and ready
Ready = 0x00;
while ((Ready & 0xc0) != 0x40)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
}
return TRUE;
}
//-----------------------------------------------------------------------------
//L1_DMARdCFMEM
//-----------------------------------------------------------------------------
/*
routine description:
DMA read data from CF card in memory mode
arguments:
Dst: the destination of DMA
0: DRAM
1: CPU 4K SRAM (0x1000 ~ 0x1FFF)
2: forbidden (flash itself)
3: Audio
4: USB
5: DMA data port (0x2300)
CylHigh: CF card register: cylinder high
CylLow: CF card register: cylinder low
SecNum: CF card register: sector number
SecSize: the number of byte in a sector
SecCnt: the number of sector
return value:
0x00 - success
others - error
*/
//ada@0312
UCHAR L1_DMARdCFMEM(UCHAR Dst, UCHAR HS, UCHAR CylHigh, UCHAR CylLow, UCHAR SecNum, ULONG SecCnt, USHORT SecSize) USING_0
{
UCHAR Ready;
UCHAR Haddr;
UCHAR Scnt;
USHORT tmp;
ULONG dramaddr;
ULONG i;
/*
if (Dst == 0)
{
L2_ReadDRAMDMAAdr(&dramaddr);
}
*/
// check interface ready
Ready = 0x00;
while ((Ready & 0x01) != 0x00)
{
L2_CFCheckRdy(&Ready);
}
Haddr = 0xE0 | (HS & 0x0F);
for (i = SecCnt; i > 256 ; i = (i - 256))
{
//check CF status register not busy and ready
Ready = 0x00;
while ((Ready & 0xc0) != 0x40)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
// Write command
L2_CFComMemWr(0x00,0x02,0); // SecCnt
L2_CFComMemWr(0x00,0x03,SecNum); // SecNu
L2_CFComMemWr(0x00,0x04,CylLow); // CylLow
L2_CFComMemWr(0x00,0x05,CylHigh); // CylHigh
L2_CFComMemWr(0x00,0x06,Haddr); // Logical addrss
// Write Sector command
L2_CFComMemWr(0x00,0x07,0x21);
// DMA
for (tmp = 0; tmp < 256 ; tmp++)
{
Ready = 0x00;
while (Ready != 0x58)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
/* Chamber PA8591
if (Dst == 0)
{
L2_SetDRAMDMA(dramaddr);
}
*/
L2_CFSetMemA(0x00,0x00);
//richie@mi 0409 begin
//sss mark
//L2_DoDMA(2,Dst,SecSize,0,0);
//sss begin
if (Dst != K_DMA_USB)
{
// sync mode
L2_DoDMA(2,Dst,SecSize,0,0);
}
else
{
UCHAR bi;
// async mode
L2_DoDMA(2,Dst,SecSize,1,0);
for (bi=0;bi<8;bi++)
{
while (XBYTE[K_USB_CLASS_IN_BUF_SIZE] < 64) ; //wait for 64 in bulk buffer
XBYTE[0x25a1] = K_USB_CLASS_IN_OPEN;//0x01;//open bulk in
while ((XBYTE[0x25c2] & K_USB_CLASS_IN_ACK_MASK) == 0) ; //wait pc ack
XBYTE[0x25c2] = XBYTE[0x25c2] & K_USB_CLASS_IN_ACK_RESET;//reset 0x25c2
}
}
//sss end
//richie@mi 0409 end
//check CF status register not busy and ready
Ready = 0x00;
while ((Ready & 0xc0) != 0x40)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
if (Dst == 0)
{
dramaddr += (ULONG)(SecSize >> 1);
}
}
if ((CylLow == 255) && (CylHigh == 255))
{
Haddr++;
CylHigh = 0x00;
CylLow = 0x00;
}
else
{
if (CylLow == 255)
{
CylHigh++;
CylLow = 0x00;
}
else
{
CylLow++;
}
}
}
if (i != 0)
{
//check CF status register not busy and ready
Ready = 0x00;
while ((Ready & 0xc0) != 0x40)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
if (i == 256)
{
Scnt = 0;
}
else
{
Scnt = (UCHAR)i;
}
// Write command
L2_CFComMemWr(0x00,0x02,Scnt); // SecCnt
L2_CFComMemWr(0x00,0x03,SecNum); // SecNu
L2_CFComMemWr(0x00,0x04,CylLow); // CylLow
L2_CFComMemWr(0x00,0x05,CylHigh); // CylHigh
L2_CFComMemWr(0x00,0x06,Haddr); // Logical addrss
// Write Sector command
L2_CFComMemWr(0x00,0x07,0x21);
// DMA
for (tmp = 0; tmp < i; tmp++)
{
Ready = 0x00;
while (Ready != 0x58)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
/* Chamber PA8591
if (Dst == 0)
{
L2_SetDRAMDMA(dramaddr);
}
*/
L2_CFSetMemA(0x00,0x00);
//richie@mi 0409 begin
//sss mark
//L2_DoDMA(2,Dst,SecSize,0,0);
//sss begin
if (Dst != K_DMA_USB)
{
// sync mode
L2_DoDMA(2,Dst,SecSize,0,0);
}
else
{
UCHAR bi;
// async mode
L2_DoDMA(2,Dst,SecSize,1,0);
for (bi=0;bi<8;bi++)
{
while (XBYTE[K_USB_CLASS_IN_BUF_SIZE] < 64) ; //wait for 64 in bulk buffer
XBYTE[0x25a1] = K_USB_CLASS_IN_OPEN;//0x01;//open bulk in
while ((XBYTE[0x25c2] & K_USB_CLASS_IN_ACK_MASK) == 0) ; //wait pc ack
XBYTE[0x25c2] = XBYTE[0x25c2] & K_USB_CLASS_IN_ACK_RESET;//reset 0x25c2
}
}
//sss end
//richie@mi 0409 end
//check CF status register not busy and ready
Ready = 0x00;
while ((Ready & 0xc0) != 0x40)
{
L2_CFComMemRd(0x00,0x07,&Ready);
}
if (Dst == 0)
{
dramaddr += (ULONG)(SecSize >> 1);
}
}
}
return TRUE;
}
#endif
#if (SD)
//-----------------------------------------------------------------------------
//L1_SDIdentification
//-----------------------------------------------------------------------------
// input paremeters:
// BlockSize - data length of one block
// return value:
// 0x00 - No error
// 0x01 - CMD55 error
// 0x02 - ACMD41 error
// 0x03 - CMD2 error
// 0x04 - CMD3 error
// 0x05 - CMD9 error
// 0x06 - ACMD51 error
// 0x07 - CRC16 error
UCHAR L1_SDIdentification(USHORT BlockSize) USING_0 //ada@0219
{
UCHAR CmdBuf[5];
UCHAR RspBuf[17];
UCHAR i,error;
UCHAR READ_BL_LEN;
USHORT BLOCK_LEN;
USHORT C_SIZE;
UCHAR C_SIZE_MULT;
USHORT MULT;
ULONG BLOCKNR;
//PRINT_L1("Enter Idnetification\n");
L2_FlashMode(5, 1, 1);
L2_SDInit();
L2_SDConfig(3,0); //375KHz,1 bit bus
L2_SDBlockSize(BlockSize);
for(i=0; i<100; i++)
{ // Tx 80 clock for power on sequence
L2_SDTxDummy();
}
CmdBuf[0] = 0x40;
CmdBuf[1] = 0x00;
CmdBuf[2] = 0x00;
CmdBuf[3] = 0x00;
CmdBuf[4] = 0x00;
L2_SDTxCommand(CmdBuf); // Tx "CMD0"
L2_SDTxDummy();
do{
CmdBuf[0] = 0x77;
CmdBuf[1] = 0x00;
CmdBuf[2] = 0x00;
CmdBuf[3] = 0x00;
CmdBuf[4] = 0x00;
L2_SDTxCommand(CmdBuf); // TX "CMD55"
error=L2_SDRxResponse(RspBuf,0,1);
if(error!=0) return 0x01;
if(RspBuf[0]!=0x37) return 0x01; // check the response number
CmdBuf[0] = 0x69;
CmdBuf[1] = 0x00;
CmdBuf[2] = 0x04;
CmdBuf[3] = 0x00;
CmdBuf[4] = 0x00;
L2_SDTxCommand(CmdBuf); // TX "ACMD41"
error=L2_SDRxResponse(RspBuf,0,1);
if(RspBuf[0]!=0x3f) return 0x02; // check the response number
} while((RspBuf[1] & 0x80)==0);
// get card's OCR register
// for(i=0; i<4; i++) SD_OCR[i] = RspBuf[i+1];
CmdBuf[0] = 0x42;
CmdBuf[1] = 0x00;
CmdBuf[2] = 0x00;
CmdBuf[3] = 0x00;
CmdBuf[4] = 0x00;
L2_SDTxCommand(CmdBuf); // TX "CMD2"
error=L2_SDRxResponse(RspBuf,1,1);
if(RspBuf[0]!=0x3f) return 0x03; // check if response number
// get card's CID register
for(i=0; i<16; i++) SD_CID[i] = RspBuf[i+1];
CmdBuf[0] = 0x43;
CmdBuf[1] = 0x00;
CmdBuf[2] = 0x00;
CmdBuf[3] = 0x00;
CmdBuf[4] = 0x00;
L2_SDTxCommand(CmdBuf); // TX "CMD3"
error=L2_SDRxResponse(RspBuf,0,1);
if(error!=0) return 0x04;
if(RspBuf[0]!=0x03) return 0x04; // check the response number
// get card's RCA register
SD_RCA[0]=RspBuf[1];
SD_RCA[1]=RspBuf[2];
CmdBuf[0] = 0x49;
CmdBuf[1] = SD_RCA[0];
CmdBuf[2] = SD_RCA[1];
CmdBuf[3] = 0x00;
CmdBuf[4] = 0x00;
L2_SDTxCommand(CmdBuf); // TX "CMD9"
error=L2_SDRxResponse(RspBuf,1,1);
if(RspBuf[0]!=0x3f) return 0x05; // check the response number
// get card's CSD register
for(i=0; i<16; i++) SD_CSD[i] = RspBuf[i+1];
// //DbgPrint("SD card READ_BL_LEN = %bx\n",SD_CSD[5] & 0x0f);
READ_BL_LEN = SD_CSD[5] & 0x0f;
BLOCK_LEN = 0x0001 << READ_BL_LEN;
// //DbgPrint("BLOCK_LEN = %x\n",BLOCK_LEN);
SD_BlockSize = BLOCK_LEN;
// //DbgPrint("SD card C_SIZE = %x\n",(((USHORT)SD_CSD[6]) << 10) | ((USHORT)SD_CSD[7] << 2) | ((USHORT)SD_CSD[8] >> 6));
C_SIZE = (((USHORT)SD_CSD[6]) << 10) | ((USHORT)SD_CSD[7] << 2) | ((USHORT)SD_CSD[8] >> 6);
// //DbgPrint("SD card C_SIZE_MULT = %bx\n",((SD_CSD[9] & 0x03) << 1) | (SD_CSD[10] >> 7));
C_SIZE_MULT = ((SD_CSD[9] & 0x03) << 1) | (SD_CSD[10] >> 7);
MULT = 0x0001 << (C_SIZE_MULT + 2);
// //DbgPrint("MULT = %x\n",MULT);
BLOCKNR = (ULONG)(C_SIZE + 1) * (ULONG)MULT;
// //DbgPrint("BLOCKNR = %lx\n",BLOCKNR);
G_Card_TotalCardSize = BLOCKNR * (ULONG)BLOCK_LEN;
// //DbgPrint("G_Card_TotalCardSize = %lx\n",G_Card_TotalCardSize);
L2_SDConfig(0,0); // 24MHz, 1bit bus mode
//PRINT_L1("Exit Idnetification\n");
return 0x00;
}
//-----------------------------------------------------------------------------
//L1_SDCheckState
//-----------------------------------------------------------------------------
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