📄 l2.h
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/*++
Copyright (c) 2001 Sunplus Technology Co., Ltd.
Module Name:
L2.h
Abstract:
Header file related to L2 functions
Environment:
Keil C51 Compiler
Revision History:
11/12/2001 bu210 created
--*/
//-----------------------------------------------------------------------------
// Header file
//-----------------------------------------------------------------------------
#include "device.h"
#include "option.h"
//-----------------------------------------------------------------------------
// Data type
//-----------------------------------------------------------------------------
// date
struct DATESTC
{
UCHAR Year;
UCHAR Month;
UCHAR Day;
UCHAR Hour;
UCHAR Minute;
UCHAR Second;
};
//------------------------------------------------------------------------------
//Constant
//------------------------------------------------------------------------------
#define L2K_SUCCESS 0x00
#define L2K_ERROR_GENERAL 0x01
#define L2K_ERROR_PARAMETER 0x02
#define L2K_CPUInternal 0x01 // 0 is for external ICE
// 1 is for internal 8051
#define L2K_CPUP1 0x01 // 0 is for low byte address
// 1 is for 8051 GPIO P1
#define L2K_P1OE 0xff
#define L2K_P3OE 0x3e // P3o is input for RXD
/*#define K_Q50 0x00 //ada@0225
#define K_Q70 0x01
#define L2K_Q80 0x02
#define L2K_Q85 0x03
#define L2K_Q88 0x04
#define L2K_Q90 0x05
#define L2K_Q92 0x06
#define L2K_Q95 0x07
#define L2K_Q1 0xff*/
#define L2K_DateWhite 0x00
#define L2K_DateYellow 0x01
#define L2K_DateCyan 0x02
#define L2K_DateGreen 0x03
#define L2K_DateMagenta 0x04
#define L2K_DateRed 0x05
#define L2K_DateBlue 0x06
#define L2K_DateBlack 0x07
//GLOBAL
#define PPG struct PGSTC *
#define PDATE struct DATESTC *
// for test flash only
#ifdef TestModeEn
#define L2K_FMactType 0x03 // 0:GPIOs 1:NAND 2:SMC 3:CF(IDE) 4:CF(MEM) 5:SD 6:MMC 7:SPI 8:NX
#define L2K_FMinactType 0x01 // 0:Only one flash 1:NAND 2:SMC 3:CF(IDE) 4:CF(MEM) 5:SD 6:MMC 7:SPI 8:NX
#define L2K_FMSize 0x40 // 64M bytes
#define L2K_FMPageSize 0x01 // 0:256 bytes/page 1:512 bytes/page 2:1024 bytes/page
#endif
#define L2K_DSP24MIPS 0x01
#define L2K_DSP30MIPS 0x02
#define L2K_DSP36MIPS 0x03
#define L2K_DSP42MIPS 0x04
//-----------------------------------------------------------------------------
// RS232 debug define
//-----------------------------------------------------------------------------
//WMP3
#if (SIMULATE == 1)
#define INIT_RS232
#else
#if (K_CHIP_SET == K_CHIP_533)
#define INIT_RS232 { \
UCHAR revid; \
XBYTE[0x2C03]|=0x02; \
XBYTE[0x2024] = 0x01; \
SCON0 = 0x50; \
PCON |= 0x80; \
TMOD |= 0x20; \
TH1 = 0xF3; \
TR1 = 1; \
TI = 1; \
L2_ReadRevID(&revid); \
if(revid==0) DbgPrint("\nSPCA533A debug environment is establised successfully!\n"); \
else if(revid==1) DbgPrint("\nSPCA533B debug environment is establised successfully!\n"); \
else if(revid==2) DbgPrint("\nSPCA533C debug environment is establised successfully!\n"); \
else DbgPrint("\nSPCA533 debug environment is establised successfully!\n"); \
}
#elif (K_CHIP_SET == K_CHIP_8591)
// 110102@wyeo, start
#if (CODE_RELEASE == 1)
#define INIT_RS232
#elif (CODE_RELEASE == 2)
#define INIT_RS232 { \
UCHAR revid; \
XBYTE[0x2103]|=0x02; \
XBYTE[0x2024] =0x02; \
SCON0 = 0x50; \
PCON |= 0x80; \
TMOD |= 0x20; \
TH1 = 0xF3; \
TR1 = 1; \
TI = 1; \
L2_ReadRevID(&revid); \
}
#else
// end
#define INIT_RS232 { \
UCHAR revid; \
XBYTE[0x2103]|=0x02; \
XBYTE[0x2024] =0x02; \
SCON0 = 0x50; \
PCON |= 0x80; \
TMOD |= 0x20; \
TH1 = 0xF3; \
TR1 = 1; \
TI = 1; \
L2_ReadRevID(&revid); \
if(revid==0) DbgPrint("\nPA8591A debug environment is establised successfully!\n"); \
else if(revid==1) DbgPrint("\nPA8591B debug environment is establised successfully!\n"); \
else if(revid==2) DbgPrint("\nPA8591C debug environment is establised successfully!\n"); \
else DbgPrint("\nPA8591 debug environment is establised successfully!\n"); \
}
#endif
#endif // 110102@wyeo
#endif
#define PRINT_L2 printf
#define SLASH2 /
#ifdef DEBUG_FRONT
#define PRINT_FRONT printf
#else
#define PRINT_FRONT ;/SLASH2
#endif
/**************************
* SP8051 CONTROL REGISTER *
**************************/
#define REG_DSP_RESET 0x2002 // reg. to reset DSP
#define REG_MUX_SEL1 0x201a //
#define REG_MUX_SEL2 0x201b //
#define REG_CPU_FREQ 0x2024 // CPU freq. selection
#define REG_DSP_FREQ 0x2026 // DSP freq. selection
#define REG_GPIO_OEN 0x2038 // GPIO[7:0] in/out control: 1: output, 0: input
#define GPIO_OUT 0x2030 // GPIO[7:0] output
#define GPIO_IN 0x2040 // GPIO[7:0] input
#define REG_AUX_RAM_EN 0x2100 // auxiliary external RAM access enable: 0: disable, 1: enable
#define REG_P1_OUT_SEL 0x2102 // Port1 output mode selection.
// 0: 3-state mode, data is driven when 0, and 3-state when 1
// 1: Output mode
#define REG_P3_OUT_SEL 0x2103 // Port3 output mode selection.
// 0: 3-state mode, data is driven when 0, and 3-state when 1
// 1: Output
/*********
* MACROS *
*********/
// GPIO[6:0] out
#define GPIO_0_H { GPIOOut0 |= (0x01<<0); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_1_H { GPIOOut0 |= (0x01<<1); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_2_H { GPIOOut0 |= (0x01<<2); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_3_H { GPIOOut0 |= (0x01<<3); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_4_H { GPIOOut0 |= (0x01<<4); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_5_H { GPIOOut0 |= (0x01<<5); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_6_H { GPIOOut0 |= (0x01<<6); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_0_L { GPIOOut0 &= ~(0x01<<0); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_1_L { GPIOOut0 &= ~(0x01<<1); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_2_L { GPIOOut0 &= ~(0x01<<2); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_3_L { GPIOOut0 &= ~(0x01<<3); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_4_L { GPIOOut0 &= ~(0x01<<4); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_5_L { GPIOOut0 &= ~(0x01<<5); XBYTE[GPIO_OUT] = GPIOOut0; }
#define GPIO_6_L { GPIOOut0 &= ~(0x01<<6); XBYTE[GPIO_OUT] = GPIOOut0; }
// GPIO[6:0] in
#define GPIO_0 ((XBYTE[GPIO_IN]&(0x01<<0))&&0x1)
#define GPIO_1 ((XBYTE[GPIO_IN]&(0x01<<1))&&0x1)
#define GPIO_2 ((XBYTE[GPIO_IN]&(0x01<<2))&&0x1)
#define GPIO_3 ((XBYTE[GPIO_IN]&(0x01<<3))&&0x1)
#define GPIO_4 ((XBYTE[GPIO_IN]&(0x01<<4))&&0x1)
#define GPIO_5 ((XBYTE[GPIO_IN]&(0x01<<5))&&0x1)
#define GPIO_6 ((XBYTE[GPIO_IN]&(0x01<<6))&&0x1)
/*
#define DOOR_SWITCH GPIO_4
#define PLAY_SWITCH GPIO_0
//#define PLAY_SWITCH_IS_H GPIO_7!=0
//#define PLAY_SWITCH_IS_L GPIO_7==0
#define HOLD_SWITCH GPIO_0
#define DC_IN GPIO_0
#define BATT_LEVEL GPIO_0
#define POWER_PIN_L GPIO_0_L
#define POWER_PIN_H GPIO_0_H
#define MUTE_L GPIO_1_L
#define MUTE_H GPIO_1_H
*/
//------------------------------------------------------------------------------
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