📄 at980.lst
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(0812) return 0;
05EB 2700 CLR R16
05EC 2711 CLR R17
05ED C00A RJMP 0x05F8
(0813)
(0814) }
05EE 5041 SUBI R20,1
05EF 4050 SBCI R21,0
05F0 E081 LDI R24,1
05F1 E090 LDI R25,0
05F2 1784 CP R24,R20
05F3 0795 CPC R25,R21
05F4 F40C BGE 0x05F6
05F5 CF96 RJMP 0x058C
(0815) return 1;
05F6 E001 LDI R16,1
05F7 E010 LDI R17,0
05F8 940E19F8 CALL pop_gset1
05FA 9508 RET
_get_uicc_key:
j --> Y+1
i --> R20
key --> R16
05FB 940E19F5 CALL push_gset1
FILE: D:\avrmcu\AT980\AT980\main.c
(0000) #include <macros.h>
(0001) #include <iom163.h>
(0002) #include <eeprom.h>
(0003) #include "..\bu2624\bu2624.h"
(0004) #include "..\main.h"
(0005) #include "..\key.h"
(0006) #include "..\uicc_def.h"
(0007) #include "..\io.h"
(0008) #include "..\key_lut.h"
(0009) #define SLEEP_TIME_TAG 30
(0010) #define SLEEP_MAX_CNT 4
(0011) extern NV_SETTINGS gps;
(0012) extern unsigned int info;
(0013) extern unsigned char amfm_flag;
(0014) unsigned char display_type=0,g_avtv;
(0015) extern unsigned char radio_is_muted, rds_display_type;
(0016) extern unsigned int g_ui_timing_cnt;
(0017) unsigned char led_val=0;
(0018) extern unsigned int g_vfd_grid_buffer[];
(0019) //unsigned char display_default_type = 0;
(0020) unsigned char tick_flag=0;
(0021) unsigned int key_buff=0xffff;
(0022) unsigned char uicc_code,last_key;
(0023) unsigned int dvd_key=0xffff;
(0024) unsigned char g_ui_tmp_msg_cnt=0;
(0025) extern unsigned char repeat,muted;
(0026) extern unsigned char Mchvol,Bassvol,Treblevol,Balanceval,Loudnessval;
(0027) extern unsigned char Cchvol,SWchvol,Schvol;
(0028) extern unsigned char is_autosearching;
(0029) unsigned char work_mode=0,work_mode1;
(0030) extern unsigned char *err_msg;
(0031) extern const UI_KEY_MAP key_map[];
(0032) unsigned char get_uicc_key(unsigned int key)
(0033) {
(0034) unsigned char i,j;
(0035) for(i=0;i<MAX_KEY_CNT;i++)
05FD 2744 CLR R20
05FE C015 RJMP 0x0614
(0036) if(key_map[i].input_key == key)
05FF E083 LDI R24,3
0600 9F84 MUL R24,R20
0601 01F0 MOVW R30,R0
0602 EF82 LDI R24,0xF2
0603 E091 LDI R25,1
0604 940E1AB0 CALL 0x1AB0
0606 17E0 CP R30,R16
0607 07F1 CPC R31,R17
0608 F451 BNE 0x0613
(0037) {
(0038) return key_map[i].uicc_key;
0609 E083 LDI R24,3
060A 9F84 MUL R24,R20
060B 01F0 MOVW R30,R0
060C EF84 LDI R24,0xF4
060D E091 LDI R25,1
060E 0FE8 ADD R30,R24
060F 1FF9 ADC R31,R25
0610 9104 LD R16,R16
0611 2711 CLR R17
0612 C005 RJMP 0x0618
0613 9543 INC R20
0614 324C CPI R20,0x2C
0615 F348 BCS 0x05FF
(0039) }
(0040) return 0xff;
0616 EF0F LDI R16,0xFF
0617 E010 LDI R17,0
0618 940E19F8 CALL pop_gset1
061A 9508 RET
_DEC_power:
val --> R20
061B 940E19F5 CALL push_gset1
061D 2F40 MOV R20,R16
(0041) }
(0042) void DEC_power(unsigned char val)
(0043) {
(0044) if(val)
061E 2344 TST R20
061F F031 BEQ 0x0626
(0045) led_val |= 0x10;
0620 91800141 LDS R24,0x141
0622 6180 ORI R24,0x10
0623 93800141 STS R24,0x141
0625 C005 RJMP 0x062B
(0046) else
(0047) led_val &= 0x0f;
0626 91800141 LDS R24,0x141
0628 708F ANDI R24,0xF
0629 93800141 STS R24,0x141
(0048) VFD_LL_RefreshLED(led_val);
062B 940E1C85 CALL 0x1C85
(0049) }
062D 940E19F8 CALL pop_gset1
062F 9508 RET
(0050) void Set_AVTV(void)
(0051) {
(0052) if(g_avtv)
_Set_AVTV:
0630 902001B4 LDS R2,_g_avtv
0632 2022 TST R2
0633 F011 BEQ 0x0636
(0053) Set_TV();
0634 9AAA SBI P15,2
0635 C001 RJMP 0x0637
(0054) else
(0055) Set_AV();
0636 98AA CBI P15,2
(0056) }
0637 9508 RET
_ui_input_handler:
tmp --> R20
0638 940E1A0C CALL push_gset2
(0057) void ui_input_handler(void)
(0058) {
(0059) unsigned int tmp;
(0060) if(work_mode == POWER_OFF_MODE)
063A 91800148 LDS R24,0x148
063C 3085 CPI R24,5
063D F499 BNE 0x0651
(0061) {
(0062) if(uicc_code== UICC_POWER)
063E 918001B3 LDS R24,_uicc_code
0640 3A8A CPI R24,0xAA
0641 F009 BEQ 0x0643
0642 C29C RJMP 0x08DF
(0063) {
(0064) g_avtv = 0;
0643 940E1C60 CALL 0x1C60
(0065) Set_AV();
(0066) work_mode = work_mode1;
0645 902001B1 LDS R2,_work_mode1
0647 92200148 STS R2,0x148
(0067) work_mode_convert();
0649 D3ED RCALL _work_mode_convert
064A 0000 NOP
(0068) led_val &= 0x1e;
064B 91800141 LDS R24,0x141
064D 718E ANDI R24,0x1E
064E 93800141 STS R24,0x141
(0069)
(0070) // delay_ms(100);
(0071) // muted = 0;
(0072) //MCU_mute();
(0073) }
(0074) else
(0075) {
(0076) #ifdef CLOCK_STANDBY
(0077) clock_operator();
(0078) #endif
(0079)
(0080) };
(0081) }
0650 C28E RJMP 0x08DF
(0082) else
(0083) {
(0084) switch(uicc_code)
0651 914001B3 LDS R20,_uicc_code
0653 2755 CLR R21
0654 3345 CPI R20,0x35
0655 E0E0 LDI R30,0
0656 075E CPC R21,R30
0657 F409 BNE 0x0659
0658 C1A1 RJMP 0x07FA
0659 E385 LDI R24,0x35
065A E090 LDI R25,0
065B 1784 CP R24,R20
065C 0795 CPC R25,R21
065D F104 BLT 0x067E
065E 3245 CPI R20,0x25
065F E0E0 LDI R30,0
0660 075E CPC R21,R30
0661 F409 BNE 0x0663
0662 C1F9 RJMP 0x085C
0663 3246 CPI R20,0x26
0664 E0E0 LDI R30,0
0665 075E CPC R21,R30
0666 F409 BNE 0x0668
0667 C1E7 RJMP 0x084F
0668 3247 CPI R20,0x27
0669 E0E0 LDI R30,0
066A 075E CPC R21,R30
066B F409 BNE 0x066D
066C C1D5 RJMP 0x0842
066D E287 LDI R24,0x27
066E E090 LDI R25,0
066F 1784 CP R24,R20
0670 0795 CPC R25,R21
0671 F034 BLT 0x0678
0672 314F CPI R20,0x1F
0673 E0E0 LDI R30,0
0674 075E CPC R21,R30
0675 F409 BNE 0x0677
0676 C247 RJMP 0x08BE
0677 C252 RJMP 0x08CA
0678 324D CPI R20,0x2D
0679 E0E0 LDI R30,0
067A 075E CPC R21,R30
067B F409 BNE 0x067D
067C C031 RJMP 0x06AE
067D C24C RJMP 0x08CA
067E 3843 CPI R20,0x83
067F E0E0 LDI R30,0
0680 075E CPC R21,R30
0681 F409 BNE 0x0683
0682 C1E6 RJMP 0x0869
0683 E883 LDI R24,0x83
0684 E090 LDI R25,0
0685 1784 CP R24,R20
0686 0795 CPC R25,R21
0687 F034 BLT 0x068E
0688 334A CPI R20,0x3A
0689 E0E0 LDI R30,0
068A 075E CPC R21,R30
068B F409 BNE 0x068D
068C C1F3 RJMP 0x0880
068D C23C RJMP 0x08CA
068E 394D CPI R20,0x9D
068F E0E0 LDI R30,0
0690 075E CPC R21,R30
0691 F161 BEQ 0x06BE
0692 394E CPI R20,0x9E
0693 E0E0 LDI R30,0
0694 075E CPC R21,R30
0695 F409 BNE 0x0697
0696 C0BE RJMP 0x0755
0697 394D CPI R20,0x9D
0698 E0E0 LDI R30,0
0699 075E CPC R21,R30
069A F40C BGE 0x069C
069B C22E RJMP 0x08CA
069C 3A4A CPI R20,0xAA
069D E0E0 LDI R30,0
069E 075E CPC R21,R30
069F F009 BEQ 0x06A1
06A0 C229 RJMP 0x08CA
(0085) {
(0086) case UICC_POWER:
(0087) #ifndef TEST_KEY
(0088) g_ui_timing_cnt = 0;
06A1 2422 CLR R2
06A2 2433 CLR R3
06A3 92300198 STS R3,_g_ui_timing_cnt+1
06A5 92200197 STS R2,_g_ui_timing_cnt
06A7 940E1C34 CALL 0x1C34
(0089) work_mode1=work_mode;
(0090) work_mode = POWER_OFF_MODE;
(0091) work_mode_convert();
06A9 D38D RCALL _work_mode_convert
06AA 0000 NOP
06AB 940E1B8B CALL 0x1B8B
(0092) muted = 1;
(0093) MCU_mute();
(0094) #endif
(0095) break;
06AD C231 RJMP 0x08DF
(0096) case UICC_WORK_MODE:
(0097) work_mode++;
06AE 91800148 LDS R24,0x148
06B0 5F8F SUBI R24,0xFF
06B1 93800148 STS R24,0x148
(0098) #ifdef AV3_EXIST
(0099) if(work_mode >4)
(0100) #else
(0101) #ifdef NO_AV2
(0102) if(work_mode>2)
06B3 E082 LDI R24,2
06B4 90200148 LDS R2,0x148
06B6 1582 CP R24,R2
06B7 F418 BCC 0x06BB
(0103) #else
(0104) if(work_mode>3)
(0105) #endif
(0106) #endif
(0107) work_mode = 0;
06B8 2422 CLR R2
06B9 92200148 STS R2,0x148
(0108) work_mode_convert();
06BB D37B RCALL _work_mode_convert
06BC 0000 NOP
(0109) break;
06BD C221 RJMP 0x08DF
(0110) /*
(0111) case UICC_DVD:
(0112) if(work_mode!=DVD_MODE)
(0113) {
(0114) work_mode = DVD_MODE;
(0115) work_mode_convert();
(0116) };
(0117) break;
(0118) case UICC_AV1:
(0119) if(work_mode!=AV1_MODE)
(0120) {
(0121) work_mode = AV1_MODE;
(0122) work_mode_convert();
(0123) };
(0124) break;
(0125) case UICC_AV2:
(0126) if(work_mode!=AV2_MODE)
(0127) {
(0128) work_mode = AV2_MODE;
(0129) work_mode_convert();
(0130) }
(0131) break;
(0132) case UICC_AV3:
(0133) if(work_mode!=AV3_MODE)
(0134) {
(0135) work_mode = AV3_MODE;
(0136) work_mode_convert();
(0137) };
(0138) break;
(0139) case UICC_AM:
(0140) EEPROMwrite((int)&(gps.ps_amfm_flag),1);
(0141) if(work_mode!=TUNER_MODE)
(0142) {
(0143) work_mode = TUNER_MODE;
(0144) work_mode_convert();
(0145) }
(0146) else
(0147) {
(0148) if(!amfm_flag)
(0149) work_mode_convert();
(0150) }
(0151) break;
(0152) case UICC_FM:
(0153) EEPROMwrite((int)&(gps.ps_amfm_flag),0);
(0154) if(work_mode!=TUNER_MODE)
(0155) {
(0156) work_mode = TUNER_MODE;
(0157) work_mode_convert();
(0158) }
(0159) else
(0160) {
(0161) if(amfm_flag)
(0162) work_mode_convert();
(0163) }
(0164) break;
(0165) */
(0166) case UICC_VOLUME_UP:
(0167) g_ui_tmp_msg_cnt = 20;
06BE E184 LDI R24,0x14
06BF 93800147 STS R24,0x147
(0168) switch(display_type)
06C1 91400140 LDS R20,0x140
06C3 2755 CLR R21
06C4 3045 CPI R20,5
06C5 E0E0 LDI R30,0
06C6 075E CPC R21,R30
06C7 F40C BGE 0x06C9
06C8 C07D RJMP 0x0746
06C9 E08B LDI R24,0xB
06CA E090 LDI R25,0
06CB 1784 CP R24,R20
06CC 0795 CPC R25,R21
06CD F40C BGE 0x06CF
06CE C077 RJMP 0x0746
06CF EC82 LDI R24,0xC2
06D0 E090 LDI R25,0
06D1 01FA MOVW R30,R20
06D2 9735 SBIW R30,5
06D3 940E1AA8 CALL <created procedures>
06D5 9409 IJMP
(0169) {
(0170) case DISPLAY_VOL:
(0171) if(Mchvol < 60)
06D6 9180014F LDS R24,0x14F
06D8 338C CPI R24,0x3C
06D9 F428 BCC 0x06DF
(0172) {
(0173) Mchvol++;
06DA 5F8F SUBI R24,0xFF
06DB 9380014F STS R24,0x14F
(0174) pt2320_vol();
06DD D2E7 RCALL _pt2320_vol
06DE 0000 NOP
(0175) };
(0176) dvd_key = D_VOLUME_KEY|Mchvol;
06DF 9180014F LDS R24,0x14F
06E1 2799 CLR R25
06E2 6F91 ORI R25,0xF1
06E3 940E1ABB CALL 0x1ABB
(0177) break;
06E5 C069 RJMP 0x074F
(0178) #ifndef NO_SIX_CHANNEL_OUTPUT
(0179) case DISPLAY_SVOL:
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