spi.s

sunplus spca514 cdmp3 源码

	.module spi.c
	.area data(ram, con, rel)
_vfd_address::
	.blkb 1
	.area idata
	.byte 0
	.area data(ram, con, rel)
	.dbfile D:\avrmcu\AT980\spi.c
	.dbsym s vfd_address _vfd_address c
_spi_command::
	.blkb 1
	.area idata
	.byte 0
	.area data(ram, con, rel)
	.dbfile D:\avrmcu\AT980\spi.c
	.dbsym s spi_command _spi_command c
	.area text(rom, con, rel)
	.dbfile D:\avrmcu\AT980\spi.c
	.dbfunc s spi_init _spi_init fI
	.even
_spi_init::
	.dbline -1
	.dbline 18
; //SPI initialisation
; // clock rate: 2000000hz
; #include "iom163.h"
; #include <macros.h>
; #define SPI_WAIT_COMMAND 0
; #define SPI_WRITE_LOW    1
; #define SPI_WRITE_HIGH   2
; #define SPI_READ_LOW     3
; #define SPI_READ_HIGH    4
; #define SPI_ERR			 5
; unsigned char vfd_address=0;
; unsigned char spi_command=0;
; extern unsigned char g_vfd_grid_buffer[];
; //unsigned char buffer[24];
; extern unsigned int dvd_key;
; void spi_err(void);
; void spi_init(void)
; {
	.dbline 19
;  SPCR= 0x00; //diable spi
	clr R2
	out 0xd,R2
	.dbline 20
;  SPSR= 0x00; //2X
	out 0xe,R2
	.dbline -2
	.dbline 22
;  //SPCR= 0xEC; //setup SPI CPOL:1;CPHA:1;
; }
L1:
	.dbline 0 ; func end
	ret
	.area vector(rom, abs)
	.org 40
	jmp _spi_stc_isr
	.area text(rom, con, rel)
	.dbfile D:\avrmcu\AT980\spi.c
	.dbfunc s spi_stc_isr _spi_stc_isr fI
	.area func_lit(rom, con, rel)
L17:
	.word `L8
	.word `L15
	.word `L16
	.word `L13
	.word `L14
	.area text(rom, con, rel)
	.dbfile D:\avrmcu\AT980\spi.c
;              i -> <dead>
;       spi_data -> R20
;     spi_status -> R22
	.even
_spi_stc_isr::
	xcall push_lset
	xcall push_gset2
	.dbline -1
	.dbline 26
; 
; #pragma interrupt_handler spi_stc_isr:11
; void spi_stc_isr(void)
; {
	.dbline 30
;  //byte in SPDR has been sent/received
;  register unsigned char spi_status,spi_data,i;
;  //SPCR &=0x7f; //disable spi interrupt 
;  spi_status = SPSR;
	in R22,0xe
	.dbline 31
;  spi_data = SPDR;
	in R20,0xf
	.dbline 34
;  //Set_FS2(0);
;  //Set_FS1(1);
;  if(spi_status&0x40)
	sbrs R22,6
	rjmp L3
	.dbline 35
;  {
	.dbline 36
;    spi_err();
	xcall _spi_err
	.dbline 37
;    return;
	xjmp L2
L3:
	.dbline 38
;  };
	.dbline 39
;  switch(spi_command)
	lds R22,_spi_command
	clr R23
	cpi R22,0
	ldi R30,0
	cpc R23,R30
	brge X1
	xjmp L5
X1:
	ldi R24,4
	ldi R25,0
	cp R24,R22
	cpc R25,R23
	brge X2
	xjmp L5
X2:
	ldi R24,<L17
	ldi R25,>L17
	movw R30,R22
	lsl R30
	rol R31
	add R30,R24
	adc R31,R25
	lpm R0,Z+
	lpm R1,Z
	movw R30,R0
	ijmp
X0:
	.dbline 40
;  {
L8:
	.dbline 42
;   case SPI_WAIT_COMMAND:
; 	   	if((spi_data&0xC3)==0x42)
	mov R24,R20
	andi R24,195
	cpi R24,66
	brne L9
	.dbline 43
; 		{  //read key
	.dbline 44
; 		  asm("SBI 0x17,6");
	SBI 0x17,6
	.dbline 45
; 		  SPDR =(unsigned char)dvd_key;
	lds R3,_dvd_key+1
	lds R2,_dvd_key
	out 0xf,R2
	.dbline 46
; 		  spi_command= SPI_READ_LOW;
	ldi R24,3
	sts _spi_command,R24
	.dbline 47
; 		}
	xjmp L6
L9:
	.dbline 48
; 		else if((spi_data&0xC0)==0xc0)
	mov R24,R20
	andi R24,192
	cpi R24,192
	brne L11
	.dbline 49
; 		{ //write
	.dbline 50
; 		  vfd_address = spi_data&0x3f;
	mov R24,R20
	andi R24,63
	sts _vfd_address,R24
	.dbline 51
; 		  spi_command = SPI_WRITE_LOW;
	ldi R24,1
	sts _spi_command,R24
	.dbline 52
; 		}
	xjmp L6
L11:
	.dbline 54
; 		else
; 		  spi_err();
	xcall _spi_err
	.dbline 55
;   	   break;
	xjmp L6
L13:
	.dbline 57
;   case SPI_READ_LOW:
;   	   SPDR = (unsigned char)(dvd_key>>8);
	lds R3,_dvd_key+1
	lds R2,_dvd_key
	mov R2,R3
	clr R3
	out 0xf,R2
	.dbline 58
; 	   spi_command = SPI_READ_HIGH;
	ldi R24,4
	sts _spi_command,R24
	.dbline 59
;        break;
	xjmp L6
L14:
	.dbline 61
;   case SPI_READ_HIGH:
;        spi_command = SPI_WAIT_COMMAND;
	clr R2
	sts _spi_command,R2
	.dbline 62
; 	   dvd_key =0xffff;
	ldi R24,-1
	ldi R25,-1
	sts _dvd_key+1,R25
	sts _dvd_key,R24
	.dbline 63
; 	   asm("CBI 0x17,6");
	CBI 0x17,6
	.dbline 64
;        break;
	xjmp L6
L15:
	.dbline 66
;   case SPI_WRITE_LOW:
; 	   g_vfd_grid_buffer[vfd_address] = spi_data;
	ldi R24,<_g_vfd_grid_buffer
	ldi R25,>_g_vfd_grid_buffer
	lds R30,_vfd_address
	clr R31
	add R30,R24
	adc R31,R25
	std z+0,R20
	.dbline 67
; 	   vfd_address++;
	lds R24,_vfd_address
	subi R24,255	; addi 1
	sts _vfd_address,R24
	.dbline 68
; 	   spi_command = SPI_WRITE_HIGH;
	ldi R24,2
	sts _spi_command,R24
	.dbline 69
;        break;
	xjmp L6
L16:
	.dbline 71
;   case SPI_WRITE_HIGH:
; 	   g_vfd_grid_buffer[vfd_address] = spi_data;
	ldi R24,<_g_vfd_grid_buffer
	ldi R25,>_g_vfd_grid_buffer
	lds R30,_vfd_address
	clr R31
	add R30,R24
	adc R31,R25
	std z+0,R20
	.dbline 75
; 	   //if(vfd_address>22)
; 	    //for(i=0;i++;i<24)
; 		  //g_vfd_grid_buffer[i] = buffer[i];
; 	   spi_command = SPI_WAIT_COMMAND;
	clr R2
	sts _spi_command,R2
	.dbline 76
; 	   break;
	xjmp L6
L5:
	.dbline 80
	xcall _spi_err
	.dbline 81
L6:
	.dbline -2
	.dbline 84
;  
;   default:
;   	  // Set_FS2(0);
;        spi_err();
; 	   break;
;  }
;  //SPCR |=0x80;
; }
L2:
	xcall pop_gset2
	xcall pop_lset
	.dbline 0 ; func end
	reti
	.dbsym l i 1 c
	.dbsym r spi_data 20 c
	.dbsym r spi_status 22 c
	.dbfunc s spi_err _spi_err fI
;          delay -> R20,R21
	.even
_spi_err::
	xcall push_gset1
	.dbline -1
	.dbline 86
; void spi_err(void)
; {
	.dbline 89
;  unsigned int delay;
;  
;  SPCR =00;
	clr R2
	out 0xd,R2
	.dbline 90
;  SPSR =00;
	out 0xe,R2
	.dbline 91
;  SEI();
	sei
	.dbline 92
;  SPDR = 0xff;
	ldi R24,255
	out 0xf,R24
	.dbline 93
;  asm("CBI 0X17,6");
	CBI 0X17,6
	.dbline 96
;  //dvd_key = 0xffff;
;  //DI();
;  delay=50000;
	ldi R20,-15536
	ldi R21,-61
	xjmp L20
L19:
	.dbline 99
;  //Set_FS1(0);
;  while(!(PINB&0x10))
;  {
	.dbline 100
;   if(!delay) break;
	cpi R20,0
	cpc R20,R21
	brne L22
	.dbline 100
	xjmp L21
L22:
	.dbline 101
	xcall _soft_delay
	.dbline 102
	subi R20,1
	sbci R21,0
	.dbline 103
L20:
	.dbline 98
	sbis 0x16,4
	rjmp L19
L21:
	.dbline 104
;   soft_delay();
;   delay--;
;  }
;  SPCR = 0xec;
	ldi R24,236
	out 0xd,R24
	.dbline 105
;  delay =SPDR;
	in R20,0xf
	clr R21
	.dbline 106
;  delay=SPSR;
	in R20,0xe
	clr R21
	.dbline 108
;  //delay=SPDR;
;  spi_command = SPI_WAIT_COMMAND;
	clr R2
	sts _spi_command,R2
	.dbline -2
	.dbline 111
; 
; 
; }
L18:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
	.dbsym r delay 20 i