chip.h

這是一個實時嵌入式作業系統 實作了MCS51 ARM等MCU

#define LPC214X_AD_ADGDR_OFFSET         0x04   /* A/D Global Data Register (only one common register!) */
#define LPC214X_AD_ADGSR_OFFSET         0x08   /* A/D Global Start Register */
#define LPC214X_AD_ADINTEN_OFFSET       0x0c   /* A/D Interrupt Enable Register */
#define LPC214X_AD_ADDR0_OFFSET         0x10   /* A/D Chanel 0 Data Register */
#define LPC214X_AD_ADDR1_OFFSET         0x14   /* A/D Chanel 0 Data Register */
#define LPC214X_AD_ADDR2_OFFSET         0x18   /* A/D Chanel 0 Data Register */
#define LPC214X_AD_ADDR3_OFFSET         0x1c   /* A/D Chanel 0 Data Register */
#define LPC214X_AD_ADDR4_OFFSET         0x20   /* A/D Chanel 0 Data Register */
#define LPC214X_AD_ADDR5_OFFSET         0x24   /* A/D Chanel 0 Data Register */
#define LPC214X_AD_ADDR6_OFFSET         0x28   /* A/D Chanel 0 Data Register */
#define LPC214X_AD_ADDR7_OFFSET         0x2c   /* A/D Chanel 0 Data Register */
#define LPC214X_AD_ADSTAT_OFFSET        0x30   /* A/D Status Register */

/* Pin function select registers (these are normally referenced as offsets) */

#define LPC214X_PINSEL0                 (LPC214X_PINSEL_BASE + LPC214X_PINSEL0_OFFSET)
#define LPC214X_PINSEL1                 (LPC214X_PINSEL_BASE + LPC214X_PINSEL1_OFFSET)
#define LPC214X_PINSEL2                 (LPC214X_PINSEL_BASE + LPC214X_PINSEL2_OFFSET)

/* SPI register offsets */

#define LPC214X_SPI_CR0_OFFSET          0x00   /* Control Register 0 */
#define LPC214X_SPI_CR1_OFFSET          0x04   /* Control Register 1 */
#define LPC214X_SPI_DR_OFFSET           0x08   /* Data Register */
#define LPC214X_SPI_SR_OFFSET           0x0c   /* Status Register */
#define LPC214X_SPI_CPSR_OFFSET         0x10   /* Clock Pre-Scale Regisrer */
#define LPC214X_SPI_IMSC_OFFSET         0x14   /* Interrupt Mask Set and Clear Register */
#define LPC214X_SPI_RIS_OFFSET          0x18   /* Raw Interrupt Status Register */
#define LPC214X_SPI_MIS_OFFSET          0x1c   /* Masked Interrupt Status Register */
#define LPC214X_SPI_ICR_OFFSET          0x20   /* Interrupt Clear Register */

/* RTC register offsets */

#define LPC214X_RTC_ILR_OFFSET          0x00   /* Interrupt Location Register */
#define LPC214X_RTC_CTC_OFFSET          0x04   /* Clock Tick Counter */
#define LPC214X_RTC_CCR_OFFSET          0x08   /* Clock Control Register */
#define LPC214X_RTC_CIIR_OFFSET         0x0c   /* Counter Increment Interrupt Register */
#define LPC214X_RTC_AMR_OFFSET          0x10   /* Alarm Mask Register */
#define LPC214X_RTC_CTIME0_OFFSET       0x14   /* Consolidated Time Register 0 */
#define LPC214X_RTC_CTIME1_OFFSET       0x18   /* Consolidated Time Register 1 */
#define LPC214X_RTC_CTIME2_OFFSET       0x1c   /* Consolidated Time Register 2 */
#define LPC214X_RTC_SEC_OFFSET          0x20   /* Seconds Register */
#define LPC214X_RTC_MIN_OFFSET          0x24   /* Minutes Register */
#define LPC214X_RTC_HOUR_OFFSET         0x28   /* Hours Register */
#define LPC214X_RTC_DOM_OFFSET          0x2c   /* Day Of Month Register */
#define LPC214X_RTC_DOW_OFFSET          0x30   /* Day Of Week Register */
#define LPC214X_RTC_DOY_OFFSET          0x34   /* Day Of Year Register */
#define LPC214X_RTC_MONTH_OFFSET        0x38   /* Months Register */
#define LPC214X_RTC_YEAR_OFFSET         0x3c   /* Years Register */

#define LPC214X_RTC_ALSEC_OFFSET        0x60   /* Alarm Seconds Register */
#define LPC214X_RTC_ALMIN_OFFSET        0x64   /* Alarm Minutes Register */
#define LPC214X_RTC_ALHOUR_OFFSET       0x68   /* Alarm Hours Register */
#define LPC214X_RTC_ALDOM_OFFSET        0x6c   /* Alarm Day Of Month Register */
#define LPC214X_RTC_ALDOW_OFFSET        0x70   /* Alarm Day Of Week Register */
#define LPC214X_RTC_ALDOY_OFFSET        0x74   /* Alarm Day Of Year Register */
#define LPC214X_RTC_ALMON_OFFSET        0x78   /* Alarm Months Register */
#define LPC214X_RTC_ALYEAR_OFFSET       0x7c   /* Alarm Years Register */
#define LPC214X_RTC_PREINT_OFFSET       0x80   /* Prescale Value Register (integer) */
#define LPC214X_RTC_PREFRAC_OFFSET      0x84   /* Prescale Value Register (fraction) */

/* GPIO register offsets */

#define LPC214X_GPIO_PIN_OFFSET         0x00   /* Pin Value Register */
#define LPC214X_GPIO_SET_OFFSET         0x04   /* Pin Output Set Register */
#define LPC214X_GPIO_DIR_OFFSET         0x08   /* Pin Direction Register */
#define LPC214X_GPIO_CLR_OFFSET         0x0c   /* Pin Output Clear Register */

/* Memory Accelerator Module (MAM) Regiser Offsets */

#define LPC214X_MAM_CR_OFFSET           0x00   /* MAM Control Offset*/
#define LPC214x_MAM_TIM_OFFSET          0x04   /* MAM Timing Offset */

/* Phase Locked Loop (PLL) Register Offsets */

#define LPC214X_PLL_CON_OFFSET          0x00   /* PLL Control Offset*/
#define LPC214X_PLL_CFG_OFFSET          0x04   /* PLL Configuration Offset */
#define LPC214X_PLL_STAT_OFFSET         0x08   /* PLL Status Offset */
#define LPC214X_PLL_FEED_OFFSET         0x0c   /* PLL Feed Offset */

/* PLL Control Register Bit Settings */

#define LPC214X_PLL_CON_PLLE            (1 << 0) /* PLL Enable */
#define LPC214X_PLL_CON_PLLC            (1 << 1) /* PLL Connect */

/* PLL Configuration Register Bit Settings */

#define LPC214X_PLL_CFG_MSEL            (0x1f << 0) /* PLL Multiplier */
#define LPC214X_PLL_CFG_PSEL            (0x03 << 5) /* PLL Divider */
#define LPC214X_PLL_STAT_PLOCK          (1 << 10)   /* PLL Lock Status */

/* Power Control register offsets */

#define LPC214X_PCON_OFFSET             0x00   /* Control Register */
#define LPC214X_PCONP_OFFSET            0x04   /* Peripherals Register */

/* External Interrupt register offsets */

#define LPC214X_EXT_INT_OFFSET          0x00   /* Flag Register */
#define LPC214X_EXT_WAKE_OFFSET         0x04   /* Wakeup Register */
#define LPC214X_EXT_MODE_OFFSET         0x08   /* Mode Register */
#define LPC214X_EXT_POLAR_OFFSET        0x0c   /* Polarity Register */

/* External Memory Controller (EMC) definitions */

#define LPC214X_BCFG0_OFFSET            0x00   /* BCFG0 Offset */
#define LPC214X_BCFG1_OFFSET            0x04   /* BCFG1 Offset */
#define LPC214X_BCFG2_OFFSET            0x08   /* BCFG2 Offset */
#define LPC214X_BCFG3_OFFSET            0x0c   /* BCFG3 Offset */

/* Vectored Interrupt Controller (VIC) register offsets */

#define LPC214X_VIC_IRQSTATUS_OFFSET    0x00   /* R: IRQ Status Register */
#define LPC214X_VIC_FIQSTATUS_OFFSET    0x04   /* R: FIQ Status Register */
#define LPC214X_VIC_RAWINTR_OFFSET      0x08   /* R: Raw Interrupt Status Register */
#define LPC214X_VIC_INTSELECT_OFFSET    0x0c   /* RW: Interrupt Select Register */
#define LPC214X_VIC_INTENABLE_OFFSET    0x10   /* RW: Interrupt Enable Register */
#define LPC214X_VIC_INTENCLEAR_OFFSET   0x14   /* W: Interrupt Enable Clear Register */
#define LPC214X_VIC_SOFTINT_OFFSET      0x18   /* RW: Software Interrupt Register */
#define LPC214X_VIC_SOFTINTCLEAR_OFFSET 0x1c   /* W: Software Interrupt Clear Register */
#define LPC214X_VIC_PROTECTION_OFFSET   0x20   /* Protection Enable Register */

#define LPC214X_VIC_VECTADDR_OFFSET     0x30   /* RW: Vector Address Register */
#define LPC214X_VIC_DEFVECTADDR_OFFSET  0x34   /* RW: Default Vector Address Register */

#define LPC214X_VIC_VECTADDR0_OFFSET    0x100  /* RW: Vector Address 0 Register */
#define LPC214X_VIC_VECTADDR1_OFFSET    0x104  /* RW: Vector Address 1 Register */
#define LPC214X_VIC_VECTADDR2_OFFSET    0x108  /* RW: Vector Address 2 Register */
#define LPC214X_VIC_VECTADDR3_OFFSET    0x10c  /* RW: Vector Address 3 Register */
#define LPC214X_VIC_VECTADDR4_OFFSET    0x110  /* RW: Vector Address 4 Register */
#define LPC214X_VIC_VECTADDR5_OFFSET    0x114  /* RW: Vector Address 5 Register */
#define LPC214X_VIC_VECTADDR6_OFFSET    0x118  /* RW: Vector Address 6 Register */
#define LPC214X_VIC_VECTADDR7_OFFSET    0x11c  /* RW: Vector Address 7 Register */
#define LPC214X_VIC_VECTADDR8_OFFSET    0x120  /* RW: Vector Address 8 Register */
#define LPC214X_VIC_VECTADDR9_OFFSET    0x124  /* RW: Vector Address 9 Register */
#define LPC214X_VIC_VECTADDR10_OFFSET   0x128  /* RW: Vector Address 10 Register */
#define LPC214X_VIC_VECTADDR11_OFFSET   0x12c  /* RW: Vector Address 11 Register */
#define LPC214X_VIC_VECTADDR12_OFFSET   0x130  /* RW: Vector Address 12 Register */
#define LPC214X_VIC_VECTADDR13_OFFSET   0x134  /* RW: Vector Address 13 Register */
#define LPC214X_VIC_VECTADDR14_OFFSET   0x138  /* RW: Vector Address 14 Register */
#define LPC214X_VIC_VECTADDR15_OFFSET   0x13c  /* RW: Vector Address 15 Register */

#define LPC214X_VIC_VECTCNTL0_OFFSET    0x200  /* RW: Vector Control 0 Register */
#define LPC214X_VIC_VECTCNTL1_OFFSET    0x204  /* RW: Vector Control 1 Register */
#define LPC214X_VIC_VECTCNTL2_OFFSET    0x208  /* RW: Vector Control 2 Register */
#define LPC214X_VIC_VECTCNTL3_OFFSET    0x20c  /* RW: Vector Control 3 Register */
#define LPC214X_VIC_VECTCNTL4_OFFSET    0x210  /* RW: Vector Control 4 Register */
#define LPC214X_VIC_VECTCNTL5_OFFSET    0x214  /* RW: Vector Control 5 Register */
#define LPC214X_VIC_VECTCNTL6_OFFSET    0x218  /* RW: Vector Control 6 Register */
#define LPC214X_VIC_VECTCNTL7_OFFSET    0x21c  /* RW: Vector Control 7 Register */
#define LPC214X_VIC_VECTCNTL8_OFFSET    0x220  /* RW: Vector Control 8 Register */
#define LPC214X_VIC_VECTCNTL9_OFFSET    0x224  /* RW: Vector Control 9 Register */
#define LPC214X_VIC_VECTCNTL10_OFFSET   0x228  /* RW: Vector Control 10 Register */
#define LPC214X_VIC_VECTCNTL11_OFFSET   0x22c  /* RW: Vector Control 11 Register */
#define LPC214X_VIC_VECTCNTL12_OFFSET   0x230  /* RW: Vector Control 12 Register */
#define LPC214X_VIC_VECTCNTL13_OFFSET   0x234  /* RW: Vector Control 13 Register */
#define LPC214X_VIC_VECTCNTL14_OFFSET   0x238  /* RW: Vector Control 14 Register */
#define LPC214X_VIC_VECTCNTL15_OFFSET   0x23c  /* RW: Vector Control 15 Register */

/****************************************************************************************************
 * Inline Functions
 ****************************************************************************************************/

/****************************************************************************************************
 * Global Function Prototypes
 ****************************************************************************************************/

#endif  /* __LPC214X_CHIP_H */