📄 chip.h
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#define Z16F_UART1_TXD _HX32(ffffe210) /* 8-bits: UART1 Transmit Data */#define Z16F_UART1_RXD _HX32(ffffe210) /* 8-bits: UART1 Receive Data */#define Z16F_UART1_STAT0 _HX32(ffffe211) /* 8-bits: UART1 Status 0 */#define Z16F_UART1_CTL _HX32(ffffe212) /* 16-bits: UART1 Control */#define Z16F_UART1_CTL0 _HX32(ffffe212) /* 8-bits: UART1 Control 0 */#define Z16F_UART1_CTL1 _HX32(ffffe213) /* 8-bits: UART1 COntrol 1 */#define Z16F_UART1_MDSTAT _HX32(ffffe214) /* 8-bits: UART1 Mode Select & Status */#define Z16F_UART1_ADDR _HX32(ffffe215) /* 8-bits: UART1 Address Compare */#define Z16F_UART1_BR _HX32(ffffe216) /* 16-bits: UART1 Baud Rate */#define Z16F_UART1_BRH _HX32(ffffe216) /* 8-bits: UART1 Baud Rate High Byte */#define Z16F_UART1_BRL _HX32(ffffe217) /* 8-bits: UART1 Baud Rate Low Byte *//* UART0/1 Status 0 Register Bit Definitions ****************************************/#define Z16F_UARTSTAT0_RDA _HX8(80) /* Bit 7: Receive Data Available */#define Z16F_UARTSTAT0_PE _HX8(40) /* Bit 6: Parity Error */#define Z16F_UARTSTAT0_OE _HX8(20) /* Bit 5: Overrun Error */#define Z16F_UARTSTAT0_FE _HX8(10) /* Bit 4: Framing Error */#define Z16F_UARTSTAT0_BRKD _HX8(08) /* Bit 3: Break Detect */#define Z16F_UARTSTAT0_TDRE _HX8(04) /* Bit 2: Transmitter Data Register Empty */#define Z16F_UARTSTAT0_TXE _HX8(02) /* Bit 1: Transmitter Empty */#define Z16F_UARTSTAT0_CTS _HX8(01) /* Bit 0: Clear To Send *//* UART0/1 Control 0/1 Register Bit Definitions *************************************/#define Z16F_UARTCTL0_TEN _HX8(80) /* Bit 7: Transmit Enable */#define Z16F_UARTCTL0_REN _HX8(40) /* Bit 6: Receive Enable */#define Z16F_UARTCTL0_CTSE _HX8(20) /* Bit 5: CTS Enable */#define Z16F_UARTCTL0_PEN _HX8(10) /* Bit 4: Parity Enable */#define Z16F_UARTCTL0_PSEL _HX8(08) /* Bit 3: Odd Parity Select */#define Z16F_UARTCTL0_SBRK _HX8(04) /* Bit 2: Send Break */#define Z16F_UARTCTL0_STOP _HX8(02) /* Bit 1: Stop Bit Select */#define Z16F_UARTCTL0_LBEN _HX8(01) /* Bit 0: Loopback Enable */#define Z16F_UARTCTL1_MPMD1 _HX8(80) /* Bit 7: Multiprocessor Mode (bit1) */#define Z16F_UARTCTL1_MPEN _HX8(40) /* Bit 6: Multiprocessor Enable */#define Z16F_UARTCTL1_MPMD0 _HX8(20) /* Bit 5: Multiprocessor Mode (bit0) */#define Z16F_UARTCTL1_MPBT _HX8(10) /* Bit 4: Multiprocessor Bit Transmit */#define Z16F_UARTCTL1_DEPOL _HX8(08) /* Bit 3: Driver Enable Polarity */#define Z16F_UARTCTL1_BRGCTL _HX8(04) /* Bit 2: Baud Rate Generator Control */#define Z16F_UARTCTL1_RDAIRQ _HX8(02) /* Bit 1: Receive Data Interrupt Enable */#define Z16F_UARTCTL1_IREN _HX8(01) /* Bit 0: Infrared Encoder/Decoder Eanble *//* UART0/1 Mode Status/Select Register Bit Definitions ******************************/#define Z16F_UARTMDSEL_NORMAL _HX8(00) /* Bits 5-7=0: Multiprocessor and Normal Mode */#define Z16F_UARTMDSEL_FILTER _HX8(20) /* Bits 5-7=1: Noise Filter Control/Status */#define Z16F_UARTMDSEL_LINP _HX8(40) /* Bits 5-7=2: LIN protocol Contol/Status */#define Z16F_UARTMDSEL_HWREV _HX8(e0) /* Bits 5-7=7: LIN-UART Hardware Revision */ /* Bits 0-4: Mode dependent status *//* Timer0/1/2 registers *************************************************************/#define Z16F_TIMER0_HL _HX32(ffffe300) /* 16-bit: Timer 0 */#define Z16F_TIMER0_H _HX32(ffffe300) /* 8-bit: Timer 0 High Byte */#define Z16F_TIMER0_L _HX32(ffffe301) /* 8-bit: Timer 0 Low Byte */#define Z16F_TIMER0_R _HX32(ffffe302) /* 16-bit: Timer 0 Reload */#define Z16F_TIMER0_RH _HX32(ffffe302) /* 8-bit: Timer 0 Reload High Byte */#define Z16F_TIMER0_RL _HX32(ffffe303) /* 8-bit: Timer 0 Reload Low Byte */#define Z16F_TIMER0_PWM _HX32(ffffe304) /* 16-bit: Timer 0 PWM */#define Z16F_TIMER0_PWMH _HX32(ffffe304) /* 8-bit: Timer 0 PWM High Byte */#define Z16F_TIMER0_PWML _HX32(ffffe305) /* 8-bit: Timer 0 PWM Low Byte */#define Z16F_TIMER0_CTL _HX32(ffffe306) /* 16-bit: Timer 0 Control */#define Z16F_TIMER0_CTL0 _HX32(ffffe306) /* 8-bit: Timer 0 Control 0 */#define Z16F_TIMER0_CTL1 _HX32(ffffe307) /* 8-bit: Timer 0 Control 1 */#define Z16F_TIMER1_HL _HX32(ffffe310) /* 16-bit: Timer 1 */#define Z16F_TIMER1_H _HX32(ffffe310) /* 8-bit: Timer 1 High Byte */#define Z16F_TIMER1_L _HX32(ffffe311) /* 8-bit: Timer 1 Low Byte */#define Z16F_TIMER1_R _HX32(ffffe312) /* 16-bit: Timer 1 Reload */#define Z16F_TIMER1_RH _HX32(ffffe312) /* 8-bit: Timer 1 Reload High Byte */#define Z16F_TIMER1_RL _HX32(ffffe313) /* 8-bit: Timer 1 Reload Low Byte */#define Z16F_TIMER1_PWM _HX32(ffffe314) /* 16-bit: Timer 1 PWM */#define Z16F_TIMER1_PWMH _HX32(ffffe314) /* 8-bit: Timer 1 PWM High Byte */#define Z16F_TIMER1_PWML _HX32(ffffe315) /* 8-bit: Timer 1 PWM Low Byte */#define Z16F_TIMER1_CTL _HX32(ffffe316) /* 16-bit: Timer 1 Control */#define Z16F_TIMER1_CTL0 _HX32(ffffe316) /* 8-bit: Timer 1 Control 0 */#define Z16F_TIMER1_CTL1 _HX32(ffffe317) /* 8-bit: Timer 1 Control 1 */#define Z16F_TIMER2_HL _HX32(ffffe320) /* 16-bit: Timer 2 */#define Z16F_TIMER2_H _HX32(ffffe320) /* 8-bit: Timer 2 High Byte */#define Z16F_TIMER2_L _HX32(ffffe321) /* 8-bit: Timer 2 Low Byte */#define Z16F_TIMER2_R _HX32(ffffe322) /* 16-bit: Timer 2 Reload */#define Z16F_TIMER2_RH _HX32(ffffe322) /* 8-bit: Timer 2 Reload High Byte */#define Z16F_TIMER2_RL _HX32(ffffe323) /* 8-bit: Timer 2 Reload Low Byte */#define Z16F_TIMER2_PWM _HX32(ffffe324) /* 16-bit: Timer 2 PWM */#define Z16F_TIMER2_PWMH _HX32(ffffe324) /* 8-bit: Timer 2 PWM High Byte */#define Z16F_TIMER2_PWML _HX32(ffffe325) /* 8-bit: Timer 2 PWM Low Byte */#define Z16F_TIMER2_CTL _HX32(ffffe326) /* 16-bit: Timer 2 Control */#define Z16F_TIMER2_CTL0 _HX32(ffffe326) /* 8-bit: Timer 2 Control 0 */#define Z16F_TIMER2_CTL1 _HX32(ffffe327) /* 8-bit: Timer 2 Control 1 *//* Common timer0/1/2 register bit definitions ***************************************/#define Z16F_TIMERCTL0_TMODE _HX8(80) /* Bit 7: Timer mode */ /* Bits 5-6: Timer configuration, * Interpretation depends on timer mode */#define Z16F_TIMERCTL0_RELOAD _HX8(00) /* Interrupt occurs on reload or capture */#define Z16F_TIMERCTL0_IDISABLED _HX8(40) /* Disabled */#define Z16F_TIMERCTL0_IINACTIVE _HX8(40) /* Interrrupt occurs on inactive gate edge */#define Z16F_TIMERCTL0_ICAPTURE _HX8(40) /* Interrupt occurs on capture */#define Z16F_TIMERCTL0_IRELOAD _HX8(60) /* Interrupt occurs on reload */#define Z16F_TIMERCTL0_CASCADE _HX8(10) /* Bit 4: Timer is cascaded */ /* Bits 1-2: PW mode */#define Z16F_TIMERCTL0_NODELAY _HZ8(00) /* No delay */#define Z16F_TIMERCTL0_DELAY2 _HZ8(01) /* 2 cycle delay */#define Z16F_TIMERCTL0_DELAY4 _HZ8(02) /* 4 cycle delay */#define Z16F_TIMERCTL0_DELAY8 _HZ8(03) /* 8 cycle delay */#define Z16F_TIMERCTL0_DELAY16 _HZ8(04) /* 16 cycle delay */#define Z16F_TIMERCTL0_DELAY32 _HZ8(05) /* 32 cycle delay */#define Z16F_TIMERCTL0_DELAY64 _HZ8(06) /* 64 cycle delay */#define Z16F_TIMERCTL0_DELAY128 _HZ8(07) /* 128 cycle delay */#define Z16F_TIMERCTL1_TEN _HX8(80) /* Bit 7: Timer enable */#define Z16F_TIMERCTL1_TPOL _HX8(40) /* Bit 6: Input output polarity */ /* Bits 3-5: Timer prescale value */#define Z16F_TIMERSCTL1_DIV1 _HX8(00) /* Divide by 1 */#define Z16F_TIMERSCTL1_DIV2 _HX8(08) /* Divide by 2 */#define Z16F_TIMERSCTL1_DIV4 _HX8(10) /* Divide by 4 */#define Z16F_TIMERSCTL1_DIV8 _HX8(18) /* Divide by 8 */#define Z16F_TIMERSCTL1_DIV16 _HX8(20) /* Divide by 16 */#define Z16F_TIMERSCTL1_DIV32 _HX8(28) /* Divide by 32 */#define Z16F_TIMERSCTL1_DIV64 _HX8(30) /* Divide by 64 */#define Z16F_TIMERSCTL1_DIV128 _HX8(38) /* Divide by 128 */ /* Bits 0-2: Timer mode + CTL0 TMODE bit*/#define Z16F_TIMERSCTL1_ONESHOT _HX8(00) /* One shot mode (CTL0 TMOD = 0) */#define Z16F_TIMERSCTL1_PWMDO _HX8(00) /* One shot mode (CTL0 TMOD = 1) */#define Z16F_TIMERSCTL1_CONT _HX8(01) /* Continuous mode (CTL0 TMOD = 0)*/#define Z16F_TIMERSCTL1_CAPRST _HX8(01) /* Capture restart mode (CTL0 TMOD = 1)*/#define Z16F_TIMERSCTL1_COUNTER _HX8(02) /* Counter mode (CTL0 TMOD = 0)*/#define Z16F_TIMERSCTL1_CMPCNTR _HX8(02) /* Comparator counter mode (CTL0 TMOD = 1)*/#define Z16F_TIMERSCTL1_PWMSO _HX8(03) /* PWM single output mode (CTL0 TMOD = 0)*/#define Z16F_TIMERSCTL1_TRIGOS _HX8(03) /* Triggered one shot (CTL0 TMOD = 1)*/#define Z16F_TIMERSCTL1_CAPTURE _HX8(04) /* Capture mode (CTL0 TMOD = 0)*/#define Z16F_TIMERSCTL1_COMPARE _HX8(05) /* Compare mode (CTL0 TMOD = 0)*/#define Z16F_TIMERSCTL1_GATED _HX8(06) /* Gated mode (CTL0 TMOD = 0)*/#define Z16F_TIMERSCTL1_CAPCMP _HX8(07) /* Capture/Compare mode (CTL0 TMOD = 0)*//* Register access macros ***********************************************************/#ifndef __ASSEMBLY__# define getreg8(a) (*(ubyte volatile _Near*)(a))# define putreg8(v,a) (*(ubyte volatile _Near*)(a) = (v))# define getreg16(a) (*(uint16 volatile _Near*)(a))# define putreg16(v,a) (*(uint16 volatile _Near*)(a) = (v))# define getreg32(a) (*(uint32 volatile _Near*)(a))# define putreg32(v,a) (*(uint32 volatile _Near*)(a) = (v))#endif /* __ASSEMBLY__ *//************************************************************************************ * Public Function Prototypes ************************************************************************************/#ifndef __ASSEMBLY__#ifdef __cplusplus#define EXTERN extern "C"extern "C" {#else#define EXTERN extern#endif/* The following two routines are called from the low-level reset logic. z16f_lowinit() * must be provided by the board-specific logic; z16f_lowuartinit() is called only if * debugging support for up_lowputc (or getc) is enabled. */EXTERN void z16f_lowinit(void);#if defined(CONFIG_Z16_LOWPUTC) || defined(CONFIG_Z16_LOWGETC)EXTERN void z16f_lowuartinit(void);#endif/* This function handles Z16F system execeptions */EXTERN void z16f_sysexec(FAR chipreg_t *regs);/* Entry point to reset the processor */EXTERN void z16f_reset(void);#undef EXTERN#ifdef __cplusplus}#endif#endif /* __ASSEMBLY__ */#endif /* __Z16F_CHIP_H */
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