📄 chip.h
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#define Z16F_IRQ0_EN _HX32(ffffe032) /* 16-bit: IRQ0 Enable */#define Z16F_IRQ0_ENH _HX32(ffffe032) /* 8-bit: IRQ0 Enable High Bit */#define Z16F_IRQ0_ENL _HX32(ffffe033) /* 8-bit: IRQ0 Enable Low Bit */#define Z16F_IRQ1 _HX32(ffffe034) /* 8-bit: Interrupt Request 1 */#define Z16F_IRQ1_SET _HX32(ffffe035) /* 8-bit: Interrupt Request 1 Set */#define Z16F_IRQ1_EN _HX32(ffffe036) /* 16-bit: IRQ1 Enable */#define Z16F_IRQ1_ENH _HX32(ffffe036) /* 8-bit: IRQ1 Enable High Bit */#define Z16F_IRQ1_ENL _HX32(ffffe037) /* 8-bit: IRQ1 Enable Low Bit */#define Z16F_IRQ2 _HX32(ffffe038) /* 8-bit: Interrupt Request 2 */#define Z16F_IRQ2_SET _HX32(ffffe039) /* 8-bit Interrupt Request 2 Set */#define Z16F_IRQ2_EN _HX32(ffffe03a) /* 16-bit: IRQ2 Enable */#define Z16F_IRQ2_ENH _HX32(ffffe03a) /* 8-bit: IRQ2 Enable High Bit */#define Z16F_IRQ2_ENL _HX32(ffffe03c) /* 8-bit: IRQ2 Enable Low Bit *//* System exception status register bit definitions *********************************/#define Z16F_SYSEXCPH_SPOVF _HX8(80) /* Bit 7: Stack pointer overflow */#define Z16F_SYSEXCPH_PCOVF _HX8(40) /* Bit 6: Program counter overflow */#define Z16F_SYSEXCPH_DIV0 _HX8(20) /* Bit 5: Divide by zero */#define Z16F_SYSEXCPH_DIVOVF _HX8(10) /* Bit 4: Divide overflow */#define Z16F_SYSEXCPH_ILL _HX8(08) /* Bit 3: Illegal instruction */ /* Bits 0-2: Reserved */ /* Bits 3-7: Reserved */#define Z16F_SYSEXCPL_WDTOSC _HX8(04) /* Bit 2: WDT oscillator failure */#define Z16F_SYSEXCPL_PRIOSC _HX8(02) /* Bit 1: Primary oscillator failure */#define Z16F_SYSEXCPL_WDT _HX8(01) /* Bit 0: Watchdog timer interrupt */#define Z16F_SYSEXCP_SPOVF (Z16F_SYSEXCPH_SPOVF << 8)#define Z16F_SYSEXCP_PCOVF (Z16F_SYSEXCPH_PCOVF << 8)#define Z16F_SYSEXCP_DIV0 (Z16F_SYSEXCPH_DIV0 << 8)#define Z16F_SYSEXCP_DIVOVF (Z16F_SYSEXCPH_DIVOVF << 8)#define Z16F_SYSEXCP_ILL (Z16F_SYSEXCPH_ILL << 8)#define Z16F_SYSEXCP_WDTOSC Z16F_SYSEXCPL_WDTOSC#define Z16F_SYSEXCP_PRIOSC Z16F_SYSEXCPL_PRIOSC#define Z16F_SYSEXCP_WDT Z16F_SYSEXCPL_WDT/* Oscillator control registers *****************************************************/#define Z16F_OSC_CTL _HX32(ffffe0A0) /* 8-bit: Oscillator Control */#define Z16F_OSC_DIV _HX32(ffffe0A1) /* 8-bit: Oscillator Divide *//* Oscillator control register bits *************************************************/#define Z16F_OSCCTL_INTEN _HX8(80) /* Bit 7: Internal oscillator enabled */#define Z16F_OSCCTL_XTLEN _HX8(40) /* Bit 6: Crystal oscillator enabled */#define Z16F_OSCCTL_WDTEN _HX8(20) /* Bit 5: Watchdog timer enabled */#define Z16F_OSCCTL_POFEN _HX8(10) /* Bit 4: Failure detection enabled */#define Z16F_OSCCTL_WDFEN _HX8(08) /* Bit 3: WD Failuare detection enabled*/#define Z16F_OSCCTL_FLPEN _HX8(04) /* Bit 2: Flash low power enabled */#define Z16F_OSCCTL_INT56 _HX8(00) /* Bits 0-1=0: Intenal 5.6 MHz */#define Z16F_OSCCTL_EXTCLK _HX8(02) /* Bits 0-1=2: Extenal clock */#define Z16F_OSCCTL_WDT10KHZ _HX8(03) /* Bits 0-1=3: WD Timer 10 KHz*//* GPIO Port A-K ********************************************************************/#define Z16F_GPIOA_IN _HX32(ffffe100) /* 8-bits: Port A Input Data */#define Z16F_GPIOA_OUT _HX32(ffffe101) /* 8-bits: Port A Output Data */#define Z16F_GPIOA_DD _HX32(ffffe102) /* 8-bits: Port A Data Direction */#define Z16F_GPIOA_HDE _HX32(ffffe103) /* 8-bits: Port A High Drive Enable */#define Z16F_GPIOA_AF _HX32(ffffe104) /* 16-bits: Port A Alternate Function */#define Z16F_GPIOA_AFH _HX32(ffffe104) /* 8-bits: Port A Alternate Function High */#define Z16F_GPIOA_AFL _HX32(ffffe105) /* 8-bits: Port A Alternate Function Low */#define Z16F_GPIOA_OC _HX32(ffffe106) /* 8-bits: Port A Output Control */#define Z16F_GPIOA_PUE _HX32(ffffe107) /* 8-bits: Port A Pull-Up Enable */#define Z16F_GPIOA_SMRE _HX32(ffffe108) /* 8-bits: Port A Stop Mode Recovery En */#define Z16F_GPIOA_IMUX1 _HX32(ffffe10c) /* 8-bits: Port A IRQ Mux 1 */#define Z16F_GPIOA_IMUX _HX32(ffffe10e) /* 8-bits: Port A IRQ Mux */#define Z16F_GPIOA_IEDGE _HX32(ffffe10f) /* 8-bits: Port A IRQ Edge */#define Z16F_GPIOB_IN _HX32(ffffe110) /* 8-bits: Port B Input Data */#define Z16F_GPIOB_OUT _HX32(ffffe111) /* 8-bits: Port B Output Data */#define Z16F_GPIOB_DD _HX32(ffffe112) /* 8-bits: Port B Data Direction */#define Z16F_GPIOB_HDE _HX32(ffffe113) /* 8-bits: Port B High Drive Enable */#define Z16F_GPIOB_AFL _HX32(ffffe115) /* 8-bits: Port B Alternate Function Low */#define Z16F_GPIOB_OC _HX32(ffffe116) /* 8-bits: Port B Output Control */#define Z16F_GPIOB_PUE _HX32(ffffe117) /* 8-bits: Port B Pull-Up Enable */#define Z16F_GPIOB_SMRE _HX32(ffffe118) /* 8-bits: Port B Stop Mode Recovery En */#define Z16F_GPIOC_IN _HX32(ffffe120) /* 8-bits: Port C Input Data */#define Z16F_GPIOC_OUT _HX32(ffffe121) /* 8-bits: Port C Output Data */#define Z16F_GPIOC_DD _HX32(ffffe122) /* 8-bits: Port C Data Direction */#define Z16F_GPIOC_HDE _HX32(ffffe123) /* 8-bits: Port C High Drive Enable */#define Z16F_GPIOC_AF _HX32(ffffe124) /* 16-bits: Port C Alternate Function */#define Z16F_GPIOC_AFH _HX32(ffffe124) /* 8-bits: Port C Alternate Function High */#define Z16F_GPIOC_AFL _HX32(ffffe125) /* 8-bits: Port C Alternate Function Low */#define Z16F_GPIOC_OC _HX32(ffffe126) /* 8-bits: Port C Output Control */#define Z16F_GPIOC_PUE _HX32(ffffe127) /* 8-bits: Port C Pull-Up Enable */#define Z16F_GPIOC_SMRE _HX32(ffffe128) /* 8-bits: Port C Stop Mode Recovery En */#define Z16F_GPIOC_IMUX _HX32(ffffe12e) /* 8-bits: Port C IRQ Mux */#define Z16F_GPIOD_IN _HX32(ffffe130) /* 8-bits: Port D Input Data */#define Z16F_GPIOD_OUT _HX32(ffffe131) /* 8-bits: Port D Output Data */#define Z16F_GPIOD_DD _HX32(ffffe132) /* 8-bits: Port D Data Direction */#define Z16F_GPIOD_HDE _HX32(ffffe133) /* 8-bits: Port D High Drive Enable */#define Z16F_GPIOD_AF _HX32(ffffe134) /* 16-bits: Port D Alternate Function */#define Z16F_GPIOD_AFH _HX32(ffffe134) /* 8-bits: Port D Alternate Function High */#define Z16F_GPIOD_AFL _HX32(ffffe135) /* 8-bits: Port D Alternate Function Low */#define Z16F_GPIOD_OC _HX32(ffffe136) /* 8-bits: Port D Output Control */#define Z16F_GPIOD_PUE _HX32(ffffe137) /* 8-bits: Port D Pull-Up Enable */#define Z16F_GPIOD_SMRE _HX32(ffffe138) /* 8-bits: Port D Stop Mode Recovery En */#define Z16F_GPIOE_IN _HX32(ffffe140) /* 8-bits: Port E Input Data */#define Z16F_GPIOE_OUT _HX32(ffffe141) /* 8-bits: Port E Output Data */#define Z16F_GPIOE_DD _HX32(ffffe142) /* 8-bits: Port E Data Direction */#define Z16F_GPIOE_HDE _HX32(ffffe143) /* 8-bits: Port E High Drive Enable */#define Z16F_GPIOE_OC _HX32(ffffe146) /* 8-bits: Port E Output Control */#define Z16F_GPIOE_PUE _HX32(ffffe147) /* 8-bits: Port E Pull-Up Enable */#define Z16F_GPIOE_SMRE _HX32(ffffe148) /* 8-bits: Port E Stop Mode Recovery En */#define Z16F_GPIOF_IN _HX32(ffffe150) /* 8-bits: Port F Input Data */#define Z16F_GPIOF_OUT _HX32(ffffe151) /* 8-bits: Port F Output Data */#define Z16F_GPIOF_DD _HX32(ffffe152) /* 8-bits: Port F Data Direction */#define Z16F_GPIOF_HDE _HX32(ffffe153) /* 8-bits: Port F High Drive Enable */#define Z16F_GPIOF_AFL _HX32(ffffe155) /* 8-bits: Port F Alternate Function Low */#define Z16F_GPIOF_OC _HX32(ffffe156) /* 8-bits: Port F Output Control */#define Z16F_GPIOF_PUE _HX32(ffffe157) /* 8-bits: Port F Pull-Up Enable */#define Z16F_GPIOF_SMRE _HX32(ffffe158) /* 8-bits: Port F Stop Mode Recovery En */#define Z16F_GPIOG_IN _HX32(ffffe160) /* 8-bits: Port G Input Data */#define Z16F_GPIOG_OUT _HX32(ffffe161) /* 8-bits: Port G Output Data */#define Z16F_GPIOG_DD _HX32(ffffe162) /* 8-bits: Port G Data Direction */#define Z16F_GPIOG_HDE _HX32(ffffe163) /* 8-bits: Port G High Drive Enable */#define Z16F_GPIOG_AFL _HX32(ffffe165) /* 8-bits: Port G Alternate Function Low */#define Z16F_GPIOG_OC _HX32(ffffe166) /* 8-bits: Port G Output Control */#define Z16F_GPIOG_PUE _HX32(ffffe167) /* 8-bits: Port G Pull-Up Enable */#define Z16F_GPIOG_SMRE _HX32(ffffe168) /* 8-bits: Port G Stop Mode Recovery En */#define Z16F_GPIOH_IN _HX32(ffffe170) /* 8-bits: Port H Input Data */#define Z16F_GPIOH_OUT _HX32(ffffe171) /* 8-bits: Port H Output Data */#define Z16F_GPIOH_DD _HX32(ffffe172) /* 8-bits: Port H Data Direction */#define Z16F_GPIOH_HDE _HX32(ffffe173) /* 8-bits: Port H High Drive Enable */#define Z16F_GPIOH_AF _HX32(ffffe174) /* 16-bits: Port H Alternate Function */#define Z16F_GPIOH_AFH _HX32(ffffe174) /* 8-bits: Port H Alternate Function High */#define Z16F_GPIOH_AFL _HX32(ffffe175) /* 8-bits: Port H Alternate Function LOw */#define Z16F_GPIOH_OC _HX32(ffffe176) /* 8-bits: Port H Output Control */#define Z16F_GPIOH_PUE _HX32(ffffe177) /* 8-bits: Port H Pull-Up Enable */#define Z16F_GPIOH_SMRE _HX32(ffffe178) /* 8-bits: Port H Stop Mode Recovery En */#ifdef Z16F_HAVE_GPIO_PORTJ# define Z16F_GPIOJ_IN _HX32(ffffe180) /* 8-bits: Port J Input Data */# define Z16F_GPIOJ_OUT _HX32(ffffe181) /* 8-bits: Port J Output Data */# define Z16F_GPIOJ_DD _HX32(ffffe182) /* 8-bits: Port J Data Direction */# define Z16F_GPIOJ_HDE _HX32(ffffe183) /* 8-bits: Port J High Drive Enable */# define Z16F_GPIOJ_OC _HX32(ffffe186) /* 8-bits: Port J Output Control */# define Z16F_GPIOJ_PUE _HX32(ffffe187) /* 8-bits: Port J Pull-Up Enable */# define Z16F_GPIOJ_SMRE _HX32(ffffe188) /* 8-bits: Port J Stop Mode Recovery En */#endif#ifdef Z16F_HAVE_GPIO_PORTK# define Z16F_GPIOK_IN _HX32(ffffe190) /* 8-bits: Port K Input Data */# define Z16F_GPIOK_OUT _HX32(ffffe191) /* 8-bits: Port K Output Data */# define Z16F_GPIOK_DD _HX32(ffffe192) /* 8-bits: Port K Data Direction */# define Z16F_GPIOK_HDE _HX32(ffffe193) /* 8-bits: Port K High Drive Enable */# define Z16F_GPIOK_AFL _HX32(ffffe195) /* 8-bits: Port K Alternate Function Low */# define Z16F_GPIOK_OC _HX32(ffffe196) /* 8-bits: Port K Output Control */# define Z16F_GPIOK_PUE _HX32(ffffe197) /* 8-bits: Port K Pull-Up Enable */# define Z16F_GPIOK_SMRE _HX32(ffffe198) /* 8-bits: Port K Stop Mode Recovery En */#endif/* UART Register Offsets *************************************************************/#define Z16F_UART_TXD _HX8(00) /* 8-bits: UART Transmit Data */#define Z16F_UART_RXD _HX8(00) /* 8-bits: UART Receive Data */#define Z16F_UART_STAT0 _HX8(01) /* 8-bits: UART Status 0 */#define Z16F_UART_CTL _HX8(02) /* 16-bits: UART Control */#define Z16F_UART_CTL0 _HX8(02) /* 8-bits: UART Control 0 */#define Z16F_UART_CTL1 _HX8(03) /* 8-bits: UART COntrol 1 */#define Z16F_UART_MDSTAT _HX8(04) /* 8-bits: UART Mode Select & Status */#define Z16F_UART_ADDR _HX8(05) /* 8-bits: UART Address Compare */#define Z16F_UART_BR _HX8(06) /* 16-bits: UART Baud Rate */#define Z16F_UART_BRH _HX8(06) /* 8-bits: UART Baud Rate High Byte */#define Z16F_UART_BRL _HX8(07) /* 8-bits: UART Baud Rate Low Byte */#define Z16F_UART0_BASE _HX32(ffffe200) /* UART0 Register Base Address */#define Z16F_UART1_BASE _HX32(ffffe210) /* UART1 Register Base Address *//* UART0/1 Registers ****************************************************************/#define Z16F_UART0_TXD _HX32(ffffe200) /* 8-bits: UART0 Transmit Data */#define Z16F_UART0_RXD _HX32(ffffe200) /* 8-bits: UART0 Receive Data */#define Z16F_UART0_STAT0 _HX32(ffffe201) /* 8-bits: UART0 Status 0 */#define Z16F_UART0_CTL _HX32(ffffe202) /* 16-bits: UART0 Control */#define Z16F_UART0_CTL0 _HX32(ffffe202) /* 8-bits: UART0 Control 0 */#define Z16F_UART0_CTL1 _HX32(ffffe203) /* 8-bits: UART0 COntrol 1 */#define Z16F_UART0_MDSTAT _HX32(ffffe204) /* 8-bits: UART0 Mode Select & Status */#define Z16F_UART0_ADDR _HX32(ffffe205) /* 8-bits: UART0 Address Compare */#define Z16F_UART0_BR _HX32(ffffe206) /* 16-bits: UART0 Baud Rate */#define Z16F_UART0_BRH _HX32(ffffe206) /* 8-bits: UART0 Baud Rate High Byte */#define Z16F_UART0_BRL _HX32(ffffe207) /* 8-bits: UART0 Baud Rate Low Byte */
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