chip.h

這是一個實時嵌入式作業系統 實作了MCS51 ARM等MCU

/************************************************************************************
 * arch/z16/src/z16f/chip.h
 * include/arch/chip/chip.h
 *
 *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
 *   Author: Gregory Nutt <[e-mail]>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 * 3. Neither the name NuttX nor the names of its contributors may be
 *    used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 ************************************************************************************/

#ifndef __Z16F_CHIP_H
#define __Z16F_CHIP_H

/************************************************************************************
 * Included Files
 ************************************************************************************/

#include <nuttx/config.h>
#include <arch/irq.h>
#include "common/up_internal.h"

/************************************************************************************
 * Definitions
 ************************************************************************************/

/* Hexadecimal Representation *******************************************************/

#ifdef __ASSEMBLY__
# define _HX32(w)   %##w
# define _HX8(b)    %##b
#else
# define _HX32(w)   0x##w
# define _HX8(b)    0x##b
#endif

/* Z16F Chip Variants ***************************************************************/
 
#if defined(CONFIG_ARCH_CHIP_Z16F2810)
# define Z16F_INVMEM_SIZE     (128*1024)
# define Z16F_IRAM_SIZE       (4*1024)
# undef  Z16F_HAVE_EXTMEM
# undef  Z16F_HAVE_GPIO_PORTJ
# undef  Z16F_HAVE_GPIO_PORTK
#elif defined(CONFIG_ARCH_CHIP_Z16F2811)
# define Z16F_INVMEM_SIZE     (128*1024)
# define Z16F_IRAM_SIZE       (4*1024)
# define Z16F_HAVE_EXTMEM     1
# define Z16F_HAVE_GPIO_PORTJ 1
# define Z16F_HAVE_GPIO_PORTK 1
#elif defined(CONFIG_ARCH_CHIP_Z16F3211)
# define Z16F_INVMEM_SIZE     (32*1024)
# define Z16F_IRAM_SIZE       (2*1024)
# define Z16F_HAVE_EXTMEM      1
#elif defined(CONFIG_ARCH_CHIP_Z16F6411)
# define Z16F_INVMEM_SIZE     (64*1024)
# define Z16F_IRAM_SIZE       (4*1024)
# define Z16F_HAVE_EXTMEM     1
#else
# error "Z16F chip variant not specified"
#endif

/* Flash option settings at address 0x00000000 ************************************/

#define Z16F_FLOPTION0          rom char _flash_option0 _At 0x0
#define Z16F_FLOPTION1          rom char _flash_option1 _At 0x1
#define Z16F_FLOPTION2          rom char _flash_option2 _At 0x2
#define Z16F_FLOPTION3          rom char _flash_option3 _At 0x3

#define Z16F_FLOPTION0_EXTRNRC  _HX8(00) /* Bits 6-7: OSC_SEL */
#define Z16F_FLOPTION0_LOWFREQ  _HX8(40)
#define Z16F_FLOPTION0_MEDFREQ  _HX8(80)
#define Z16F_FLOPTION0_MAXPWR   _HX8(c0)
#define Z16F_FLOPTION0_WDTRES   _HX8(20) /* Bit 5 */
#define Z16F_FLOPTION0_WDTA0    _HX8(10) /* Bit 4 */
#define Z16F_FLOPTION0_VBOA0    _HX8(08) /* Bit 3 */
#define Z16F_FLOPTION0_DBGUART  _HX8(04) /* Bit 2 */
#define Z16F_FLOPTION0_FWP      _HX8(02) /* Bit 1 */
#define Z16F_FLOPTION0_RP       _HX8(01) /* Bit 0 */

#define Z16F_FLOPTION1_RESVD    _HX8(f8) /* Bits 3-7: reserved */
#define Z16F_FLOPTION1_MCEN     _HX8(04) /* Bit 2: Motor control pins enable */
#define Z16F_FLOPTION1_OFFH     _HX8(02) /* High side OFF */
#define Z16F_FLOPTION1_OFFL     _HX8(01) /* Low side OFF */

#define Z16F_FLOPTION2_RESVD    _HX8(ff) /* Bits 0-7: reserved */

#define Z16F_FLOPTION3_RESVD    _HX8(bf) /* Bits 0-5,7: reserved */
#define Z16F_FLOPTION3_NORMAL   _HX8(40) /* Bit 6: 1:Normal 0:Low power mode */

/* Memory areas *******************************************************************
 *
 * Internal non-volatile memory starts at address zero.  The size
 * of the internal non-volatile memory is chip-dependent.
 */
 
#define Z16F_INVMEM_BASE        _HX32(00000000)

/* Most chip variants support external memory */

#ifdef Z16F_HAVE_EXTMEM
#  define Z16F_EXTMEMCS0_BASE   _HX32(00020000) /* External memory at CS0 */
#  define Z16F_EXTMEMCS0_SIZE   _HX32(007e0000) /*   (actual depends on board) */
#  define Z16F_EXTMEMCS1_BASE   _HX32(ff800000) /* External memory at CS1 */
#  define Z16F_EXTMEMCS1_SIZE   _HX32(00700000) /*   (actual depends on board) */
#  define Z16F_EXTMEMCS2A_BASE  _HX32(fff00000) /* External memory at CS2 */
#  define Z16F_EXTMEMCS2A_SIZE  _HX32(000f8000) /*   (actual depends on board) */
#  define Z16F_EXTMEMCS2B_BASE  _HX32(ffffc000) /* External memory at CS2 */
#  define Z16F_EXTMEMCS2B_SIZE  _HX32(00000800) /*   (actual depends on board) */
#endif

/* Internal RAM always ends at 0xffbfff.  The IRAM base address depends
 * on the size of the IRAM supported by the chip.
 */
 
#define Z16F_IRAM_BASE          (_HX32(ffffc000) - Z16F_IRAM_SIZE)

/* External memory mapped peripherals, internal I/O memory and SFRS */

#define Z16F_EXTIO_BASE         _HX32(ffffc800) /* External peripherals CS3-5 */
#define Z16F_EXTIO_SIZE         _HX32(00001800)
#define Z16F_IIO_BASE           _HX32(ffffe000) /* Internal I/O memory and SFRs */
#define Z16F_IIO_SIZE           _HX32(00001fff)

/* Control Registers  ***************************************************************/

#define Z16F_CNTRL_PCOV         _HX32(ffffe004) /* 32-bits: Program counter overflow */
#define Z16F_CNTRL_SPOV         _HX32(ffffe00c) /* 32-bits: Stack pointer overflow */
#define Z16F_CNTRL_FLAGS        _HX32(ffffe100) /*  8-bits: flags */
#define Z16F_CNTRL_CPUCTL       _HX32(ffffe102) /*  8-bits: CPU control */

/* Flag register bits ***************************************************************/

#define Z16F_CNTRL_FLAGS_C      _HX8(80)        /* Bit 7: Carry flag */
#define Z16F_CNTRL_FLAGS_Z      _HX8(40)        /* Bit 6: Zero flag */
#define Z16F_CNTRL_FLAGS_S      _HX8(20)        /* Bit 5: Sign flag */
#define Z16F_CNTRL_FLAGS_V      _HX8(10)        /* Bit 4: Overflow flag */
#define Z16F_CNTRL_FLAGS_B      _HX8(08)        /* Bit 3: Blank flag */
#define Z16F_CNTRL_FLAGS_F1     _HX8(04)        /* Bit 2: User flag 1 */
#define Z16F_CNTRL_FLAGS_CIRQE  _HX8(02)        /* Bit 1: Chained interrupt enable */
#define Z16F_CNTRL_FLAGS_IRQE   _HX8(01)        /* Bit 0: Master interrupt enable */

/* CPU control register bits ********************************************************/

                                                /* Bits 7-2: Reserved, must be zero */
                                                /* Bits 1-0: DMA bandwidth control */
#define Z16F_CNTRL_CPUCTL_BWALL _HX8(00)        /*   DMA can consume 100% bandwidth */
#define Z16F_CNTRL_CPUCTL_BW11  _HX8(01)        /*   DMA can do 1 transaction per 1 cycle */
#define Z16F_CNTRL_CPUCTL_BW12  _HX8(01)        /*   DMA can do 1 transaction per 2 cycles */
#define Z16F_CNTRL_CPUCTL_BW13  _HX8(01)        /*   DMA can do 1 transaction per 3 cycles */

/* Trace registers ******************************************************************/

#define Z16F_TRACE_CTL          _HX32(ffffe013) /*  8-bit: Trace Control */
#define Z16F_TRACE_ADDR         _HX32(ffffe014) /* 32-bit: Trace Address */

/* Interrupt controller registers ***************************************************/

#define Z16F_SYSEXCP            _HX32(ffffe020) /* 16-bit: System Exception Status */
#define Z16F_SYSEXCPH           _HX32(ffffe020) /*  8-bit: System Exception Status High */
#define Z16F_SYSEXCPL           _HX32(ffffe021) /*  8-bit: System Exception Status Low */
#define Z16F_LASTIRQ            _HX32(ffffe023) /*  8-bit: Last IRQ Register */
#define Z16F_IRQ0               _HX32(ffffe030) /*  8-bit: Interrupt Request 0 */
#define Z16F_IRQ0_SET           _HX32(ffffe031) /*  8-bit: Interrupt Request 0 Set */