📄 dsp105.asm
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; LACL PCDATDIR
; OR #0100B ;Set IOPC2=1
; AND #0FFF7H ;Clear IOPC3=0
; SACL PCDATDIR
; LDP #4
; SBIT0 RUN_FLAG,B8_MSK ;Clear INV STS ON Flag
; SBIT1 RUN_FLAG,B1_MSK ;Set INV mode flag
; SBIT0 RUN_FLAG,B0_MSK ;Clear bypass mode flag
; SBIT0 RUN_FLAG,B2_MSK ;Clear backup mode flag
; SBIT0 PHASE_FLAG,B9_MSK
REGINVF26
SETC SXM
; CALL S_REGULATEINV
LDP #4
;---------------------------------------------
LACL NEW2_CNT ;CAL Phase-diff(NOT Revise)
SUB NEW1_CNT
BCND PHASE_DIFF01,GT
SPLK #0FFFFH,GPR4
ADDS GPR4
PHASE_DIFF01
SACL INV_TD
;---------------------------------------------
; LACL INV_TM ;CAL Freq-diff
; SUB NEWF_TM
; SACL FREQ_DIFF
LACL NEWF_TM
SUB INV_TM
SACL FREQ_DIFF
;--------------------------------------------
LACL SIN_AMP
SUB #2000H
BCND CAP_END,LT
BIT RUN_FLAG,BIT9
BCND F_TooHL,TC
; B F_TooHL
; BIT PHASE_FLAG,BIT2 ;Lock Phase is Going?
; BCND PHASE_CHG,TC
B PHASE_CHG
B CAP_END
F_REGULATE:
LDP #4
; SETC SXM
; LACC FREQ_DIFF
; SUB #8 ;if abs(INV_TM-LINEF)>16uS thus Regulate Freq 20
; BCND INVF_INC,GT
; LACC FREQ_DIFF
; SUB #-8 ;-20
; BCND INVF_DEC,LT
PHASE_CHG
LACC INV_TM ;Calculate Phase-Diff(Revise)
SFR
SUB INV_TD ;INV_TM/2-INV_TD>0?
BCND THETA_0,LT
LACC INV_TD ;INV_TM/2-INV_TD>0 Phase-Diff=INV_TD
SACL PHASE_DIFF
B INVLAGLINE
THETA_0
LACC INV_TM
SUB INV_TD
BCND INVLEADLINE,GEQ
ABS ;INV_TM/2<=INV_TD and INV_TM-INV_TD<0
SACL PHASE_DIFF
INVLAGLINE
SBIT1 PHASE_FLAG,B0_MSK ;SET INV LAG FLAG
; SBIT0 PHASE_FLAG,B1_MSK ;Clear INV Leading Flag
B THETA_2
INVLEADLINE
SACL PHASE_DIFF
; SBIT1 PHASE_FLAG,B1_MSK ;SET INV Leading FLAG
SBIT0 PHASE_FLAG,B0_MSK ;Clear INV lag FLAG
THETA_2
LACC PHASE_DIFF
SUB #8 ;62*50ns*16=50uS
BCND PHASE_OK,LT
LACC PHASE_DIFF
SUB #146 ;375*50ns*16=300uS
BCND PHASE_BAD,GT
; SBIT1 PHASE_FLAG,B3_MSK ;SET Lock Phase OK Flag
B LOCK_PHASE
PHASE_OK
SBIT1 PHASE_FLAG,B3_MSK ;SET LOCK_PHASE OK FLAG
; SBIT0 PHASE_FLAG,B2_MSK ;Clear PL Going Flag
B LOCK_PHASE
; B CAP_END
PHASE_BAD
SBIT0 PHASE_FLAG,B3_MSK ;Clear Lock Phase OK Flag
LOCK_PHASE
; SBIT1 PHASE_FLAG,B2_MSK
; LACC PHASE_DIFF
; SFR
; ADD PHASE_DIFF
; SACL PHASE_DIFF
SETC SXM
LACC FREQ_DIFF
BCND LOCK_PHASE20,LT
BIT PHASE_FLAG,BIT0
BCND LOCK_PHASE10,NTC ;TC
LACC FREQ_DIFF ;FREQ_DIFF>0,PHASE_DIFF>0,I
ADD #1
SACL PHASE_TMP
LT FREQ_DIFF
MPY PHASE_TMP
PAC
SFR
SUB PHASE_DIFF
BCND INVF_INC,LT
B INVF_DEC
LOCK_PHASE10
B INVF_DEC ;FREQ_DIFF>0,PHASE_DIFF<=0 II
LOCK_PHASE20
BIT PHASE_FLAG,BIT0
BCND LOCK_PHASE30,TC ; ;NTC
LACC FREQ_DIFF ;FREQ_DIFF<=0,PHASE_DIFF<0 III
ABS
SACL PHASE_TMP1
ADD #1
SACL PHASE_TMP
LT PHASE_TMP
MPY PHASE_TMP1
PAC
SFR
SUB PHASE_DIFF
BCND INVF_DEC,LT
B INVF_INC
LOCK_PHASE30
B INVF_INC ;FREQ_DIFF<=0,PHASE_DIFF>0 IV
F_TooHL
SBIT0 PHASE_FLAG,B3_MSK
LACL INV_TM
SUB SETF_TM
BCND FREQ_INCTO50,GT
BCND FREQ_DECTO50,LT
B CAL_INVSTEP
FREQ_DECTO50
LACL INV_TM
ADD #FREQCHG2
SACL INV_TM
SBIT0 PHASE_FLAG,B8_MSK
; SBIT0 PHASE_FLAG,B2_MSK ;Clear PLL Going Flag
SBIT0 PHASE_FLAG,B3_MSK
B CAL_INVSTEP
FREQ_INCTO50
LACL INV_TM
SUB #FREQCHG2
SACL INV_TM
SBIT0 PHASE_FLAG,B8_MSK
; SBIT0 PHASE_FLAG,B2_MSK ;Clear PLL Going Flag
SBIT0 PHASE_FLAG,B3_MSK
B CAL_INVSTEP
INVF_DEC
SBIT0 PHASE_FLAG,B8_MSK
; SBIT0 PHASE_FLAG,B2_MSK ;Clear PLL Going Flag
LACL INV_TM
ADD #FREQCHG1
SACL INV_TM
B CAL_INVSTEP
INVF_INC
SBIT0 PHASE_FLAG,B8_MSK
; SBIT0 PHASE_FLAG,B2_MSK ;Clear PLL Going Flag
LACL INV_TM
SUB #FREQCHG1
SACL INV_TM
CAL_INVSTEP
CLRC SXM
LDP #4
LACC INV_TM,3
SACL INV_CAL
SUB FREQ_MAX ;5DE8H
BCND CAL_INVSTEP10,LT
LACL INV_CAL
SUB FREQ_MIN ;65E8H
BCND CAL_INVSTEP20,LT
BLDD #FREQ_MIN,INV_CAL
B CAL_INVSTEP20
CAL_INVSTEP10
BLDD #FREQ_MAX,INV_CAL
CAL_INVSTEP20
CLRC SXM
LACC #3E80H,15 ;Q15
RPT #15
SUBC INV_CAL
SACL NEW_INV ;Q15/Q3=Q12
LACC NEW_INV,4 ;Q16
SACH NEW_STEP
SACL NEW_REDI
B CAP_END
LDP #4
LACC INV_TM
RPT #(4-1)
SFR
SACL NEW_STEP
CLRC SXM
LACC INV_TM,12
SACL NEW_REDI
SETC SXM
CAP_END
SETC INTM
POP_ALL
CLRC INTM
RET
;========================================================================
;SWI - 20MS software interupt
;Description:
;Designer: Yu Hongquan Last Update:2000/4/6
;=====================================================================
SW_20MS_ISR
PUSH_ALL
CLRC INTM
SETC SXM
LDP #4
LACL SQUARE_DPT
ADD #1
SACL SQUARE_DPT
BIT RUN_FLAG1,BIT12 ;new
BCND SW_20MS_10,NTC
LDP #6
LACC BATMODE_DLY
ADD #1
SACL BATMODE_DLY
SUB #250
BCND SW_20MS_10,LT
SPLK #0,BATMODE_DLY
LDP #4
SBIT0 RUN_FLAG1,B12_MSK
SW_20MS_10
LDP #4
BLDD LNAD_DT,#DIVISOR1 ;计算市电平方和/N
ZALH LINV_H1
ADDS LINV_L1
SETC INTM
CALL DIVU32_16
CLRC INTM
LDP #4
SACL LINV_L
SACH LINV_H
BLDD INVAD_DT,#DIVISOR1 ;计算逆变平方和/N
ZALH INVV_H1
ADDS INVV_L1
SETC INTM
CALL DIVU32_16
CLRC INTM
LDP #4
SACL INVV_L
SACH INVV_H
BIT RUN_FLAG,BIT0 ;计算电流平方和/N
BCND CURRENT_BY,TC
BLDD INVAD_DT,#DIVISOR1
B CURRENT_CAL
CURRENT_BY
BLDD LNAD_DT,#DIVISOR1
CURRENT_CAL
ZALH CURRENT_H1
ADDS CURRENT_L1
SETC INTM
CALL DIVU32_16
CLRC INTM
LDP #4
ADDS CURRENT_L
ADDH CURRENT_H
SACL CURRENT_L
SACH CURRENT_H
LACC WATT_H1,16 ;计算瓦特
ADDS WATT_L1
SETC INTM
CALL DIVU32_16
CLRC INTM
LDP #4
ADDS WATT_L
ADD WATT_H,16
SACL WATT_L
SACH WATT_H
BLDD INVAD_DT,#DIVISOR1 ;计算输入电流平方和/N
LDP #6
ZALH ICURRENT_H1
ADDS ICURRENT_L1
SETC INTM
CALL DIVU32_16
CLRC INTM
LDP #6
ADDS ICURRENT_L
ADDH ICURRENT_H
SACL ICURRENT_L
SACH ICURRENT_H
; BIT SQUARE_DPT,BIT0
; BCND S_INVVRMS,TC
LDP #4 ;计算市电电压有效值
LACL LINV_L ;SQUARE_DPT is even
ADDH LINV_H ;CAL LINEVOLT
CALL SQRT_32
LDP #4
SACL R3 ;new
BIT RUN_FLAG,BIT1 ;01-7-6 17:38
BCND LINE_HIGH,NTC ;检测市电电压过高引起的BUS电压过高
SUB #V330
BCND LINE_HIGH,LT
LACL VbusNV
SUB #BUS_HMAX
BCND LINE_OVER,GT
LACL VbusPV
SUB #BUS_HMAX
BCND LINE_HIGH,LT ;line_over????
LINE_OVER ;
CALL S_INVTOBAT
LDP #4
LINE_HIGH ;
; BIT RUN_FLAG,BIT0
; BCND LINE_HIGH0,NTC
; BIT ERR_FLAG,BIT6
; BCND LINE_HIGH0,TC
; LACL R3
; SUB #LINE_H ;250V
; BCND LINE_HIGH0,LT
; IPRLY_OFF
; SBIT1 ERR_FLAG,B6_MSK ;BYPASS LINE VOLTAGE HIGH
; SBIT1 ERR_FLAG,B15_MSK
; CALL S_BYPASACT
;LINE_HIGH0
; SPLK #0,LINV_L
; SPLK #0,LINV_H
CALL S_FLTA
LDP #4 ;以固定AD点计算电流有效值，不滤波，
BLDD INVAD_DT,#DIVISOR1 ;作为短路电流判断的依据
ZALH CURRENT_H1
ADDS CURRENT_L1
SETC INTM
CALL DIVU32_16
CLRC INTM
LDP #6
SACL CURRENT_LL
SACH CURRENT_HH
CALL SQRT_32
SFL ;*2
LDP #6
SACL CURR_RMS
S_INVVRMS ;计算逆变电压有效值
LDP #4
LACL INVV_L
ADDH INVV_H
CALL SQRT_32
LDP #4
SACL R3
SACL INVV_REGU
LT R3
MPY #819 ;Q10,0.8
PAC
LDP #5
SACH VINV1,6
LDP #4
SPLK #0,INVV_L
SPLK #0,INVV_H
CALL S_FLTB
LDP #4 ;CAL CUR_RMS every 32 PERIOD
; LACL SQUARE_DPT
; AND #11b
; SUB #11b
; BCND S_WATT_ROOT,NEQ
LACL CURRENT_L
ADDH CURRENT_H
SPLK #0,CURRENT_L
SPLK #0,CURRENT_H
; RPT #(2-1) ;CURV/32*2(Because cal one times per 32 period)
; SFR
CALL SQRT_32
LDP #4
SACL R3
LACC CUR_RMS
SACL R1
LACC CUR_FLT
SACL P_FLT
CALL S_FLTP
LDP #4
LACL R1
SACL CUR_RMS
SUB #2
BCND CUR_GTZERO,GT
SPLK #0,CUR_RMS
CUR_GTZERO
LACC P_FLT
SACL CUR_FLT
LDP #6 ;计算输入电流有效值
LACL ICURRENT_L
ADDH ICURRENT_H
SPLK #0,ICURRENT_L
SPLK #0,ICURRENT_H
; RPT #(2-1) ;CURV/32(Because cal one times per 32 period)
; SFR
CALL SQRT_32
LDP #4
SACL R3
LDP #6
LACC ICUR_RMS
LDP #4
SACL R1
LDP #6
LACC ICUR_FLT
LDP #4
SACL P_FLT
CALL S_FLTP
LDP #4
LACC R1
LDP #6
SACL ICUR_RMS
SUB #2
BCND ICUR_GTZERO,GT
SPLK #0,ICUR_RMS
ICUR_GTZERO
LDP #4
LACC P_FLT
LDP #6
SACL ICUR_FLT
LDP #4
;-------------------------------------------------------------------------
BIT RUN_FLAG,BIT0 ;计算视在功率:VOLT_AMP=V*I/4
BCND BY_VA,TC
LT INVVOLT
B S_VA
BY_VA
LACC LINEVOLT,6
RPT #15
SUBC CUR_RMS
LDP #5
SACL IMP
LDP #4
LT LINEVOLT
S_VA MPY CUR_RMS
PAC
SFR ;/4
SFR
SACL VOLT_AMP
;-----------------------------------------------------------------------
S_WATT_ROOT ;filter WATT every 16 Period, WATT=P/16
; LACC SQUARE_DPT
; AND #111B
; SUB #111B
; BCND SW_20MS_END,NEQ
LACL WATT_L
ADDH WATT_H
SPLK #0,WATT_L
SPLK #0,WATT_H
RPT #(2-1) ;/8/4
SFR
SACL R3
LACC WATT
SACL R1
LACC WATT_FLT
SACL P_FLT
CALL S_FLTP
LDP #4
LACC R1
ABS
SACL WATT
LACC P_FLT
SACL WATT_FLT
;-----------------------------------------------------------------------
SW_20MS_END
LDP #6
LACC VbatV_SUM
RPT #15
SUBC VbatV_CNT
LDP #4
SACL VbatV
LDP #6
LACC Tsink_SUM
RPT #15
SUBC VbatV_CNT
SPLK #0,VbatV_CNT
SPLK #0,VbatV_SUM
SPLK #0,Tsink_SUM
LDP #4
SACL TEMPER
NOP
SETC INTM
POP_ALL
CLRC INTM
RET
;=====================================================================
;ISR - RTI
;Description:produce 1ms INT
;Designer: Yu Hongquan Last Update:2000/4/6
;=====================================================================
GISR1 PUSH_ALL
LDP #5
LACL RMS_DR
ADD #1
SACL RMS_DR
SUB #20
BCND SWI_1MS,LEQ
SPLK #0,RMS_DR
INTR 8
SWI_1MS
INTR 9
SETC INTM
POP_ALL
CLRC INTM
RET
;=========================================================================
; 1ms INT ISR
;=========================================================================
ISR_1MS
PUSH_ALL
CLRC INTM ;enable INT
ISR_1MS00
LDP #5
LACL T1MS_DR
ADD #1
SACL T1MS_DR
LDP #6
LACL SHORT_CNT
SUB #3C0H ;15
BCND ISR_1MS05,GT
SPLK #0,SHORT_CNT
B ISR_1MS08
ISR_1MS05
LDP #4
SBIT1 FAULT_FLAG,B8_MSK
SBIT1 FAULT_FLAG,B15_MSK
CALL S_BYPASACT
ISR_1MS08
LDP #225
BIT PBDATDIR,BIT7
BCND ISR_1MS10,NTC
LDP #6
LACC STS_DLY
ADD #1
SACL STS_DLY
SUB #10
BCND ISR_1MS10,LT
SPLK #0,STS_DLY
; BYPSTS_OFF
ISR_1MS10
LDP #5
LACL T1MS_DR
AND #11b
SACL GPR8
BCND T16MS0,EQ
SUB #01b
BCND T16MS1,EQ
LACL GPR8
SUB #10b
BCND T32MS0,EQ
; CALL S_LVFAILCHK
ISR_1MSEND
SETC INTM ;Diable INT and restroe context
POP_ALL
CLRC INTM
RET
T16MS0
LACL T1MS_DR
AND #1100B
SFR
SFR
ADD #T16MS_SUB0
TBLR GPR8
LACC GPR8
BACC
T16MS1
LACL T1MS_DR
AND #1100B
SFR
SFR
ADD #T16MS_SUB1
TBLR GPR8
LACC GPR8
BACC
T32MS0
LACL T1MS_DR
AND #11100B
SFR
SFR
ADD #T32MS_SUB0
TBLR GPR8
LACC GPR8
BACC
;==================================================================
CONST .WORD 3333H,4CCCH,16A0H
T16MS_SUB0 .WORD S_LINEVCHK,S_INVTERCHK,S_FREQCHK,S_REGULATE
T16MS_SUB1 .WORD S_BUSVOLTCHK,S_BATTOINV,S_BATVCHK,S_SOFTSTART
T32MS_SUB0 .WORD S_TEST,S_TEMPPT,S_DEGRADE,S_OVERLOAD
.WORD S_SHUTDOWN,S_NULLTASK,S_SCALE,S_TRAINDATA
; BIT0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
FAULT_CODE .WORD 00H,00H,47H,47H,38H,44H,20H,47H,4FH,4BH,4CH,4DH,4EH,4AH,47H ;
ERR_CODE .WORD 10H,10H,11H,11H,00H,00H,36H,21H,12H,13H,14H,24H,23H,71H,00H
FAIL_CODE .WORD 32H,33H,34H,39H,00H,37H,00H,00H,00H,41H,00H,00H,00H,00H,00H ;⌨️ 快捷键说明
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