dsp105.asm

基于TMS320F2407的UPS控制系统

VDC_E		.usect	"PAGE6",1
TIAOL_CNT	.usect	"PAGE6",1
RSD_CNT		.usect	"PAGE6",1
KSD_CNT		.usect	"PAGE6",1
LOADPER_SUM	.usect	"PAGE6",1
LOADPER_CNT	.usect	"PAGE6",1

NEU_CNT		.usect	"PAGE6",1
NEU_CNT1	.usect	"PAGE6",1

CURRENT_LL	.usect	"PAGE6",1
CURRENT_HH	.usect	"PAGE6",1
CURR_RMS	.usect	"PAGE6",1

LOAD100_CNT	.usect	"PAGE6",1
ViSUM1		.usect	"PAGE6",1
ViAD_CNT1		.usect	"PAGE6",1
QUARTE		.usect	"PAGE6",1

;=====================================================================
; M A I N   C O D E  - starts here
;=====================================================================

		.text
START		
		LDP	#0
		SETC	INTM    		;Disable interrupts
		SPLK	#0h,IMR			;Mask all core interrupts
		LACL	IFR			;Read Interrupt flags
		SACL	IFR			;Clear all interrupt flags

		CLRC	SXM			;Clear Sign Extension Mode
		CLRC	OVM			;Reset Overflow Mode
		CLRC	CNF			;Config Block B0 to Data mem
		LAR	AR7,#STACK_PTR		;AR7 for soft stack only
		
;=======================================================================
;			Config System Module
;-----------------------------------------------------------------------
		LDP   	#00E0h			;DP for addresses 7000h-707Fh
		SPLK	#006Fh,WDCR		;Disable WD if VCCP=5V (JP1 in pos. 1-2)
;		SPLK	#07H,RTICR		;Clear RTI Flag,Set RTI=1MS overflow(max) 
		LACC	CKCR0					
		OR	#01H			;set PLLPS=1
		SACL	CKCR0			;SYSCLK=CPUCLK/2
		
PORCHK		BIT	SYSSR,BIT15	;if Power ON reset continue,else branch to next reset source
		BCND	ILLCHK,NTC
;		BCND	PORCHK,NTC
		
MAIN:		
		LDP	#0E0H
		SPLK  	#00BBh,CKCR1		;CLKIN(OSC)=10MHz,CPUCLK=20MHz
		SPLK  	#00C3h,CKCR0		;CLKMD=PLL Enable,SYSCLK=CPUCLK/2
		
		LACC	SYSSR			;Clear all reset status bits
		AND	#0FFH
		SACL	SYSSR
	
		
		SPLK  	#4000h,SYSCR		;CLKOUT=CPUCLK

PLL_CHK		SPLK	#11000011B,CKCR0	;wait until PLL is locked before executing main section
		BIT	CKCR0,BIT5		;Bits 5,4 are 1X when PLL is working
		BCND	PLL_CHK,NTC

		CALL INITI
;		LDP	#4
;		SPLK	#SIN_TAB,SIN_ADDR
;		SPLK	#SIN_TABEND,SIN_ADDRE
;		SPLK	#SIN_TAB,SIN_POINTER
;		SPLK	#5H,STEP
;		SPLK	#5H,NEW_STEP
;		SPLK	#1EB0H,REDI
;		SPLK	#1EB0H,NEW_REDI
		
;		SBIT1	RUN_FLAG,B0_MSK
;		SBIT0	RUN_FLAG,B1_MSK
;		SBIT0	RUN_FLAG,B2_MSK
		
;		PFC_DOWN
;		DCSCR_OFF
;		OPT_RUN
;		DCSOFRLY_OFF
;		IPRLY_ON
;		INVRLY_ON
;		CON_DC
		
;		ZERORLY_OFF
;		CALL	S_TURNUPSON		;TEST,01-9-12 9:29
		
MAIN_LOOP:		KICK_DOG
		
		B	MAIN_LOOP	
			
			
;================================================================
ILLCHK		
		LDP	#4
		SBIT0	RESET_FLAG,B0_MSK
		LDP   	#00E0h
		BIT	SYSSR,BIT12
		BCND	SWCHK,NTC
		LACL	SYSSR
		AND	#0EFFFH		;Clear ILLADR Bit		
		SACL	SYSSR
		NOP
		B	MAIN
SWCHK		BIT	SYSSR,BIT10
		BCND	WDCHK,NTC
		LACL	SYSSR
		AND	#0FBFFH		;Clear SWRST Bit		
		SACL	SYSSR
		NOP
		B	MAIN
WDCHK		BIT	SYSSR,BIT9
		BCND	EXTRST,NTC
		LACL	SYSSR
		AND	#0FDFFH		;Clear WDRST Bit		
		SACL	SYSSR
		NOP
		B	MAIN
EXTRST		NOP
		B	MAIN	
;====================================================================
;Subroutine Name: GISR2
;Description: A/D采样和逆变闭环控制。
;     	      使用GPT1 Underflow中断。
;
;====================================================================
GISR2:
	PUSH_ALL

		
	LDP	#232
	LACC	EVIFRA
	SACL	EVIFRA			
	CLRC	SXM
	LDP	#5
	LACC	T50USCNT		;50us counter
	ADD	#1
	SACL	T50USCNT				
GPT1_UF	
	LDP	#4
	MAR	*,AR3
	LAR	AR3,#ADCTRL1
	LACC	AD_CNT
	BCND	ADC_BUSY1,EQ
	SUB	#1
	BCND	ADC_BUSY1A,EQ
	SUB	#1
	BCND	GPT1_UF10,EQ
	B	ADC_BUSY1B
ADC_BUSY1	
	BIT	*,BIT7
	CALL	S_ADCHK
	BCND	ADC_BUSY1,TC
	SPLK	#0,ADCHK_CNT		
	LDP	#4
ADC_BUSY2
	BLDD	#ADCFIFO1,Tsink
	LAR	AR3,#ADCTRL2
	LACC	*
	AND	#0018H
	BCND	ADC_BUSY2,NEQ
ADC_BUSY3
	BLDD	#ADCFIFO2,Vbat
	LACC	*
	AND	#00C0H
	BCND	ADC_BUSY3,NEQ
	B	GPT1_UF10
ADC_BUSY1A	
	BIT	*,BIT7
	CALL	S_ADCHK
	BCND	ADC_BUSY1A,TC
	SPLK	#0,ADCHK_CNT
	LDP	#4
ADC_BUSY2A
	BLDD	#ADCFIFO1,VbusP
	LAR	AR3,#ADCTRL2
	LACC	*
	AND	#0018H
	BCND	ADC_BUSY2A,NEQ
ADC_BUSY3A
	BLDD	#ADCFIFO2,VbusN
	LACC	*
	AND	#00C0H
	BCND	ADC_BUSY3A,NEQ
	B	GPT1_UF10

ADC_BUSY1B
	BIT	*,BIT7
	CALL	S_ADCHK	
	BCND	ADC_BUSY1B,TC
	SPLK	#0,ADCHK_CNT
	LDP	#4
ADC_BUSY2B
	BLDD	#ADCFIFO1,Vi
	LAR	AR3,#ADCTRL2
	LACC	*
	AND	#0018H
	BCND	ADC_BUSY2B,NEQ
ADC_BUSY3B
	BLDD	#ADCFIFO2,Ii
	LACC	*
	AND	#00C0H
	BCND	ADC_BUSY3B,NEQ	
GPT1_UF10
	LAR	AR3,#ADCTRL1
	SPLK	#1111100110110111B,*	;sample Vout(CH3) and Iinv(CH11)
	
	LACC	AD_CNT
	ADD	#1
	AND	#3H
	SACL	AD_CNT
		
	LDP	#4
	CLRC	SXM
	LACC	AD_CNT
	BCND	ADC_BUSY7,EQ
	SUB	#1
	BCND	ADC_BUSY8,EQ
	B	ADC_BUSY9
ADC_BUSY7	
	LACC	Tsink,10
	SACH	Tsink	
	SPLK	#29AAH,GPR3		;Q16
	LT	Tsink
	MPY	GPR3
	PAC				
	SACH	GPR3
	LACL	GPR3
	LDP	#6
	ADD	Tsink_SUM
	SACL	Tsink_SUM
	
	LDP	#4
	LACC	Vbat,10
	SACH	Vbat
	LT	Vbat
	MPY	#330			;VbatV=Vbat*5*66/1024
	PAC	
	SACH	GPR3,6
	LACL	GPR3
	LDP	#6
	ADD	VbatV_SUM
	SACL	VbatV_SUM
	LACL	VbatV_CNT
	ADD	#1
	SACL	VbatV_CNT
	B	ADC_BUSY9
ADC_BUSY8
		
	LACC	VbusN,10
	SACH	VbusN
	LACL	VbusN
	ADD	Sum_VbusN
	SACL	Sum_VbusN

	LACC	VbusP,10
	SACH	VbusP
	LACL	VbusP
	ADD	Sum_VbusP
	SACL	Sum_VbusP
	LACL	Vbus_CNT
	ADD	#1
	SACL	Vbus_CNT
	SUB	#32
	BCND	ADC_BUSY9,LT
	LACC	Sum_VbusN,11
	SACH	VbusNV
	LACC	Sum_VbusP,11
	SACH	VbusPV
	LACL	#0
	SACL	Sum_VbusP
	SACL	Sum_VbusN
	SACL	Vbus_CNT
	
	
ADC_BUSY9
	NOP
	LDP	#4
	LACC	AD_CNT
	BNZ	SPI_END
;--------------------------------------------------------------
;子程序名 : SPI
;功	能: 软件SPI通讯
;输	入: SPIDATA_PT,传送数据缓存地址
;  	    READ_PT,接收数据缓存地址
;输	出: READBUFFER,接收的数据
;变	量: 
;	    SPI_FLAG,BIT0:传送数据标志,1-允许,0-禁止
;	             BIT1:时钟初始化标志,1-完成,0-未完成
;		     BIT2:读取数据延迟标志,1-延迟结束,0-延迟继续
;	    CLOCK_CUNT,初始化时钟计数器
;	    SPICOUNTS,字传送数据位计数器
;	    READ_CNT,接收数据位计数器
;	    SPIDATA_PT,传送数据缓存地址
;	    READ_PT,接收数据缓存地址
;	    SPIBUFFER,发送数据字单元
;	    READDATA,接收数据字单元
;	    
;	    
;辅助寄存器: AR0
;端	口: SPICLK,同步时钟信号    SPISTE,数据有效信号,低电平有效
;	    SPISIMO,发送数据线     SPISOMI,接收数据线
;--------------------------------------------------------------	
SPI
	LDP	#5
	BIT	TEST_FLAG,BIT0		;BIT0=1,停止传送
	BCND	SPI_STOP,NTC		;判断是否传送数据
	BIT	TEST_FLAG,BIT1		;初始CLOCK完成标志,BIT1=1,表示完成初始化
	BCND	SPI_CLOCK,NTC
	LDP	#224			
	SBIT0	SPIPC1,B6_MSK		;ENABLE 1->0
	BIT	SPIPC1,BIT2
	BCND	SENDBYTE,NTC
	SBIT0	SPIPC1,B2_MSK		;CLOCK 1->0,数据保持不变

	B	SPI_END
SPI_CLOCK				;初始CLOCK发送
	LDP	#224
	BIT	SPIPC1,BIT2		;判断时钟信号端口状态
	BCND	CLOCK_H,NTC
	SBIT0	SPIPC1,B2_MSK           ;CLOCK=0
	LDP	#5
	LACL	CLOCK_CUNT              ;初始化时钟计数器
	ADD	#1
	SACL	CLOCK_CUNT
	SUB	#2
	BCND	SPI_END,LT
	SBIT1	TEST_FLAG,B1_MSK
	SPLK	#0,CLOCK_CUNT
	B	SPI_END
CLOCK_H
	SBIT1	SPIPC1,B2_MSK
	B	SPI_END
SENDBYTE				;数据传送,CLOCK=1时改变数据
	LDP	#5
	LACL	SPICOUNTS
	BCND	SPI10,NEQ
	SPLK	#16,SPICOUNTS
	LAR	AR0,SPIDATA_PT
	MAR	*,AR0
	LACL	*
	SACL	SPIBUFFER
	LACL	SPIDATA_PT
	ADD	#1
	SACL	SPIDATA_PT
	SUB	#SPIDATA+12
	BCND	SPI10,LEQ
	SPLK	#SPIDATA,SPIDATA_PT	;一帧数据传送完毕,清除相关标志
	SBIT0	TEST_FLAG,B0_MSK
	SPLK	#0,SPICOUNTS
	SBIT0	TEST_FLAG,B2_MSK
	LDP	#6
	SPLK	#READBUFFER,READ_PT
	SPLK	#0,READDATA
	SPLK	#0,READ_CNT
	B	SPI_STOP
SPI10	
	LDP	#5			;读取数据
	BIT	TEST_FLAG,BIT2		;延时一个上升沿
	BCND	SPI17,NTC
	LDP	#6
	LACC	READDATA,1
	SACL	READDATA
	LDP	#224
	BIT	SPIPC2,BIT3		;SPISOMI,DATA IN
	BCND	SPI15,NTC
READONE
	LDP	#6
	LACC	READDATA
	ADD	#1
	SACL	READDATA
SPI15
	LDP	#6
	LACL	READ_CNT
	ADD	#1
	SACL	READ_CNT
	SUB	#16
	BCND	SPI17,LT
	SPLK	#0,READ_CNT		;读取16bit就放入缓存
	MAR 	*,AR0
	LAR	AR0,READ_PT
	LACL	READDATA
	SACL	*+
	SAR	AR0,READ_PT
	SPLK	#0,READDATA
SPI17
	LDP	#5
	SBIT1	TEST_FLAG,B2_MSK
	LDP	#224
	SBIT1	SPIPC1,B2_MSK		;CLOCK=1
	LDP	#5
	BIT	SPIBUFFER,BIT15
	BCND	SENDONE,TC
	LDP	#224
	SBIT0	SPIPC2,B6_MSK		;DATA=0,SPISIMO
	LDP	#5
	LACC	SPIBUFFER,1
	SACL	SPIBUFFER
	B	SPI20
SENDONE
	LDP	#224
	SBIT1	SPIPC2,B6_MSK		;DATA=1,SPISIMO
	LDP	#5
	LACC	SPIBUFFER,1
	SACL	SPIBUFFER
SPI20
	LACL	SPICOUNTS
	SUB	#1
	SACL	SPICOUNTS
	B	SPI_END
SPI_STOP
	LDP	#224
	SBIT1	SPIPC1,B2_MSK          ;时钟线置1
	SBIT0	SPIPC2,B6_MSK          ;数据线置0
	SBIT1	SPIPC1,B6_MSK          ;发送数据线置1
SPI_END	
;-------------------- 零火线接反检测 -------------------	
	LDP	#4
	BIT	ERR_FLAG,BIT8
	BCND	NEU10,TC
	LDP	#225
	BIT	PCDATDIR,BIT7
	BCND	NEU_NORMAL,TC
	LDP	#6
	SPLK	#0,NEU_CNT1
	LACL	NEU_CNT
	ADD	#1
	SACL	NEU_CNT
	SUB	#10
	BCND	NEU_END,LT
	SPLK	#0,NEU_CNT
	LDP	#4
	SBIT1	ERR_FLAG,B11_MSK	;零火线接反
	B	NEU_END
NEU_NORMAL
	LDP	#6
	SPLK	#0,NEU_CNT
	LACL	NEU_CNT1
	ADD	#1
	SACL	NEU_CNT1
	SUB	#800
	BCND	NEU_END,LT
	SPLK	#0,NEU_CNT1
NEU10		
	LDP	#4
	SBIT0	ERR_FLAG,B11_MSK
NEU_END
;-------------------------- 输出继电器动作点 -------------------------
	NOP
	LDP	#6
	LACL	PWM_CNT
	ADD	#1
	SACL	PWM_CNT
	LDP	#4
	BIT	RUN_FLAG,BIT8
	BCND	BYPRLY,NTC
	LDP	#6
	LACL	PWM_CNT
	SUB	#140			;13ms
	BCND	BYPRLY,NEQ		;
	INVRLY_ON
	LDP	#4
	SBIT0	RUN_FLAG,B8_MSK		;Clear INV STS ON Flag
	SBIT1	RUN_FLAG1,B1_MSK	;Bypass relay off flag
;	LDP	#5
;	BLDD	T50USCNT,#DELAY_CNT
	
BYPRLY	
	LDP	#4
	BIT	RUN_FLAG1,BIT1
	BCND	ADC_BUSY10,NTC
	LDP	#6
	LACL	DELAY_CNT
	ADD	#1
	SACL	DELAY_CNT
	SUB	#20			;300,1ms
	BCND	GPT1_20,LT
	SPLK	#0,DELAY_CNT
;	BYPRLY_OFF
	IPRLY_ON
	LDP	#4
	SBIT0	RUN_FLAG1,B1_MSK
GPT1_20
	NOP
	
ADC_BUSY10
	MAR	*,AR3
	BIT	*,BIT7
	CALL	S_ADCHK	
	BCND	ADC_BUSY10,TC
	SPLK	#0,ADCHK_CNT
	CLRC	SXM
	LDP	#4
ADC_BUSY12
	BLDD	#ADCFIFO1,Vout
	LAR	AR3,#ADCTRL2
	LACC	*
	AND	#0018H
	BCND	ADC_BUSY12,NEQ
ADC_BUSY13
	BLDD	#ADCFIFO2,Iinv
	LACC	*
	AND	#00C0H
	BCND	ADC_BUSY13,NEQ
	LAR	AR3,#ADCTRL1
	SPLK	#1111100111111111B,*	;2.5Vref(CH7),INV_DC(CH15)
	
	LACL	SIN_PT
	ADDS	REDI
	SACL	SIN_PT
	ADD	STEP,16
	ADD	SIN_POINTER,16
	SACH	SIN_POINTER
	SUB	SIN_ADDRE,16
	BCND	SIN_VALE,LEQ
	ADD	SIN_ADDR,16
	SACH	SIN_POINTER                                                                                  
	DMOV	NEW_STEP
	DMOV	NEW_REDI
	SPLK	#8000H,SIN_PT
	LDP	#6
	SPLK	#0,PWM_CNT
	LDP	#4
SIN_VALE	
	LACL	SIN_POINTER
	TBLR	SIN_VAL
	
	LDP	#5
	LACC	VZ1,10
	SACH	VZ1
	AVERAGE	VZ,VZ1,VZ2,VZ3
	
	LACC	V1,10	
	SACH	V1
	AVERAGE V,V1,V2,V3
	LACC	V,2
	SETC	SXM
	SUB	VZ,2
;	SUB	VZ
	RPT	#1
	SFR
	LDP	#6
	SUB	VDC_E
	LDP	#5
	SACL	VDC
CNT_LOOP
 	
	CLRC	SXM
	LDP	#4      	
	LACC	Vout
	CMPL
	AND	#0FFC0H
	LDP	#5
	SETC	SXM
	SUB	VZ,6			;510
	LDP	#6
	ADD	Vout_E,6
	LDP	#5
	ADD	VDC,3			;01-10-10 15:52
	SACL	yv
	
	CALL	SINWAVE_GEN
	
	LDP	#4
	BIT	RUN_FLAG,BIT6
	BCND	CNT_LOOP25,NTC	
	CALL	V_PID
	LDP	#4
	LACL	NEW_M
	SACL	M_PARA	
CNT_LOOP25
	CALL	SPWM_GEN
	
CNT_LOOP30	
	
	CLRC	SXM
	LDP	#5
	LACL	T50USCNT
	AND	#03H
	BCND	SQUARE_END,NEQ
	
	LDP	#4
	LACC	Vi,10
	SACH	Vi
	LACL	Vi
	LDP	#5
	SUB	VZ			;#511
	LDP	#4
	SACL	Vi
	SQRA	Vi
	LACC	LINV_H0,16
	ADDS	LINV_L0
	APAC
	SACL	LINV_L0
	SACH	LINV_H0

	
	LACC	Vout,10
	SACH	Vout
	LACL	Vout
	LDP	#5
	SUB	VZ
	LDP	#4
	SACL	Vout
	SQRA	Vout
	ZALH	INVV_H0
	ADDS	INVV_L0
	APAC
	SACL	INVV_L0
	SACH	INVV_H0
	
;LINEPK_CHK
;	BIT	RUN_FLAG,BIT1
;	BCND	LINEPK_CHK10,NTC					;市电峰值检测
;	SETC	SXM
;	LACC	Vi
;	ABS
;	LDP	#5
;	SACL	ViPK1
;	AVERAGE	ViPK,ViPK1,ViPK2,ViPK3	
;	LACL	ViPK
;	SUB	#1F0H				;500V
;	BCND	LINEPK_CHK10,LT
;	CALL	S_INVTOBAT
LINEPK_CHK10
	LDP	#4
	BIT	RUN_FLAG,BIT6
	BCND	TIAOL5, TC
	ZERORLY_ON
	SETC	SXM
	LDP	#6
	LACC	Vout_Sum
	LDP	#4
	ADD	Vout
	LDP	#6
	SACL	Vout_Sum
	LACC	VDC_SUM
	LDP	#5
	ADD	V
	LDP	#6
	SACL	VDC_SUM