clockdev.c~

S3C2410 DAC驱动程序

/*下面是一个简单的gpio跑马灯驱动,基于FS2410处理器:*/
#ifndef __KERNEL__ 
#define __KERNEL__ 
#endif 
#ifndef MODULE 
#define MODULE 
#endif 

#include <linux/fs.h>   
//#include <linux/iobuf.h> 
#include <linux/major.h> 
#include <asm/uaccess.h> 
#include <asm/hardware.h> 
#include <asm/arch-s3c2410/regs-gpio.h> 
#include <asm/io.h> 
#include <linux/vmalloc.h> 
#include <linux/config.h> 
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>  
#include <linux/delay.h>
#include "fifo-clock.h"
MODULE_LICENSE("GPL");
#define CLOCK_MAJOR 225  

int clock_ctl_open(struct inode*, struct file*);              
int clock_ctl_ioctl(struct inode*, struct file*, unsigned int,unsigned long);
void initclk(void);
//int clock_ctl_release(struct inode*, struct file*);
static struct file_operations clock_ctl_fops={
        ioctl:        clock_ctl_ioctl,
        open:         clock_ctl_open,
//      release:    colck_ctl_release,
};  

void initclk(void){
	int tmp1,tmp2;
	
	tmp1=__raw_readl(S3C2410_GPACON);//SET GPA12 OUTPUT
	tmp1=tmp1&(~(1<<12));
	__raw_writel(tmp1, S3C2410_GPACON);
	
	//__raw_writel(0xFF, S3C2410_GPAUP);//SET GPA12 PULLUP
	
	tmp2=__raw_readl(S3C2410_GPADAT);//RESET
	tmp2=tmp2&(~(1<<12));
	__raw_writel(tmp2, S3C2410_GPADAT);
	mdelay(1);
	
	tmp2=__raw_readl(S3C2410_GPADAT);
	tmp2=tmp2|(1<<12);
	__raw_writel(tmp2, S3C2410_GPADAT);
	mdelay(1);

	tmp2=__raw_readl(S3C2410_GPADAT);
	tmp2=tmp2&(~(1<<12));
	__raw_writel(tmp2, S3C2410_GPADAT);

	__raw_writel(0x00, clock_CON); //INIT CLOCK FREQUENCY    
	
}


int clock_ctl_open(struct inode *inode,struct file *fllp)
{


  
	__raw_writel(0x00, clock_CON);
        printk("open clock devices\n");
        return 0;
}

/*int clock_ctl_release(struct inode *inode, struct file *filp)
{
        printk("release this device\n");
        return 0;
}*/

int clock_ctl_ioctl(struct inode *inode,struct file *flip,unsigned int command,unsigned long arg)
{
	unsigned int p;
	p=0x00;
	if(command==1)
		{
          printk("clock 1.25M start!\n");
	   __raw_writel(0x00, clock_CON);     
     				
       return 0;
		}
	else if(command==2)
			{
			  printk("clock 2.5M start!\n");
		   __raw_writel(0x01, clock_CON);	   
						
		   return 0;
			}
	else if(command==3)
			{
			  printk("clock 5M start!\n");
		   __raw_writel(0x02, clock_CON);	   
						
		   return 0;
			}
	else if(command==4)
			{
			  printk("clock 10M start!\n");
		   __raw_writel(0x03, clock_CON);	   
						
		   return 0;
			}
	else if(command==5)
			{
			  printk("clock 25M start!\n");
		   __raw_writel(0x04, clock_CON);	   
						
		   return 0;
			}
	else if(command==6)
			{
			  printk("clock 50M start!\n");
		   __raw_writel(0x05, clock_CON);	   
						
		   return 0;
			}
	else if(command==7)
			{
			  printk("clock 75M start!\n");
		   __raw_writel(0x06, clock_CON);	   
						
		   return 0;
			}
	else if(command==8)
			{
			  printk("clock 100M start!\n");
		   __raw_writel(0x07, clock_CON);	   
						
		   return 0;
			}

    else
        printk("Fail!\n");
    return(0);
}
//////////////////////////////////////////////////////////////////////
static int __init clock_init(void) 
{
        int ret=0;
		initclk();
        printk("clock_init\n");
        ret = register_chrdev(CLOCK_MAJOR, "clock", &clock_ctl_fops);
        if(ret < 0)
        {
                printk("fail to register\n");
                return -1;
        }
        printk("success to register\n");
        return 0;
}
//////////////////////////////////////////////////////////////////////
void __exit clock_release(void)
{
    printk("quit clock\n");
    unregister_chrdev(CLOCK_MAJOR, "clock"); 
}

module_init(clock_init);           
module_exit(clock_release);