dbgu.c

ATMEL arm7 USB 模拟串口

//  ----------------------------------------------------------------------------
//          ATMEL Microcontroller Software Support  -  ROUSSET  -
//  ----------------------------------------------------------------------------
//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//  ----------------------------------------------------------------------------
//* File Name           : Debug.c
//* Object              : Debug menu
//* Creation            : JPP   16/May/2004
//*----------------------------------------------------------------------------
#include "board.h"
#include "po_types.h"
#include "dbgu.h"

/*---------------------------- Global Variable ------------------------------*/
#ifdef USE_LED
volatile unsigned char countLed = 0;
#endif

//*----------------------------------------------------------------------------
//* \fn    AT91F_LED_init
//* \brief Config SPI IP
//*----------------------------------------------------------------------------
#ifdef USE_LED
void  AT91F_LED_init( AT91PS_PWMC pPwm, unsigned int dMasterClock )
{
  /* PWMC Mode Register (PWM_MR) */
  pPwm->PWMC_MR = 0x00;

#ifdef AT91SAM9265
#else
  /* Enable Peripheral clock in PMC for  PIOA, Set PWM PMC clock PMC_PCER */
  // AT91F_PWMC_CfgPMC();
  AT91F_PMC_EnablePeriphClock( AT91C_BASE_PMC, (1 << AT91C_ID_PWMC) );

  /* Configure PIO controllers to drive PWMC_CH0 signals  */
#if defined (AT91SAM7X128) || defined (AT91SAM7X256)
  AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, AT91C_PB19_PWM0, 0 );
#else
  AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, AT91C_PA0_PWM0, 0 );
#endif
  
#if defined (AT91SAM7X128) || defined (AT91SAM7X256)
  AT91F_PIO_CfgPeriph( AT91C_BASE_PIOB, AT91C_PB20_PWM1, 0 );
#else
  AT91F_PIO_CfgPeriph( AT91C_BASE_PIOA, AT91C_PA1_PWM1, 0 );
#endif
#endif

  /* divided by 1024 left aligned, low level, Update duty cycle */
  /*                     ChannelID PWM_CMR   PWM_CPRDR    PWM_CDTYR */
  AT91F_PWMC_CfgChannel(pPwm, 0, 0x000A, dMasterClock/1024/8, 0); /* for PIOA 0 LED 1 */
  AT91F_PWMC_CfgChannel(pPwm, 1, 0x000A, dMasterClock/1024/8, 0); /* for PIOA 1 LED 2 */

  /* PWM_ENA Enable PWM output for channel 0 and 1 */
  AT91F_PWMC_StartChannel(pPwm, 0x03);
}
#endif


//*----------------------------------------------------------------------------
//* \fn    AT91F_US_Get
//* \brief Get a Char to USART
//*----------------------------------------------------------------------------
 int AT91F_US_Get( char *val)
{
  if ((AT91F_US_RxReady((AT91PS_USART)AT91C_BASE_DBGU)) == 0)
  {
    return( FALSE );
  }
  else
  {
    *val= AT91F_US_GetChar((AT91PS_USART)AT91C_BASE_DBGU);
    return( TRUE );
  }
}
//----------------------------------------------------------------------------
// \fn    AT91F_DBGU_scanf
// \brief Get a string to USART manage Blackspace and echo
//----------------------------------------------------------------------------
void AT91F_DBGU_scanf(char * val)
{
  unsigned int read = 0;
  unsigned int i;
  char buff[13];  // Size of char for a file name 8+3+1+'\0  // BFSA_MAX_FILENAME_LEN
  unsigned int nb_read =0;

  while( (read != 0x0D) & (nb_read != sizeof(buff)) )
  {
    // wait the USART Ready for reception
    while( (AT91C_BASE_DBGU->DBGU_CSR  & AT91C_US_RXRDY) == 0 )
    {}
    // Get a char
    read = AT91C_BASE_DBGU->DBGU_RHR ;
    buff[nb_read]= (char)read;
    // Manage Blackspace
    while( (AT91C_BASE_DBGU->DBGU_CSR & AT91C_US_TXRDY) ==0 )
    {}
    if ((char)read == 0x08)
    {
      if ( nb_read != 0 )
      {
        nb_read--;
        AT91C_BASE_DBGU->DBGU_THR = read;
      }
    }
    else
    {
      // echo
      AT91C_BASE_DBGU->DBGU_THR = read;
      nb_read++;
    }
  }

  // sscanf(buff,type,val);
  for( i=0; i < nb_read; i++ )
  {
    val[i] = buff[i];
    if( buff[i] == 0x0D )
    {
      val[i] = '\0';
      break;
    }
  }
}