main1__.c

与GPS模块连接

#define Main_H

#include "allheads.h"

void main(void)
{
 initialize();    //初始MEGA88 IO和寄存器
 
 init_SPI();      //初始SPI端口

 RF_Channel=8;    //选择NRF24L01第8频道
 RX_Mode();       //进入接收模式 (接收数组宽度8个字节)
 
while(1)
{   PORTB.0=1;
    delay_ms(500);
    PORTB.0=0;
    delay_ms(500);
 /*if(RX_F)         //如果接收到数据
  {
  RX_F=0;         //清0接收标志位
 // PORTD=rx_buf[0];//PORTD等于接收数组的第1字节
  //xinlv_out=1;    //心率输出位置1     
  PORTB=0XF5;
  
  delay_ms(300);
  
  }
 else
 { PORTB=0xFF;
   //xinlv_out=0;
  }*/ 
  
} 
}




#define NRF24L01_C

#include "allheads.h"
  

uchar TX_ADDRESS[5]={0x34,0x43,0x10,0x10,0x01}; // Define a static TX address 
uchar     sta;

#define TX_ADR_WIDTH    5     // 5 bytes TX(RX) address width 

//****************************************************************// 
// SPI(nRF24L01) commands 
#define READ_REG        0x00  // Define read command to register 
#define WRITE_REG       0x20  // Define write command to register 
#define RD_RX_PLOAD     0x61  // Define RX payload register address 
#define WR_TX_PLOAD     0xA0  // Define TX payload register address 
#define FLUSH_TX        0xE1  // Define flush TX register command 
#define FLUSH_RX        0xE2  // Define flush RX register command 
#define REUSE_TX_PL     0xE3  // Define reuse TX payload register command 
#define NOP             0xFF  // Define No Operation, might be used to read status register 

//***************************************************// 
// SPI(nRF24L01) registers(addresses) 
#define CONFIG          0x00  // 'Config' register address 
#define EN_AA           0x01  // 'Enable Auto Acknowledgment' register address 
#define EN_RXADDR       0x02  // 'Enabled RX addresses' register address 
#define SETUP_AW        0x03  // 'Setup address width' register address 
#define SETUP_RETR      0x04  // 'Setup Auto. Retrans' register address 
#define RF_CH           0x05  // 'RF channel' register address 
#define RF_SETUP        0x06  // 'RF setup' register address 
#define STATUS          0x07  // 'Status' register address 
#define OBSERVE_TX      0x08  // 'Observe TX' register address 
#define CD              0x09  // 'Carrier Detect' register address 
#define RX_ADDR_P0      0x0A  // 'RX address pipe0' register address 
#define RX_ADDR_P1      0x0B  // 'RX address pipe1' register address 
#define RX_ADDR_P2      0x0C  // 'RX address pipe2' register address 
#define RX_ADDR_P3      0x0D  // 'RX address pipe3' register address 
#define RX_ADDR_P4      0x0E  // 'RX address pipe4' register address 
#define RX_ADDR_P5      0x0F  // 'RX address pipe5' register address 
#define TX_ADDR         0x10  // 'TX address' register address 
#define RX_PW_P0        0x11  // 'RX payload width, pipe0' register address 
#define RX_PW_P1        0x12  // 'RX payload width, pipe1' register address 
#define RX_PW_P2        0x13  // 'RX payload width, pipe2' register address 
#define RX_PW_P3        0x14  // 'RX payload width, pipe3' register address 
#define RX_PW_P4        0x15  // 'RX payload width, pipe4' register address 
#define RX_PW_P5        0x16  // 'RX payload width, pipe5' register address 
#define FIFO_STATUS     0x17  // 'FIFO Status Register' register address 


/**************************************************
Function: init_io();
Description:
  flash led one time,chip enable(ready to TX or RX Mode),
  Spi disable,Spi clock line init high
/**************************************************/
void init_SPI(void)
{
CE=0;		// chip enable
CSN=1;		// Spi disable	
SCK=0;		// Spi clock line init high
}

/**************************************************
Function: SPI_RW();

Description:
  Writes one byte to nRF24L01, and return the byte read
  from nRF24L01 during write, according to SPI protocol
/**************************************************/
uchar SPI_RW(uchar byte)
{
uchar bit_ctr;

for(bit_ctr=0;bit_ctr<8;bit_ctr++)   // output 8-bit
{
 MOSI = (byte & 0x80);               // output 'byte', MSB to MOSI
 byte = (byte << 1);                 // shift next bit into MSB..
  SCK = 1;                           // Set SCK high..
 byte|= MISO;       	       // capture current MISO bit
  SCK = 0;                           // ..then set SCK low again
 }
 return(byte);                       // return read byte
}
/**************************************************/

/**************************************************
Function: SPI_RW_Reg();

Description:
  Writes value 'value' to register 'reg'
/**************************************************/
uchar SPI_RW_Reg(uchar reg, uchar value)
{
uchar status;

CSN = 0;                   // CSN low, init SPI transaction\
status = SPI_RW(reg);      // select register
SPI_RW(value);             // ..and write value to it..

CSN = 1;                   // CSN high again

return(status);            // return nRF24L01 status byte
}
/**************************************************/

/**************************************************
Function: SPI_Read();

Description:
  Read one byte from nRF24L01 register, 'reg'
/**************************************************/
unsigned char SPI_Read(unsigned char reg)
{
unsigned char  reg_val;
CSN = 0;                // CSN low, initialize SPI communication...

SPI_RW(reg);            // Select register to read from..
reg_val = SPI_RW(0);    // ..then read registervalue

CSN = 1;                // CSN high, terminate SPI communication

return(reg_val);        // return register value
}
/**************************************************/

/**************************************************
Function: SPI_Read_Buf();

Description:
  Reads 'bytes' #of bytes from register 'reg'
  Typically used to read RX payload, Rx/Tx address
/**************************************************/
uchar SPI_Read_Buf(uchar reg,uchar  * pBuf, uchar bytes)
{
	uchar status,byte_ctr;

  	CSN = 0;                    	// Set CSN low, init SPI tranaction
  	delay_ms(1);
  	status = SPI_RW(reg);       	// Select register to write to and read status byte

  	for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
    	pBuf[byte_ctr] = SPI_RW(0);         // Perform SPI_RW to read byte from nRF24L01
            delay_ms(1);
  	CSN = 1;                            // Set CSN high again
            delay_ms(1);
  	return(status);                     // return nRF24L01 status byte
}
/**************************************************/

/**************************************************
Function: SPI_Write_Buf();

Description:
  Writes contents of buffer '*pBuf' to nRF24L01
  Typically used to write TX payload, Rx/Tx address
/**************************************************/
uchar SPI_Write_Buf(uchar reg, uchar * pBuf, uchar bytes)
{
uchar status,byte_ctr;
CSN = 0;                   // Set CSN low, init SPI tranaction

status = SPI_RW(reg);      // Select register to write to and read status byte
for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
//SPI_RW(TX_ADDRESS[pBuf++]);
SPI_RW(*pBuf++);

CSN = 1;                  // Set CSN high again

return(status);           // return nRF24L01 status byte
}
/**************************************************/
/**************************************************
Function: TX_Mode();

Description:
  This function initializes one nRF24L01 device to
  TX mode, set TX address, set RX address for auto.ack,
  fill TX payload, select RF channel, datarate & TX pwr.
  PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.

  ToDo: One high pulse(>10us) on CE will now send this
  packet and expext an acknowledgment from the RX device.
/********************************************************
void TX_Mode(void)
{
	CE=0;
	
  	SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH);    // Writes TX_Address to nRF24L01
  	SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack
  	SPI_Write_Buf(WR_TX_PLOAD, tx_buf, RF_PLOAD_WIDTH); // Writes data to TX payload

  	SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);      // Enable Auto.Ack:Pipe0
  	SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);  // Enable Pipe0
  	SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
  	SPI_RW_Reg(WRITE_REG + RF_CH, RF_Channel);// Select RF channel 
  	SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
  	SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);     // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..
	CE=1;
          
	
	SPI_RW_Reg(WRITE_REG+STATUS,SPI_Read(READ_REG+STATUS));// clear interrupt flag(TX_DS)
}
/**************************************************/
/**************************************************
Function: RX_Mode();

Description:
  This function initializes one nRF24L01 device to
  RX Mode, set RX address, writes RX payload width,
  select RF channel, datarate & LNA HCURR.
  After init, CE is toggled high, which means that
  this device is now ready to receive a datapacket.
/**************************************************/
void RX_Mode(void)
{           
        
CE=0;
delay_ms(1);	
SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // Use the same address on the RX device as the TX device

SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);              // Enable Auto.Ack:Pipe0
SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);          // Enable Pipe0
SPI_RW_Reg(WRITE_REG + RF_CH, RF_Channel);        // Select RF channel 
SPI_RW_Reg(WRITE_REG + RX_PW_P0, RF_PLOAD_WIDTH); // Select same RX payload width as TX Payload width
SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);     // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enabled..

CE = 1; // Set CE pin high to enable RX device

  //  This device is now ready to receive one packet of 16 bytes payload from a TX device sending to address
  //  '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.

}
/**************************************************/
/**************************************************
Function: Read_FIFO ();

Description:
  if RX_DR=1 or TX_DS or MAX_RT=1,enter this subprogram;
  if RX_DR=1,read the payload from RX_FIFO and set flag;
/**************************************************/
void Read_FIFO (void) 
{
 sta=SPI_Read(STATUS);	// read register STATUS's value
 if(sta & 0x40)		// if receive data ready (RX_DR) interrupt
  {
   SPI_Read_Buf(RD_RX_PLOAD,rx_buf,RF_PLOAD_WIDTH);// read receive payload from RX_FIFO buffer
   RX_F=1;
  }
 if(sta & 0x10)
  {
   SPI_RW_Reg(FLUSH_TX,0);
  }
 SPI_RW_Reg(WRITE_REG+STATUS,sta);// clear RX_DR or TX_DS or MAX_RT interrupt flag
}
/**************************************************/
#define Initialize_C 

#include "allheads.h"

void initialize(void)
{
// Crystal Oscillator division factor: 1
#pragma optsize-
CLKPR=0x80;
CLKPR=0x00;
#ifdef _OPTIMIZE_SIZE_
#pragma optsize+
#endif

// Input/Output Ports initialization
// Port B initialization
// Func7=In Func6=In Func5=In Func4=In Func3=In Func2=In Func1=In Func0=In 
// State7=P State6=P State5=P State4=P State3=P State2=P State1=P State0=P 
PORTB=0xFF;
DDRB=0xFF;

// Port C initialization
// Func6=Out Func5=Out Func4=Out Func3=Out Func2=Out Func1=Out Func0=Out 
// State6=1 State5=1 State4=1 State3=1 State2=1 State1=1 State0=1 
PORTC=0x00;
DDRC=0x00;

// Port D initialization
// Func7=Out Func6=In Func5=In Func4=Out Func3=Out Func2=Out Func1=In Func0=In 
// State7=0 State6=P State5=P State4=0 State3=0 State2=0 State1=T State0=T 
PORTD=0x60;
DDRD=0x9C;

// Timer/Counter 0 initialization
// Clock source: System Clock
// Clock value: 125.000 kHz
// Mode: Normal top=FFh
// OC0A output: Disconnected
// OC0B output: Disconnected
TCCR0A=0x00;
TCCR0B=0x03;
TCNT0=0x06;
OCR0A=0x00;
OCR0B=0x00;

// Timer/Counter 1 initialization
// Clock source: System Clock
// Clock value: Timer 1 Stopped
// Mode: Normal top=FFFFh
// OC1A output: Discon.
// OC1B output: Discon.
// Noise Canceler: Off
// Input Capture on Falling Edge
// Timer 1 Overflow Interrupt: Off
// Input Capture Interrupt: Off
// Compare A Match Interrupt: Off
// Compare B Match Interrupt: Off
TCCR1A=0x00;
TCCR1B=0x00;
TCNT1H=0x00;
TCNT1L=0x00;
ICR1H=0x00;
ICR1L=0x00;
OCR1AH=0x00;
OCR1AL=0x00;
OCR1BH=0x00;
OCR1BL=0x00;

// Timer/Counter 2 initialization
// Clock source: System Clock
// Clock value: Timer 2 Stopped
// Mode: Normal top=FFh
// OC2A output: Disconnected
// OC2B output: Disconnected
ASSR=0x00;
TCCR2A=0x00;
TCCR2B=0x00;
TCNT2=0x00;
OCR2A=0x00;
OCR2B=0x00;

// External Interrupt(s) initialization
// INT0: Off
// INT1: Off
// Interrupt on any change on pins PCINT0-7: Off
// Interrupt on any change on pins PCINT8-14: Off
// Interrupt on any change on pins PCINT16-23: Off
EICRA=0x00;
EIMSK=0x00;
PCICR=0x00;

// Timer/Counter 0 Interrupt(s) initialization
TIMSK0=0x01;
// Timer/Counter 1 Interrupt(s) initialization
TIMSK1=0x00;
// Timer/Counter 2 Interrupt(s) initialization
TIMSK2=0x00;

// Analog Comparator initialization
// Analog Comparator: Off
// Analog Comparator Input Capture by Timer/Counter 1: Off
ACSR=0x80;
ADCSRB=0x00;

// Global enable interrupts
#asm("sei")

}
#define INT_C   

#include "allheads.h"

interrupt [TIM0_OVF] void timer0_ovf_isr(void)
{
TCNT0=0x06;
if(IRQ==0)
  {
   Read_FIFO();
   RX_F=1;
   }
}