📄 ds1302.lst
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(0118) W1302(0x90,0x00); //写充电寄存器
00DB 2722 CLR R18
00DC E900 LDI R16,0x90
00DD DFD8 RCALL _W1302
(0119) W1302(0x80,0x00); //秒寄存器停止位置0，时钟启动,初值设为0
00DE 2722 CLR R18
00DF E800 LDI R16,0x80
00E0 DFD5 RCALL _W1302
(0120)
(0121) //设置时间
(0122) W1302(0x80,INITDATE[0]);
00E1 91200060 LDS R18,0x60
00E3 E800 LDI R16,0x80
00E4 DFD1 RCALL _W1302
(0123) W1302(0x82,INITDATE[1]);
00E5 91200061 LDS R18,0x61
00E7 E802 LDI R16,0x82
00E8 DFCD RCALL _W1302
(0124) W1302(0x84,INITDATE[2]);
00E9 91200062 LDS R18,0x62
00EB E804 LDI R16,0x84
00EC DFC9 RCALL _W1302
(0125) W1302(0x86,INITDATE[3]);
00ED 91200063 LDS R18,0x63
00EF E806 LDI R16,0x86
00F0 DFC5 RCALL _W1302
(0126) W1302(0x88,INITDATE[4]);
00F1 91200064 LDS R18,0x64
00F3 E808 LDI R16,0x88
00F4 DFC1 RCALL _W1302
(0127) W1302(0x8a,INITDATE[5]);
00F5 91200065 LDS R18,0x65
00F7 E80A LDI R16,0x8A
00F8 DFBD RCALL _W1302
(0128) W1302(0x8c,INITDATE[6]);
00F9 91200066 LDS R18,0x66
00FB E80C LDI R16,0x8C
00FC DFB9 RCALL _W1302
(0129) W1302(0x8e,INITDATE[7]);
00FD 91200067 LDS R18,0x67
00FF E80E LDI R16,0x8E
(0130) //设置时间
(0131) }
0100 CFB5 RJMP _W1302
FILE: F:\自编程序\M16\ds1302\UART.C
(0001) #include <iom16v.h>
(0002) #pragma interrupt_handler USART_Recive_Complete_handler:12
(0003) #pragma interrupt_handler USART_Data_Register_Empty_handler:13
(0004) #pragma interrupt_handler USART_Transmit_Complete_handler:14
(0005) void USART_Init(void)
(0006) {
(0007) //{{WIZARD_MAP(UART)
(0008) // crystal: 8M
(0009) // Baud Rate: 9600
(0010) // Character Size: 8-bit
(0011) // Mode: Asynchronous
(0012) // Parity: Disabled
(0013) // Stop Bit: 1-bit
(0014) UBRRL = 0x33;
(0015) UBRRH = 0x00;
_USART_Init:
0101 E383 LDI R24,0x33
0102 B989 OUT 0x09,R24
(0016) UCSRA = 0x00;
0103 2422 CLR R2
0104 BC20 OUT 0x20,R2
(0017) UCSRC = 0x86;
0105 B82B OUT 0x0B,R2
(0018) UCSRB = 0x18;
0106 E886 LDI R24,0x86
0107 BD80 OUT 0x20,R24
(0019) //UCSRB|=0X80;//开接收结束中断
0108 E188 LDI R24,0x18
0109 B98A OUT 0x0A,R24
(0020) //UCSRB|=0X40;//开发送结束中断
(0021) //UCSRB|=0X20;//开数据寄存器空中断
(0022) }
(0023) void USART_Transmit(unsigned char data)
010A 9508 RET
(0024) {
(0025) /* 等待发送缓冲器为空 */
(0026) while ( !( UCSRA & (1<<UDRE)) );
(0027) /* 将数据放入缓冲器，发送数据 */
_USART_Transmit:
data --> R16
010B 9B5D SBIS 0x0B,5
010C CFFE RJMP _USART_Transmit
(0028) UDR = data;
(0029) }
010D B90C OUT 0x0C,R16
(0030) unsigned char USART_Recive(void)
010E 9508 RET
(0031) {
(0032) /* 等待接收数据*/
(0033) while ( !(UCSRA & (1<<RXC)) );
(0034) /* 从缓冲器中获取并返回数据*/
_USART_Recive:
010F 9B5F SBIS 0x0B,7
0110 CFFE RJMP _USART_Recive
(0035) return UDR;
(0036) }
0111 B10C IN R16,0x0C
0112 9508 RET
(0037) void USART_Recive_Complete_handler(void)
(0038) {
(0039)
(0040) }
(0041) void USART_Data_Register_Empty_handler(void)
_USART_Recive_Complete_handler:
0113 9518 RETI
(0042) {
(0043)
(0044) }void USART_Transmit_Complete_handler(void)
(0045) {
_USART_Data_Register_Empty_handler:
0114 9518 RETI
(0046)
(0047) }
(0048)
_USART_Transmit_Complete_handler:
0115 9518 RETI
_kk:
comand --> R20
0116 940E0182 CALL push_gset1
0118 2F40 MOV R20,R16
FILE: F:\自编程序\M16\ds1302\main.c
(0001) #include<iom16v.h>
(0002) #include<macros.h>
(0003) unsigned char data[2];
(0004) void kk(unsigned char comand)
(0005) {
(0006) BCDtoASCII(R1302(comand),data);
0119 2F04 MOV R16,R20
011A 2711 CLR R17
011B 940E00C6 CALL _R1302
011D E628 LDI R18,0x68
011E E030 LDI R19,0
011F 940E00A4 CALL _BCDtoASCII
(0007) USART_Transmit(data[0]);
0121 91000068 LDS R16,_data
0123 2711 CLR R17
0124 940E010B CALL _USART_Transmit
(0008) USART_Transmit(data[1]);
0126 91000069 LDS R16,_data+1
0128 2711 CLR R17
0129 940E010B CALL _USART_Transmit
(0009) }
012B 940E0185 CALL pop_gset1
012D 9508 RET
(0010) void main(void)
(0011) {
(0012) unsigned int i,j;
(0013)
(0014) USART_Init();
_main:
j --> R20
i --> R22
012E 940E0101 CALL _USART_Init
(0015) init_1302();
0130 940E00D5 CALL _init_1302
(0016) USART_Transmit('d');
0132 E604 LDI R16,0x64
0133 E010 LDI R17,0
0134 940E010B CALL _USART_Transmit
0136 C040 RJMP 0x0177
(0017) while(1)
(0018) {
(0019)
(0020) for(j=0;j<10;j++){
0137 2744 CLR R20
0138 2755 CLR R21
0139 C00B RJMP 0x0145
(0021) for(i=0;i<60000;i++);}
013A 2766 CLR R22
013B 2777 CLR R23
013C C002 RJMP 0x013F
013D 5F6F SUBI R22,0xFF
013E 4F7F SBCI R23,0xFF
013F 3660 CPI R22,0x60
0140 EEEA LDI R30,0xEA
0141 077E CPC R23,R30
0142 F3D0 BCS 0x013D
0143 5F4F SUBI R20,0xFF
0144 4F5F SBCI R21,0xFF
0145 304A CPI R20,0xA
0146 E0E0 LDI R30,0
0147 075E CPC R21,R30
0148 F388 BCS 0x013A
(0022) kk(0x8d);
0149 E80D LDI R16,0x8D
014A DFCB RCALL _kk
(0023) USART_Transmit(':');
014B E30A LDI R16,0x3A
014C E010 LDI R17,0
014D 940E010B CALL _USART_Transmit
(0024) kk(0x8b);
014F E80B LDI R16,0x8B
0150 DFC5 RCALL _kk
(0025) USART_Transmit(':');
0151 E30A LDI R16,0x3A
0152 E010 LDI R17,0
0153 940E010B CALL _USART_Transmit
(0026) kk(0x89);
0155 E809 LDI R16,0x89
0156 DFBF RCALL _kk
(0027) USART_Transmit(':');
0157 E30A LDI R16,0x3A
0158 E010 LDI R17,0
0159 940E010B CALL _USART_Transmit
(0028) kk(0x87);
015B E807 LDI R16,0x87
015C DFB9 RCALL _kk
(0029) USART_Transmit(':');
015D E30A LDI R16,0x3A
015E E010 LDI R17,0
015F 940E010B CALL _USART_Transmit
(0030) USART_Transmit(' ');
0161 E200 LDI R16,0x20
0162 E010 LDI R17,0
0163 940E010B CALL _USART_Transmit
(0031) kk(0x85);
0165 E805 LDI R16,0x85
0166 DFAF RCALL _kk
(0032) USART_Transmit(':');
0167 E30A LDI R16,0x3A
0168 E010 LDI R17,0
0169 940E010B CALL _USART_Transmit
(0033) kk(0x83);
016B E803 LDI R16,0x83
016C DFA9 RCALL _kk
(0034) USART_Transmit(':');
016D E30A LDI R16,0x3A
016E E010 LDI R17,0
016F 940E010B CALL _USART_Transmit
(0035) kk(0x81);
0171 E801 LDI R16,0x81
0172 DFA3 RCALL _kk
(0036) USART_Transmit('\n');
0173 E00A LDI R16,0xA
0174 E010 LDI R17,0
0175 940E010B CALL _USART_Transmit
0177 CFBF RJMP 0x0137
(0037) }
(0038) }
FILE: <library>
0178 9508 RET
pop_gset2:
0179 E0E2 LDI R30,2
017A 940C0186 JMP pop
pop_gset3:
017C E0E4 LDI R30,4
017D 940C0186 JMP pop
pop_gset4:
017F E0E8 LDI R30,0x8
0180 940C0186 JMP pop
push_gset1:
0182 935A ST R21,-Y
0183 934A ST R20,-Y
0184 9508 RET
pop_gset1:
0185 E0E1 LDI R30,1
pop:
0186 9149 LD R20,Y+
0187 9159 LD R21,Y+
0188 FDE0 SBRC R30,0
0189 9508 RET
018A 9169 LD R22,Y+
018B 9179 LD R23,Y+
018C FDE1 SBRC R30,1
018D 9508 RET
018E 90A9 LD R10,Y+
018F 90B9 LD R11,Y+
0190 FDE2 SBRC R30,2
0191 9508 RET
0192 90C9 LD R12,Y+
0193 90D9 LD R13,Y+
0194 FDE3 SBRC R30,3
0195 9508 RET
0196 90E9 LD R14,Y+
0197 90F9 LD R15,Y+
0198 9508 RET
push_gset2:
0199 937A ST R23,-Y
019A 936A ST R22,-Y
019B 940C0182 JMP push_gset1
push_gset3:
019D 92BA ST R11,-Y
019E 92AA ST R10,-Y
019F 940C0199 JMP push_gset2
push_gset4:
01A1 92DA ST R13,-Y
01A2 92CA ST R12,-Y
01A3 940C019D JMP push_gset3
lsl8:
01A5 2311 TST R17
01A6 F019 BEQ 0x01AA
01A7 0F00 LSL R16
01A8 951A DEC R17
01A9 CFFB RJMP lsl8
01AA 9508 RET
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