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📄 insnsa.c

📁 汇编编译器的最新版本的源码.买了自己动手写操作系统这本书的人一定要下
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/* This file auto-generated from insns.dat by insns.pl - don't edit it */

#include "nasm.h"
#include "insns.h"

static const struct itemplate instrux_AAA[] = {
    {I_AAA, 0, {0,0,0,0,0}, nasm_bytecodes+19617, IF_8086|IF_NOLONG},
    ITEMPLATE_END
};

static const struct itemplate instrux_AAD[] = {
    {I_AAD, 0, {0,0,0,0,0}, nasm_bytecodes+18533, IF_8086|IF_NOLONG},
    {I_AAD, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18537, IF_8086|IF_SB|IF_NOLONG},
    ITEMPLATE_END
};

static const struct itemplate instrux_AAM[] = {
    {I_AAM, 0, {0,0,0,0,0}, nasm_bytecodes+18541, IF_8086|IF_NOLONG},
    {I_AAM, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18545, IF_8086|IF_SB|IF_NOLONG},
    ITEMPLATE_END
};

static const struct itemplate instrux_AAS[] = {
    {I_AAS, 0, {0,0,0,0,0}, nasm_bytecodes+19620, IF_8086|IF_NOLONG},
    ITEMPLATE_END
};

static const struct itemplate instrux_ADC[] = {
    {I_ADC, 2, {MEMORY,REG8,0,0,0}, nasm_bytecodes+18549, IF_8086|IF_SM},
    {I_ADC, 2, {REG8,REG8,0,0,0}, nasm_bytecodes+18549, IF_8086},
    {I_ADC, 2, {MEMORY,REG16,0,0,0}, nasm_bytecodes+16658, IF_8086|IF_SM},
    {I_ADC, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+16658, IF_8086},
    {I_ADC, 2, {MEMORY,REG32,0,0,0}, nasm_bytecodes+16663, IF_386|IF_SM},
    {I_ADC, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+16663, IF_386},
    {I_ADC, 2, {MEMORY,REG64,0,0,0}, nasm_bytecodes+16668, IF_X64|IF_SM},
    {I_ADC, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+16668, IF_X64},
    {I_ADC, 2, {REG8,MEMORY,0,0,0}, nasm_bytecodes+11160, IF_8086|IF_SM},
    {I_ADC, 2, {REG8,REG8,0,0,0}, nasm_bytecodes+11160, IF_8086},
    {I_ADC, 2, {REG16,MEMORY,0,0,0}, nasm_bytecodes+16673, IF_8086|IF_SM},
    {I_ADC, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+16673, IF_8086},
    {I_ADC, 2, {REG32,MEMORY,0,0,0}, nasm_bytecodes+16678, IF_386|IF_SM},
    {I_ADC, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+16678, IF_386},
    {I_ADC, 2, {REG64,MEMORY,0,0,0}, nasm_bytecodes+16683, IF_X64|IF_SM},
    {I_ADC, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+16683, IF_X64},
    {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13124, IF_8086},
    {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13130, IF_386},
    {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13136, IF_X64},
    {I_ADC, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18553, IF_8086|IF_SM},
    {I_ADC, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16688, IF_8086|IF_SM},
    {I_ADC, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16693, IF_386|IF_SM},
    {I_ADC, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16698, IF_X64|IF_SM},
    {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16703, IF_8086|IF_SM},
    {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13142, IF_8086|IF_SM},
    {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13148, IF_386|IF_SM},
    {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13154, IF_X64|IF_SM},
    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16703, IF_8086|IF_SM},
    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13142, IF_8086|IF_SM},
    {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13148, IF_386|IF_SM},
    ITEMPLATE_END
};

static const struct itemplate instrux_ADD[] = {
    {I_ADD, 2, {MEMORY,REG8,0,0,0}, nasm_bytecodes+18557, IF_8086|IF_SM},
    {I_ADD, 2, {REG8,REG8,0,0,0}, nasm_bytecodes+18557, IF_8086},
    {I_ADD, 2, {MEMORY,REG16,0,0,0}, nasm_bytecodes+16708, IF_8086|IF_SM},
    {I_ADD, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+16708, IF_8086},
    {I_ADD, 2, {MEMORY,REG32,0,0,0}, nasm_bytecodes+16713, IF_386|IF_SM},
    {I_ADD, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+16713, IF_386},
    {I_ADD, 2, {MEMORY,REG64,0,0,0}, nasm_bytecodes+16718, IF_X64|IF_SM},
    {I_ADD, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+16718, IF_X64},
    {I_ADD, 2, {REG8,MEMORY,0,0,0}, nasm_bytecodes+11811, IF_8086|IF_SM},
    {I_ADD, 2, {REG8,REG8,0,0,0}, nasm_bytecodes+11811, IF_8086},
    {I_ADD, 2, {REG16,MEMORY,0,0,0}, nasm_bytecodes+16723, IF_8086|IF_SM},
    {I_ADD, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+16723, IF_8086},
    {I_ADD, 2, {REG32,MEMORY,0,0,0}, nasm_bytecodes+16728, IF_386|IF_SM},
    {I_ADD, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+16728, IF_386},
    {I_ADD, 2, {REG64,MEMORY,0,0,0}, nasm_bytecodes+16733, IF_X64|IF_SM},
    {I_ADD, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+16733, IF_X64},
    {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13160, IF_8086},
    {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13166, IF_386},
    {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13172, IF_X64},
    {I_ADD, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18561, IF_8086|IF_SM},
    {I_ADD, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16738, IF_8086|IF_SM},
    {I_ADD, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16743, IF_386|IF_SM},
    {I_ADD, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16748, IF_X64|IF_SM},
    {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16753, IF_8086|IF_SM},
    {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13178, IF_8086|IF_SM},
    {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13184, IF_386|IF_SM},
    {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13190, IF_X64|IF_SM},
    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16753, IF_8086|IF_SM},
    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13178, IF_8086|IF_SM},
    {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13184, IF_386|IF_SM},
    ITEMPLATE_END
};

static const struct itemplate instrux_ADDPD[] = {
    {I_ADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15074, IF_WILLAMETTE|IF_SSE2|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_ADDPS[] = {
    {I_ADDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14354, IF_KATMAI|IF_SSE},
    ITEMPLATE_END
};

static const struct itemplate instrux_ADDSD[] = {
    {I_ADDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15080, IF_WILLAMETTE|IF_SSE2|IF_SQ},
    ITEMPLATE_END
};

static const struct itemplate instrux_ADDSS[] = {
    {I_ADDSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14360, IF_KATMAI|IF_SSE|IF_SD},
    ITEMPLATE_END
};

static const struct itemplate instrux_ADDSUBPD[] = {
    {I_ADDSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15368, IF_PRESCOTT|IF_SSE3|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_ADDSUBPS[] = {
    {I_ADDSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15374, IF_PRESCOTT|IF_SSE3|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_AESDEC[] = {
    {I_AESDEC, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9659, IF_WESTMERE|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_AESDECLAST[] = {
    {I_AESDECLAST, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9666, IF_WESTMERE|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_AESENC[] = {
    {I_AESENC, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9645, IF_WESTMERE|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_AESENCLAST[] = {
    {I_AESENCLAST, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9652, IF_WESTMERE|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_AESIMC[] = {
    {I_AESIMC, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9673, IF_WESTMERE|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_AESKEYGENASSIST[] = {
    {I_AESKEYGENASSIST, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+6408, IF_WESTMERE|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_AND[] = {
    {I_AND, 2, {MEMORY,REG8,0,0,0}, nasm_bytecodes+18565, IF_8086|IF_SM},
    {I_AND, 2, {REG8,REG8,0,0,0}, nasm_bytecodes+18565, IF_8086},
    {I_AND, 2, {MEMORY,REG16,0,0,0}, nasm_bytecodes+16758, IF_8086|IF_SM},
    {I_AND, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+16758, IF_8086},
    {I_AND, 2, {MEMORY,REG32,0,0,0}, nasm_bytecodes+16763, IF_386|IF_SM},
    {I_AND, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+16763, IF_386},
    {I_AND, 2, {MEMORY,REG64,0,0,0}, nasm_bytecodes+16768, IF_X64|IF_SM},
    {I_AND, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+16768, IF_X64},
    {I_AND, 2, {REG8,MEMORY,0,0,0}, nasm_bytecodes+12098, IF_8086|IF_SM},
    {I_AND, 2, {REG8,REG8,0,0,0}, nasm_bytecodes+12098, IF_8086},
    {I_AND, 2, {REG16,MEMORY,0,0,0}, nasm_bytecodes+16773, IF_8086|IF_SM},
    {I_AND, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+16773, IF_8086},
    {I_AND, 2, {REG32,MEMORY,0,0,0}, nasm_bytecodes+16778, IF_386|IF_SM},
    {I_AND, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+16778, IF_386},
    {I_AND, 2, {REG64,MEMORY,0,0,0}, nasm_bytecodes+16783, IF_X64|IF_SM},
    {I_AND, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+16783, IF_X64},
    {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13196, IF_8086},
    {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13202, IF_386},
    {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13208, IF_X64},
    {I_AND, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18569, IF_8086|IF_SM},
    {I_AND, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16788, IF_8086|IF_SM},
    {I_AND, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16793, IF_386|IF_SM},
    {I_AND, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16798, IF_X64|IF_SM},
    {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16803, IF_8086|IF_SM},
    {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13214, IF_8086|IF_SM},
    {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13220, IF_386|IF_SM},
    {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13226, IF_X64|IF_SM},
    {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16803, IF_8086|IF_SM},
    {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13214, IF_8086|IF_SM},
    {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13220, IF_386|IF_SM},
    ITEMPLATE_END
};

static const struct itemplate instrux_ANDNPD[] = {
    {I_ANDNPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15086, IF_WILLAMETTE|IF_SSE2|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_ANDNPS[] = {
    {I_ANDNPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14366, IF_KATMAI|IF_SSE},
    ITEMPLATE_END
};

static const struct itemplate instrux_ANDPD[] = {
    {I_ANDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15092, IF_WILLAMETTE|IF_SSE2|IF_SO},
    ITEMPLATE_END
};

static const struct itemplate instrux_ANDPS[] = {
    {I_ANDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14372, IF_KATMAI|IF_SSE},
    ITEMPLATE_END
};

static const struct itemplate instrux_ARPL[] = {
    {I_ARPL, 2, {MEMORY,REG16,0,0,0}, nasm_bytecodes+18573, IF_286|IF_PROT|IF_SM|IF_NOLONG},
    {I_ARPL, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+18573, IF_286|IF_PROT|IF_NOLONG},
    ITEMPLATE_END
};

static const struct itemplate instrux_BB0_RESET[] = {
    {I_BB0_RESET, 0, {0,0,0,0,0}, nasm_bytecodes+18577, IF_PENT|IF_CYRIX},
    ITEMPLATE_END
};

static const struct itemplate instrux_BB1_RESET[] = {
    {I_BB1_RESET, 0, {0,0,0,0,0}, nasm_bytecodes+18581, IF_PENT|IF_CYRIX},
    ITEMPLATE_END
};

static const struct itemplate instrux_BLENDPD[] = {
    {I_BLENDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+6128, IF_SSE41},
    ITEMPLATE_END
};

static const struct itemplate instrux_BLENDPS[] = {
    {I_BLENDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+6136, IF_SSE41},
    ITEMPLATE_END
};

static const struct itemplate instrux_BLENDVPD[] = {
    {I_BLENDVPD, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8406, IF_SSE41},
    ITEMPLATE_END
};

static const struct itemplate instrux_BLENDVPS[] = {
    {I_BLENDVPS, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8413, IF_SSE41},
    ITEMPLATE_END
};

static const struct itemplate instrux_BOUND[] = {
    {I_BOUND, 2, {REG16,MEMORY,0,0,0}, nasm_bytecodes+16808, IF_186|IF_NOLONG},
    {I_BOUND, 2, {REG32,MEMORY,0,0,0}, nasm_bytecodes+16813, IF_386|IF_NOLONG},
    ITEMPLATE_END
};

static const struct itemplate instrux_BSF[] = {
    {I_BSF, 2, {REG16,MEMORY,0,0,0}, nasm_bytecodes+13232, IF_386|IF_SM},
    {I_BSF, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+13232, IF_386},
    {I_BSF, 2, {REG32,MEMORY,0,0,0}, nasm_bytecodes+13238, IF_386|IF_SM},
    {I_BSF, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+13238, IF_386},
    {I_BSF, 2, {REG64,MEMORY,0,0,0}, nasm_bytecodes+13244, IF_X64|IF_SM},
    {I_BSF, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+13244, IF_X64},
    ITEMPLATE_END
};

static const struct itemplate instrux_BSR[] = {
    {I_BSR, 2, {REG16,MEMORY,0,0,0}, nasm_bytecodes+13250, IF_386|IF_SM},
    {I_BSR, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+13250, IF_386},
    {I_BSR, 2, {REG32,MEMORY,0,0,0}, nasm_bytecodes+13256, IF_386|IF_SM},
    {I_BSR, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+13256, IF_386},
    {I_BSR, 2, {REG64,MEMORY,0,0,0}, nasm_bytecodes+13262, IF_X64|IF_SM},
    {I_BSR, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+13262, IF_X64},
    ITEMPLATE_END
};

static const struct itemplate instrux_BSWAP[] = {
    {I_BSWAP, 1, {REG32,0,0,0,0}, nasm_bytecodes+13268, IF_486},
    {I_BSWAP, 1, {REG64,0,0,0,0}, nasm_bytecodes+13274, IF_X64},
    ITEMPLATE_END
};

static const struct itemplate instrux_BT[] = {
    {I_BT, 2, {MEMORY,REG16,0,0,0}, nasm_bytecodes+13280, IF_386|IF_SM},
    {I_BT, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+13280, IF_386},
    {I_BT, 2, {MEMORY,REG32,0,0,0}, nasm_bytecodes+13286, IF_386|IF_SM},
    {I_BT, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+13286, IF_386},
    {I_BT, 2, {MEMORY,REG64,0,0,0}, nasm_bytecodes+13292, IF_X64|IF_SM},
    {I_BT, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+13292, IF_X64},
    {I_BT, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7216, IF_386|IF_SB},
    {I_BT, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7223, IF_386|IF_SB},
    {I_BT, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7230, IF_X64|IF_SB},
    ITEMPLATE_END
};

static const struct itemplate instrux_BTC[] = {
    {I_BTC, 2, {MEMORY,REG16,0,0,0}, nasm_bytecodes+13298, IF_386|IF_SM},
    {I_BTC, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+13298, IF_386},
    {I_BTC, 2, {MEMORY,REG32,0,0,0}, nasm_bytecodes+13304, IF_386|IF_SM},
    {I_BTC, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+13304, IF_386},
    {I_BTC, 2, {MEMORY,REG64,0,0,0}, nasm_bytecodes+13310, IF_X64|IF_SM},
    {I_BTC, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+13310, IF_X64},
    {I_BTC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7237, IF_386|IF_SB},
    {I_BTC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7244, IF_386|IF_SB},
    {I_BTC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7251, IF_X64|IF_SB},
    ITEMPLATE_END
};

static const struct itemplate instrux_BTR[] = {
    {I_BTR, 2, {MEMORY,REG16,0,0,0}, nasm_bytecodes+13316, IF_386|IF_SM},
    {I_BTR, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+13316, IF_386},
    {I_BTR, 2, {MEMORY,REG32,0,0,0}, nasm_bytecodes+13322, IF_386|IF_SM},
    {I_BTR, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+13322, IF_386},
    {I_BTR, 2, {MEMORY,REG64,0,0,0}, nasm_bytecodes+13328, IF_X64|IF_SM},
    {I_BTR, 2, {REG64,REG64,0,0,0}, nasm_bytecodes+13328, IF_X64},
    {I_BTR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7258, IF_386|IF_SB},
    {I_BTR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7265, IF_386|IF_SB},
    {I_BTR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7272, IF_X64|IF_SB},
    ITEMPLATE_END
};

static const struct itemplate instrux_BTS[] = {
    {I_BTS, 2, {MEMORY,REG16,0,0,0}, nasm_bytecodes+13334, IF_386|IF_SM},
    {I_BTS, 2, {REG16,REG16,0,0,0}, nasm_bytecodes+13334, IF_386},
    {I_BTS, 2, {MEMORY,REG32,0,0,0}, nasm_bytecodes+13340, IF_386|IF_SM},
    {I_BTS, 2, {REG32,REG32,0,0,0}, nasm_bytecodes+13340, IF_386},
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