📄 cdefbf535.h

📁 此代码实现blackfin系列DSP的上电监控代码
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/* * cdefBF535.h * * This file is subject to the terms and conditions of the GNU Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Non-GPL License also available as part of VisualDSP++ * * http://www.analog.com/processors/resources/crosscore/visualDspDevSoftware.html * * (c) Copyright 2001-2005 Analog Devices, Inc. All rights reserved * * This file under source code control, please send bugs or changes to: * dsptools.support@analog.com * */#ifndef _CDEF_BF535_H#define _CDEF_BF535_H/* include all Core registers and bit definitions */#if defined(__ADSPLPBLACKFIN__)#warning cdefBF535.h should only be included for 535 compatible chips.#endif#include <defBF535.h>/* include core specific register pointer definitions */#include <cdefblackfin.h>/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */#define pPLL_CTL ((volatile unsigned long *)PLL_CTL)#define pPLL_STAT ((volatile unsigned short *)PLL_STAT)#define pPLL_LOCKCNT ((volatile unsigned short *)PLL_LOCKCNT)#define pSWRST ((volatile unsigned short *)SWRST)#define pSYSCR ((volatile unsigned short *)SYSCR)#define pPLL_IOCKR ((volatile unsigned short *)PLL_IOCKR)#define pPLL_IOCK ((volatile unsigned short *)PLL_IOCK) /* JTAG/Debug Communication Channel (0xFFC0 0800-0xFFC0 0BFF) */#define pCHIPID ((volatile unsigned long *)CHIPID)/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) *//* #define SIC_RVECT	0xFFC00C00 */	/* Reset Vector Register */#define pSIC_IAR0 ((volatile unsigned long *)SIC_IAR0)#define pSIC_IAR1 ((volatile unsigned long *)SIC_IAR1)#define pSIC_IAR2 ((volatile unsigned long *)SIC_IAR2)#define pSIC_IMASK ((volatile unsigned long *)SIC_IMASK)#define pSIC_ISR ((volatile unsigned long *)SIC_ISR)#define pSIC_IWR ((volatile unsigned long *)SIC_IWR)/* Watchdog Timer (0xFFC0 1000-0xFFC0 13FF) */#define pWDOG_CTL ((volatile unsigned short *)WDOG_CTL)#define pWDOG_CNT ((volatile unsigned long *)WDOG_CNT)#define pWDOG_STAT ((volatile unsigned long *)WDOG_STAT)/* Real Time Clock (0xFFC0 1400-0xFFC0 17FF) */#define pRTC_STAT ((volatile unsigned long *)RTC_STAT)#define pRTC_ICTL ((volatile unsigned short *)RTC_ICTL)#define pRTC_ISTAT ((volatile unsigned short *)RTC_ISTAT)#define pRTC_SWCNT ((volatile unsigned short *)RTC_SWCNT)#define pRTC_ALARM ((volatile unsigned long *)RTC_ALARM)#define pRTC_FAST ((volatile unsigned short *)RTC_FAST)/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */#define pFIO_DIR ((volatile unsigned short *)FIO_DIR)#define pFIO_FLAG_C ((volatile unsigned short *)FIO_FLAG_C)#define pFIO_FLAG_S ((volatile unsigned short *)FIO_FLAG_S)#define pFIO_MASKA_C ((volatile unsigned short *)FIO_MASKA_C)#define pFIO_MASKA_S ((volatile unsigned short *)FIO_MASKA_S)#define pFIO_MASKB_C ((volatile unsigned short *)FIO_MASKB_C)#define pFIO_MASKB_S ((volatile unsigned short *)FIO_MASKB_S)#define pFIO_POLAR ((volatile unsigned short *)FIO_POLAR)#define pFIO_EDGE ((volatile unsigned short *)FIO_EDGE)#define pFIO_BOTH ((volatile unsigned short *)FIO_BOTH)/* Aysnchronous Memory Controller - External Bus Interface Unit (0xFFC0 3C00-0xFFC0 3FFF) */#define pEBIU_AMGCTL ((volatile unsigned short *)EBIU_AMGCTL)#define pEBIU_AMBCTL0 ((volatile unsigned long *)EBIU_AMBCTL0)#define pEBIU_AMBCTL1 ((volatile unsigned long *)EBIU_AMBCTL1)/* USB Registers (0xFFC0 4400 - 0xFFC0 47FF) */#define pUSBD_ID ((volatile unsigned short *)USBD_ID)#define pUSBD_FRM ((volatile unsigned short *)USBD_FRM)#define pUSBD_FRMAT ((volatile unsigned short *)USBD_FRMAT)#define pUSBD_EPBUF ((volatile unsigned short *)USBD_EPBUF)#define pUSBD_STAT ((volatile unsigned short *)USBD_STAT)#define pUSBD_CTRL ((volatile unsigned short *)USBD_CTRL)#define pUSBD_GINTR ((volatile unsigned short *)USBD_GINTR)#define pUSBD_GMASK ((volatile unsigned short *)USBD_GMASK)#define pUSBD_DMACFG ((volatile unsigned short *)USBD_DMACFG)#define pUSBD_DMABL ((volatile unsigned short *)USBD_DMABL)#define pUSBD_DMABH ((volatile unsigned short *)USBD_DMABH)#define pUSBD_DMACT ((volatile unsigned short *)USBD_DMACT)#define pUSBD_DMAIRQ ((volatile unsigned short *)USBD_DMAIRQ)#define pUSBD_INTR0 ((volatile unsigned short *)USBD_INTR0)#define pUSBD_MASK0 ((volatile unsigned short *)USBD_MASK0)#define pUSBD_EPCFG0 ((volatile unsigned short *)USBD_EPCFG0)#define pUSBD_EPADR0 ((volatile unsigned short *)USBD_EPADR0)#define pUSBD_EPLEN0 ((volatile unsigned short *)USBD_EPLEN0)#define pUSBD_INTR1 ((volatile unsigned short *)USBD_INTR1)#define pUSBD_MASK1 ((volatile unsigned short *)USBD_MASK1)#define pUSBD_EPCFG1 ((volatile unsigned short *)USBD_EPCFG1)#define pUSBD_EPADR1 ((volatile unsigned short *)USBD_EPADR1)#define pUSBD_EPLEN1 ((volatile unsigned short *)USBD_EPLEN1)#define pUSBD_INTR2 ((volatile unsigned short *)USBD_INTR2)#define pUSBD_MASK2 ((volatile unsigned short *)USBD_MASK2)#define pUSBD_EPCFG2 ((volatile unsigned short *)USBD_EPCFG2)#define pUSBD_EPADR2 ((volatile unsigned short *)USBD_EPADR2)#define pUSBD_EPLEN2 ((volatile unsigned short *)USBD_EPLEN2)#define pUSBD_INTR3 ((volatile unsigned short *)USBD_INTR3)#define pUSBD_MASK3 ((volatile unsigned short *)USBD_MASK3)#define pUSBD_EPCFG3 ((volatile unsigned short *)USBD_EPCFG3)#define pUSBD_EPADR3 ((volatile unsigned short *)USBD_EPADR3)#define pUSBD_EPLEN3 ((volatile unsigned short *)USBD_EPLEN3)#define pUSBD_INTR4 ((volatile unsigned short *)USBD_INTR4)#define pUSBD_MASK4 ((volatile unsigned short *)USBD_MASK4)#define pUSBD_EPCFG4 ((volatile unsigned short *)USBD_EPCFG4)#define pUSBD_EPADR4 ((volatile unsigned short *)USBD_EPADR4)#define pUSBD_EPLEN4 ((volatile unsigned short *)USBD_EPLEN4)#define pUSBD_INTR5 ((volatile unsigned short *)USBD_INTR5)#define pUSBD_MASK5 ((volatile unsigned short *)USBD_MASK5)#define pUSBD_EPCFG5 ((volatile unsigned short *)USBD_EPCFG5)#define pUSBD_EPADR5 ((volatile unsigned short *)USBD_EPADR5)#define pUSBD_EPLEN5 ((volatile unsigned short *)USBD_EPLEN5)#define pUSBD_INTR6 ((volatile unsigned short *)USBD_INTR6)#define pUSBD_MASK6 ((volatile unsigned short *)USBD_MASK6)#define pUSBD_EPCFG6 ((volatile unsigned short *)USBD_EPCFG6)#define pUSBD_EPADR6 ((volatile unsigned short *)USBD_EPADR6)#define pUSBD_EPLEN6 ((volatile unsigned short *)USBD_EPLEN6)#define pUSBD_INTR7 ((volatile unsigned short *)USBD_INTR7)#define pUSBD_MASK7 ((volatile unsigned short *)USBD_MASK7)#define pUSBD_EPCFG7 ((volatile unsigned short *)USBD_EPCFG7)#define pUSBD_EPADR7 ((volatile unsigned short *)USBD_EPADR7)#define pUSBD_EPLEN7 ((volatile unsigned short *)USBD_EPLEN7)/* SDRAM Controller External Bus Interface Unit (0xFFC0 4C00-0xFFC0 4FFF) */#define pEBIU_SDGCTL ((volatile unsigned long *)EBIU_SDGCTL)#define pEBIU_SDRRC ((volatile unsigned short *)EBIU_SDRRC)#define pEBIU_SDSTAT ((volatile unsigned short *)EBIU_SDSTAT)#define pEBIU_SDBCTL ((volatile unsigned long *)EBIU_SDBCTL)/* Memory Map *//* Core MMRs */#define pCOREMMR_BASE ((volatile void *)COREMMR_BASE)/* System MMRs */#define pSYSMMR_BASE ((volatile void *)SYSMMR_BASE)/* L1 cache/SRAM internal memory */#define pL1_DATA_A ((void *)L1_DATA_A)#define pL1_DATA_B ((void *)L1_DATA_B)#define pL1_CODE ((void *)L1_CODE)#define pL1_SCRATCH ((void *)L1_SCRATCH)/* L2 SRAM external memory */#define pL2_BASE ((void *)L2_BASE)/* PCI Spaces */#define pPCI_CONFIG_SPACE_PORT ((volatile void *)PCI_CONFIG_SPACE_PORT)#define pPCI_CONFIG_BASE ((volatile void *)PCI_CONFIG_BASE)#define pPCI_IO_BASE ((volatile void *)PCI_IO_BASE)#define pPCI_MEM_BASE ((volatile void *)PCI_MEM_BASE)/* Async Memory Banks */#define pASYNC_BANK3_BASE ((void *)ASYNC_BANK3_BASE)#define pASYNC_BANK2_BASE ((void *)ASYNC_BANK2_BASE)#define pASYNC_BANK1_BASE ((void *)ASYNC_BANK1_BASE)#define pASYNC_BANK0_BASE ((void *)ASYNC_BANK0_BASE)/* Sync DRAM Banks */#define pSDRAM_BANK3_BASE ((void *)SDRAM_BANK3_BASE)#define pSDRAM_BANK2_BASE ((void *)SDRAM_BANK2_BASE)#define pSDRAM_BANK1_BASE ((void *)SDRAM_BANK1_BASE)#define pSDRAM_BANK0_BASE ((void *)SDRAM_BANK0_BASE)/* System MMR Register Map *//* * L2 MISR MMRs (0xFFC0 0000-0xFFC0 03FF) * #define MISR_CTL               0xFFC00000     Control Register * #define MISR_RMISR0            0xFFC00004     coreL2[31:0] read bus * #define MISR_RMISR1            0xFFC00008     coreL2[63:32] read bus * #define MISR_RMISR2            0xFFC0000C     sysL2[31:0] read bus * #define MISR_WMISR0            0xFFC00010     coreL2[31:0] write bus * #define MISR_WMISR1            0xFFC00014     coreL2[63:32] write bus * #define MISR_WMISR2            0xFFC00018     sysL2[31:0] write bus *//* UART 0 Controller (0xFFC0 1800-0xFFC0 1BFF) */#define pUART0_THR ((volatile unsigned short *)UART0_THR)#define pUART0_RBR ((volatile unsigned short *)UART0_RBR)#define pUART0_DLL ((volatile unsigned short *)UART0_DLL)#define pUART0_IER ((volatile unsigned short *)UART0_IER)#define pUART0_DLH ((volatile unsigned short *)UART0_DLH)#define pUART0_IIR ((volatile unsigned short *)UART0_IIR)#define pUART0_LCR ((volatile unsigned short *)UART0_LCR)#define pUART0_MCR ((volatile unsigned short *)UART0_MCR)#define pUART0_LSR ((volatile unsigned short *)UART0_LSR)#define pUART0_MSR ((volatile unsigned short *)UART0_MSR)#define pUART0_SCR ((volatile unsigned short *)UART0_SCR)#define pUART0_IRCR ((volatile unsigned short *)UART0_IRCR)#define pUART0_CURR_PTR_RX ((volatile unsigned short *)UART0_CURR_PTR_RX)#define pUART0_CONFIG_RX ((volatile unsigned short *)UART0_CONFIG_RX)#define pUART0_START_ADDR_HI_RX ((volatile unsigned short *)UART0_START_ADDR_HI_RX)#define pUART0_START_ADDR_LO_RX ((volatile unsigned short *)UART0_START_ADDR_LO_RX)#define pUART0_COUNT_RX ((volatile unsigned short *)UART0_COUNT_RX)#define pUART0_NEXT_DESCR_RX ((volatile unsigned short *)UART0_NEXT_DESCR_RX)#define pUART0_DESCR_RDY_RX ((volatile unsigned short *)UART0_DESCR_RDY_RX)#define pUART0_IRQSTAT_RX ((volatile unsigned short *)UART0_IRQSTAT_RX)#define pUART0_CURR_PTR_TX ((volatile unsigned short *)UART0_CURR_PTR_TX)#define pUART0_CONFIG_TX ((volatile unsigned short *)UART0_CONFIG_TX)#define pUART0_START_ADDR_HI_TX ((volatile unsigned short *)UART0_START_ADDR_HI_TX)#define pUART0_START_ADDR_LO_TX ((volatile unsigned short *)UART0_START_ADDR_LO_TX)#define pUART0_COUNT_TX ((volatile unsigned short *)UART0_COUNT_TX)#define pUART0_NEXT_DESCR_TX ((volatile unsigned short *)UART0_NEXT_DESCR_TX)#define pUART0_DESCR_RDY_TX ((volatile unsigned short *)UART0_DESCR_RDY_TX)#define pUART0_IRQSTAT_TX ((volatile unsigned short *)UART0_IRQSTAT_TX)/* UART 1 Controller (0xFFC0 1C00-0xFFC0 1FFF) */#define pUART1_THR ((volatile unsigned short *)UART1_THR)#define pUART1_RBR ((volatile unsigned short *)UART1_RBR)#define pUART1_DLL ((volatile unsigned short *)UART1_DLL)#define pUART1_IER ((volatile unsigned short *)UART1_IER)#define pUART1_DLH ((volatile unsigned short *)UART1_DLH)#define pUART1_IIR ((volatile unsigned short *)UART1_IIR)#define pUART1_LCR ((volatile unsigned short *)UART1_LCR)#define pUART1_MCR ((volatile unsigned short *)UART1_MCR)#define pUART1_LSR ((volatile unsigned short *)UART1_LSR)#define pUART1_MSR ((volatile unsigned short *)UART1_MSR)
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