defbf535.h

此代码实现blackfin系列DSP的上电监控代码

#define P4_IVG15		0x00080000	/* Peripheral #4 assigned IVG15 */
#define P5_IVG7			0x00000000	/* Peripheral #5 assigned IVG7 */
#define P5_IVG8			0x00100000	/* Peripheral #5 assigned IVG8 */
#define P5_IVG9			0x00200000	/* Peripheral #5 assigned IVG9 */
#define P5_IVG10		0x00300000	/* Peripheral #5 assigned IVG10 */
#define P5_IVG11		0x00400000	/* Peripheral #5 assigned IVG11 */
#define P5_IVG12		0x00500000	/* Peripheral #5 assigned IVG12 */
#define P5_IVG13		0x00600000	/* Peripheral #5 assigned IVG13 */
#define P5_IVG14		0x00700000	/* Peripheral #5 assigned IVG14 */
#define P5_IVG15		0x00800000	/* Peripheral #5 assigned IVG15 */
#define P6_IVG7			0x00000000	/* Peripheral #6 assigned IVG7 */
#define P6_IVG8			0x01000000	/* Peripheral #6 assigned IVG8 */
#define P6_IVG9			0x02000000	/* Peripheral #6 assigned IVG9 */
#define P6_IVG10		0x03000000	/* Peripheral #6 assigned IVG10 */
#define P6_IVG11		0x04000000	/* Peripheral #6 assigned IVG11 */
#define P6_IVG12		0x05000000	/* Peripheral #6 assigned IVG12 */
#define P6_IVG13		0x06000000	/* Peripheral #6 assigned IVG13 */
#define P6_IVG14		0x07000000	/* Peripheral #6 assigned IVG14 */
#define P6_IVG15		0x08000000	/* Peripheral #6 assigned IVG15 */
#define P7_IVG7			0x00000000	/* Peripheral #7 assigned IVG7 */
#define P7_IVG8			0x10000000	/* Peripheral #7 assigned IVG8 */
#define P7_IVG9			0x20000000	/* Peripheral #7 assigned IVG9 */
#define P7_IVG10		0x30000000	/* Peripheral #7 assigned IVG10 */
#define P7_IVG11		0x40000000	/* Peripheral #7 assigned IVG11 */
#define P7_IVG12		0x50000000	/* Peripheral #7 assigned IVG12 */
#define P7_IVG13		0x60000000	/* Peripheral #7 assigned IVG13 */
#define P7_IVG14		0x70000000	/* Peripheral #7 assigned IVG14 */
#define P7_IVG15		0x80000000	/* Peripheral #7 assigned IVG15 */

/* SIC_IAR1 Masks */
#define P8_IVG7			0x00000000	/* Peripheral #8 assigned IVG7 */
#define P8_IVG8			0x00000001	/* Peripheral #8 assigned IVG8 */
#define P8_IVG9			0x00000002	/* Peripheral #8 assigned IVG9 */
#define P8_IVG10		0x00000003	/* Peripheral #8 assigned IVG10 */
#define P8_IVG11		0x00000004	/* Peripheral #8 assigned IVG11 */
#define P8_IVG12		0x00000005	/* Peripheral #8 assigned IVG12 */
#define P8_IVG13		0x00000006	/* Peripheral #8 assigned IVG13 */
#define P8_IVG14		0x00000007	/* Peripheral #8 assigned IVG14 */
#define P8_IVG15		0x00000008	/* Peripheral #8 assigned IVG15 */
#define P9_IVG7			0x00000000	/* Peripheral #9 assigned IVG7 */
#define P9_IVG8			0x00000010	/* Peripheral #9 assigned IVG8 */
#define P9_IVG9			0x00000020	/* Peripheral #9 assigned IVG9 */
#define P9_IVG10		0x00000030	/* Peripheral #9 assigned IVG10 */
#define P9_IVG11		0x00000040	/* Peripheral #9 assigned IVG11 */
#define P9_IVG12		0x00000050	/* Peripheral #9 assigned IVG12 */
#define P9_IVG13		0x00000060	/* Peripheral #9 assigned IVG13 */
#define P9_IVG14		0x00000070	/* Peripheral #9 assigned IVG14 */
#define P9_IVG15		0x00000080	/* Peripheral #9 assigned IVG15 */
#define P10_IVG7		0x00000000	/* Peripheral #10 assigned IVG7 */
#define P10_IVG8		0x00000100	/* Peripheral #10 assigned IVG8 */
#define P10_IVG9		0x00000200	/* Peripheral #10 assigned IVG9 */
#define P10_IVG10		0x00000300	/* Peripheral #10 assigned IVG10 */
#define P10_IVG11		0x00000400	/* Peripheral #10 assigned IVG11 */
#define P10_IVG12		0x00000500	/* Peripheral #10 assigned IVG12 */
#define P10_IVG13		0x00000600	/* Peripheral #10 assigned IVG13 */
#define P10_IVG14		0x00000700	/* Peripheral #10 assigned IVG14 */
#define P10_IVG15		0x00000800	/* Peripheral #10 assigned IVG15 */
#define P11_IVG7		0x00000000	/* Peripheral #11 assigned IVG7 */
#define P11_IVG8		0x00001000	/* Peripheral #11 assigned IVG8 */
#define P11_IVG9		0x00002000	/* Peripheral #11 assigned IVG9 */
#define P11_IVG10		0x00003000	/* Peripheral #11 assigned IVG10 */
#define P11_IVG11		0x00004000	/* Peripheral #11 assigned IVG11 */
#define P11_IVG12		0x00005000	/* Peripheral #11 assigned IVG12 */
#define P11_IVG13		0x00006000	/* Peripheral #11 assigned IVG13 */
#define P11_IVG14		0x00007000	/* Peripheral #11 assigned IVG14 */
#define P11_IVG15		0x00008000	/* Peripheral #11 assigned IVG15 */
#define P12_IVG7		0x00000000	/* Peripheral #12 assigned IVG7 */
#define P12_IVG8		0x00010000	/* Peripheral #12 assigned IVG8 */
#define P12_IVG9		0x00020000	/* Peripheral #12 assigned IVG9 */
#define P12_IVG10		0x00030000	/* Peripheral #12 assigned IVG10 */
#define P12_IVG11		0x00040000	/* Peripheral #12 assigned IVG11 */
#define P12_IVG12		0x00050000	/* Peripheral #12 assigned IVG12 */
#define P12_IVG13		0x00060000	/* Peripheral #12 assigned IVG13 */
#define P12_IVG14		0x00070000	/* Peripheral #12 assigned IVG14 */
#define P12_IVG15		0x00080000	/* Peripheral #12 assigned IVG15 */
#define P13_IVG7		0x00000000	/* Peripheral #13 assigned IVG7 */
#define P13_IVG8		0x00100000	/* Peripheral #13 assigned IVG8 */
#define P13_IVG9		0x00200000	/* Peripheral #13 assigned IVG9 */
#define P13_IVG10		0x00300000	/* Peripheral #13 assigned IVG10 */
#define P13_IVG11		0x00400000	/* Peripheral #13 assigned IVG11 */
#define P13_IVG12		0x00500000	/* Peripheral #13 assigned IVG12 */
#define P13_IVG13		0x00600000	/* Peripheral #13 assigned IVG13 */
#define P13_IVG14		0x00700000	/* Peripheral #14 assigned IVG14 */
#define P13_IVG15		0x00800000	/* Peripheral #14 assigned IVG15 */
#define P14_IVG7		0x00000000	/* Peripheral #14 assigned IVG7 */
#define P14_IVG8		0x01000000	/* Peripheral #14 assigned IVG8 */
#define P14_IVG9		0x02000000	/* Peripheral #14 assigned IVG9 */
#define P14_IVG10		0x03000000	/* Peripheral #14 assigned IVG10 */
#define P14_IVG11		0x04000000	/* Peripheral #14 assigned IVG11 */
#define P14_IVG12		0x05000000	/* Peripheral #14 assigned IVG12 */
#define P14_IVG13		0x06000000	/* Peripheral #14 assigned IVG13 */
#define P14_IVG14		0x07000000	/* Peripheral #14 assigned IVG14 */
#define P14_IVG15		0x08000000	/* Peripheral #14 assigned IVG15 */
#define P15_IVG7		0x00000000	/* Peripheral #15 assigned IVG7 */
#define P15_IVG8		0x10000000	/* Peripheral #15 assigned IVG8 */
#define P15_IVG9		0x20000000	/* Peripheral #15 assigned IVG9 */
#define P15_IVG10		0x30000000	/* Peripheral #15 assigned IVG10 */
#define P15_IVG11		0x40000000	/* Peripheral #15 assigned IVG11 */
#define P15_IVG12		0x50000000	/* Peripheral #15 assigned IVG12 */
#define P15_IVG13		0x60000000	/* Peripheral #15 assigned IVG13 */
#define P15_IVG14		0x70000000	/* Peripheral #15 assigned IVG14 */
#define P15_IVG15		0x80000000	/* Peripheral #15 assigned IVG15 */

/* SIC_IAR2 Masks */
#define P16_IVG7		0x00000000	/* Peripheral #16 assigned IVG7 */
#define P16_IVG8		0x00000001	/* Peripheral #16 assigned IVG8 */
#define P16_IVG9		0x00000002	/* Peripheral #16 assigned IVG9 */
#define P16_IVG10		0x00000003	/* Peripheral #16 assigned IVG10 */
#define P16_IVG11		0x00000004	/* Peripheral #16 assigned IVG11 */
#define P16_IVG12		0x00000005	/* Peripheral #16 assigned IVG12 */
#define P16_IVG13		0x00000006	/* Peripheral #16 assigned IVG13 */
#define P16_IVG14		0x00000007	/* Peripheral #16 assigned IVG14 */
#define P16_IVG15		0x00000008	/* Peripheral #16 assigned IVG15 */
#define P17_IVG7		0x00000000	/* Peripheral #17 assigned IVG7 */
#define P17_IVG8		0x00000010	/* Peripheral #17 assigned IVG8 */
#define P17_IVG9		0x00000020	/* Peripheral #17 assigned IVG9 */
#define P17_IVG10		0x00000030	/* Peripheral #17 assigned IVG10 */
#define P17_IVG11		0x00000040	/* Peripheral #17 assigned IVG11 */
#define P17_IVG12		0x00000050	/* Peripheral #17 assigned IVG12 */
#define P17_IVG13		0x00000060	/* Peripheral #17 assigned IVG13 */
#define P17_IVG14		0x00000070	/* Peripheral #17 assigned IVG14 */
#define P17_IVG15		0x00000080	/* Peripheral #17 assigned IVG15 */
#define P18_IVG7		0x00000000	/* Peripheral #18 assigned IVG7 */
#define P18_IVG8		0x00000100	/* Peripheral #18 assigned IVG8 */
#define P18_IVG9		0x00000200	/* Peripheral #18 assigned IVG9 */
#define P18_IVG10		0x00000300	/* Peripheral #18 assigned IVG10 */
#define P18_IVG11		0x00000400	/* Peripheral #18 assigned IVG11 */
#define P18_IVG12		0x00000500	/* Peripheral #18 assigned IVG12 */
#define P18_IVG13		0x00000600	/* Peripheral #18 assigned IVG13 */
#define P18_IVG14		0x00000700	/* Peripheral #18 assigned IVG14 */
#define P18_IVG15		0x00000800	/* Peripheral #18 assigned IVG15 */
#define P19_IVG7		0x00000000	/* Peripheral #19 assigned IVG7 */
#define P19_IVG8		0x00001000	/* Peripheral #19 assigned IVG8 */
#define P19_IVG9		0x00002000	/* Peripheral #19 assigned IVG9 */
#define P19_IVG10		0x00003000	/* Peripheral #19 assigned IVG10 */
#define P19_IVG11		0x00004000	/* Peripheral #19 assigned IVG11 */
#define P19_IVG12		0x00005000	/* Peripheral #19 assigned IVG12 */
#define P19_IVG13		0x00006000	/* Peripheral #19 assigned IVG13 */
#define P19_IVG14		0x00007000	/* Peripheral #19 assigned IVG14 */
#define P19_IVG15		0x00008000	/* Peripheral #19 assigned IVG15 */
#define P20_IVG7		0x00000000	/* Peripheral #20 assigned IVG7 */
#define P20_IVG8		0x00010000	/* Peripheral #20 assigned IVG8 */
#define P20_IVG9		0x00020000	/* Peripheral #20 assigned IVG9 */
#define P20_IVG10		0x00030000	/* Peripheral #20 assigned IVG10 */
#define P20_IVG11		0x00040000	/* Peripheral #20 assigned IVG11 */
#define P20_IVG12		0x00050000	/* Peripheral #20 assigned IVG12 */
#define P20_IVG13		0x00060000	/* Peripheral #20 assigned IVG13 */
#define P20_IVG14		0x00070000	/* Peripheral #20 assigned IVG14 */
#define P20_IVG15		0x00080000	/* Peripheral #20 assigned IVG15 */

/* SIC_IMASK Masks */
#define SIC_UNMASK_ALL		0x00000000	/* Unmask all peripheral interrupts */
#define SIC_MASK_ALL		0xFFFFFFFF	/* Mask all peripheral interrupts */
#define SIC_MASK0		0x00000001	/* Mask Peripheral #0 interrupt */
#define SIC_MASK1		0x00000002	/* Mask Peripheral #1 interrupt */
#define SIC_MASK2		0x00000004	/* Mask Peripheral #2 interrupt */
#define SIC_MASK3		0x00000008	/* Mask Peripheral #3 interrupt */ 
#define SIC_MASK4		0x00000010	/* Mask Peripheral #4 interrupt */
#define SIC_MASK5		0x00000020	/* Mask Peripheral #5 interrupt */ 
#define SIC_MASK6		0x00000040	/* Mask Peripheral #6 interrupt */ 
#define SIC_MASK7		0x00000080	/* Mask Peripheral #7 interrupt */
#define SIC_MASK8		0x00000100	/* Mask Peripheral #8 interrupt */ 
#define SIC_MASK9		0x00000200	/* Mask Peripheral #9 interrupt */ 
#define SIC_MASK10		0x00000400	/* Mask Peripheral #10 interrupt */ 
#define SIC_MASK11		0x00000800	/* Mask Peripheral #11 interrupt */ 
#define SIC_MASK12		0x00001000	/* Mask Peripheral #12 interrupt */ 
#define SIC_MASK13		0x00002000	/* Mask Peripheral #13 interrupt */ 
#define SIC_MASK14		0x00004000	/* Mask Peripheral #14 interrupt */ 
#define SIC_MASK15		0x00008000	/* Mask Peripheral #15 interrupt */ 
#define SIC_MASK16		0x00010000	/* Mask Peripheral #16 interrupt */ 
#define SIC_MASK17		0x00020000	/* Mask Peripheral #17 interrupt */ 
#define SIC_MASK18		0x00040000	/* Mask Peripheral #18 interrupt */
#define SIC_MASK19		0x00080000	/* Mask Peripheral #19 interrupt */
#define SIC_MASK20		0x00100000	/* Mask Peripheral #20 interrupt */
#define SIC_MASK_DFR		0x80000000	/* Mask Core Double Fault Reset */
#define SIC_UNMASK0		0xFFFFFFFE	/* Unmask Peripheral #0 interrupt */ 
#define SIC_UNMASK1		0xFFFFFFFD	/* Unmask Peripheral #1 interrupt */ 
#define SIC_UNMASK2		0xFFFFFFFB	/* Unmask Peripheral #2 interrupt */ 
#define SIC_UNMASK3		0xFFFFFFF7	/* Unmask Peripheral #3 interrupt */ 
#define SIC_UNMASK4		0xFFFFFFEF	/* Unmask Peripheral #4 interrupt */ 
#define SIC_UNMASK5		0xFFFFFFDF	/* Unmask Peripheral #5 interrupt */ 
#define SIC_UNMASK6		0xFFFFFFBF	/* Unmask Peripheral #6 interrupt */ 
#define SIC_UNMASK7		0xFFFFFF7F	/* Unmask Peripheral #7 interrupt */ 
#define SIC_UNMASK8		0xFFFFFEFF	/* Unmask Peripheral #8 interrupt */ 
#define SIC_UNMASK9		0xFFFFFDFF	/* Unmask Peripheral #9 interrupt */ 
#define SIC_UNMASK10		0xFFFFFBFF	/* Unmask Peripheral #10 interrupt */ 
#define SIC_UNMASK11		0xFFFFF7FF	/* Unmask Peripheral #11 interrupt */ 
#define SIC_UNMASK12		0xFFFFEFFF	/* Unmask Peripheral #12 interrupt */ 
#define SIC_UNMASK13		0xFFFFDFFF	/* Unmask Peripheral #13 interrupt */ 
#define SIC_UNMASK14		0xFFFFBFFF	/* Unmask Peripheral #14 interrupt */ 
#define SIC_UNMASK15		0xFFFF7FFF	/* Unmask Peripheral #15 interrupt */ 
#define SIC_UNMASK16		0xFFFEFFFF	/* Unmask Peripheral #16 interrupt */ 
#define SIC_UNMASK17		0xFFFDFFFF	/* Unmask Peripheral #17 interrupt */ 
#define SIC_UNMASK18		0xFFFBFFFF	/* Unmask Peripheral #18 interrupt */
#define SIC_UNMASK19		0xFFF7FFFF	/* Unmask Peripheral #19 interrupt */
#define SIC_UNMASK20		0xFFEFFFFF	/* Unmask Peripheral #20 interrupt */
#define SIC_UNMASK_DFR		0x7FFFFFFF	/* Unmask Core Double Fault Reset */

/* SIC_IWR Masks */
#define IWR_DISABLE_ALL		0x00000000  /* Wakeup Disable all peripherals */
#define IWR_ENABLE_ALL		0xFFFFFFFF  /* Wakeup Enable all peripherals */
#define IWR_ENABLE0		0x00000001  /* Wakeup Enable Peripheral #0 */
#define IWR_ENABLE1		0x00000002	/* Wakeup Enable Peripheral #1 */
#define IWR_ENABLE2		0x00000004	/* Wakeup Enable Peripheral #2 */
#define IWR_ENABLE3		0x00000008	/* Wakeup Enable Peripheral #3 */
#define IWR_ENABLE4		0x00000010	/* Wakeup Enable Peripheral #4 */
#define IWR_ENABLE5		0x00000020	/* Wakeup Enable Peripheral #5 */
#define IWR_ENABLE6		0x00000040	/* Wakeup Enable Peripheral #6 */
#define IWR_ENABLE7		0x00000080	/* Wakeup Enable Peripheral #7 */
#define IWR_ENABLE8		0x00000100	/* Wakeup Enable Peripheral #8 */
#define IWR_ENABLE9		0x00000200	/* Wakeup Enable Peripheral #9 */
#define IWR_ENABLE10		0x00000400	/* Wakeup Enable Peripheral #10 */
#define IWR_ENABLE11		0x00000800	/* Wakeup Enable Peripheral #11 */
#define IWR_ENABLE12		0x00001000	/* Wakeup Enable Peripheral #12 */