gemv_n.s

Optimized GotoBLAS libraries

/*********************************************************************/
/*                                                                   */
/*             Optimized BLAS libraries                              */
/*                     By Kazushige Goto <[e-mail]>     */
/*                                                                   */
/* Copyright (c) The University of Texas, 2005. All rights reserved. */
/* UNIVERSITY EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES CONCERNING  */
/* THIS SOFTWARE AND DOCUMENTATION, INCLUDING ANY WARRANTIES OF      */
/* MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE,              */
/* NON-INFRINGEMENT AND WARRANTIES OF PERFORMANCE, AND ANY WARRANTY  */
/* THAT MIGHT OTHERWISE ARISE FROM COURSE OF DEALING OR USAGE OF     */
/* TRADE. NO WARRANTY IS EITHER EXPRESS OR IMPLIED WITH RESPECT TO   */
/* THE USE OF THE SOFTWARE OR DOCUMENTATION.                         */
/* Under no circumstances shall University be liable for incidental, */
/* special, indirect, direct or consequential damages or loss of     */
/* profits, interruption of business, or related expenses which may  */
/* arise from use of Software or Documentation, including but not    */
/* limited to those resulting from defects in Software and/or        */
/* Documentation, or loss or inaccuracy of data of any kind.         */
/*********************************************************************/

#define ASSEMBLER
#include "common.h"

#define SP	r12

#define M	r32
#define N	r33
#define A	r36
#define LDA	r37
#define X	r38
#define INCX	r39
#define Y	r34
#define INCY	r35
#define BUFFER	r11

#define I	r14
#define J	r15
#define AO1	r16
#define AO2	r17
#define AO3	r18
#define AO4	r19
#define AO5	r20
#define AO6	r21
#define AO7	r22
#define AO8	r23
#define YLD1	r24
#define YST1	r25
#define YST2	r27
#define MM	r28
#define YY	r9

#define RPRE1	loc0
#define RPRE2	loc1
#define RPRE3	loc2
#define RPRE4	loc3
#define RPRE5	loc4
#define RPRE6	loc5
#define RPRE7	loc6
#define RPRE8	loc7

#define AO11	loc8
#define AO21	loc9
#define AO31	loc10
#define AO41	loc11
#define AO51	loc12
#define AO61	loc13
#define AO71	loc14
#define AO81	loc15
	
#define PREB	r8

#define ARLC	r29
#define PR	r30
#define ARPFS	r31
	
#ifdef DOUBLE
#define RPREFETCH	(16 * 3 +  8)
#else
#define RPREFETCH	(16 * 3 + 16)
#endif
#define PREFETCH	lfetch.nt1

#define ALPHA	f6

	PROLOGUE
	.prologue
	PROFCODE
	{ .mmi
	.save	ar.pfs, ARPFS
	alloc	ARPFS = ar.pfs, 8, 16, 8, 0
	mov	ARLC  = ar.lc
	}
	;;
	mov	PR = pr
	adds	r14 = 16, SP
	adds	r15 = 24, SP
	adds	r16 = 32, SP
	;;
	adds	r8 = -8 * 16, SP
	adds	r9 = -7 * 16, SP
	adds	SP = -8 * 16, SP
	;;
	stf.spill  [r8] = f16, 32
	stf.spill  [r9] = f17, 32
	;;	
	stf.spill  [r8] = f18, 32
	stf.spill  [r9] = f19, 32
	;;	
	stf.spill  [r8] = f20, 32
	stf.spill  [r9] = f21, 32
	;;
	stf.spill  [r8] = f22
	stf.spill  [r9] = f23
	.body
	;;	

	ld8	Y      = [r14]
	ld8	INCY   = [r15]
	ld8	BUFFER = [r16]

	mov	ALPHA = f8
	cmp.ge	p7, p0 = 0, M
	cmp.ge	p6, p0 = 0, N
	;;
	shladd	INCX = INCX, BASE_SHIFT, r0
	shladd	LDA  = LDA,  BASE_SHIFT, r0
	shladd	INCY = INCY, BASE_SHIFT, r0
	;;
	tbit.nz	p8, p0 = A,   BASE_SHIFT
	tbit.nz	p9, p0 = LDA, BASE_SHIFT
	mov	MM  = M
	;;
	(p8) adds MM = -1, M
	;;
	(p7) br.cond.dpnt .L999
	(p6) br.cond.dpnt .L999
	;;
	sub	I = A, Y
	cmp.eq	p10, p0 = SIZE, INCY
	mov	YY = Y
	;;
	(p10) tbit.z.unc p10, p0 = I, BASE_SHIFT
	;;
	(p10) br.cond.dptk .L10
	;;
	shr	J = M, 3
	mov	YY = BUFFER
	;;
	(p8) adds  YY = SIZE, BUFFER
	;;
	mov	ar.lc = J
	mov	YST1 = YY
	adds	YST2 = 4 * SIZE, YY
	;;
.L02:
	STFD	[YST1] = f0, 1 * SIZE
	STFD	[YST2] = f0, 1 * SIZE
	;;
	STFD	[YST1] = f0, 1 * SIZE
	STFD	[YST2] = f0, 1 * SIZE
	;;
	STFD	[YST1] = f0, 1 * SIZE
	STFD	[YST2] = f0, 1 * SIZE
	;;
	STFD	[YST1] = f0, 5 * SIZE
	STFD	[YST2] = f0, 5 * SIZE
	br.cloop.sptk.few .L02
	;;

.L10:
	(p9)	br.cond.dptk	.L100

	shr	J   = N, 3
	;;
	cmp.eq	p6, p0 = r0, J
	(p6) br.cond.dpnt .L20
	;;
	.align 16

.L11:
	mov	YLD1 = YY
	mov	YST1 = YY
	;;
	LDFD	f8 = [X], INCX
	;;
	LDFD	f9 = [X], INCX
	;;
	LDFD	f10 = [X], INCX
	;;
	LDFD	f11 = [X], INCX
	;;
	LDFD	f12 = [X], INCX
	;;
	LDFD	f13 = [X], INCX
	;;
	LDFD	f14 = [X], INCX
	;;
	LDFD	f15 = [X], INCX
	;;
	FMPY	f8  = ALPHA, f8
	FMPY	f9  = ALPHA, f9
	FMPY	f10 = ALPHA, f10
	FMPY	f11 = ALPHA, f11
	FMPY	f12 = ALPHA, f12
	FMPY	f13 = ALPHA, f13
	FMPY	f14 = ALPHA, f14
	FMPY	f15 = ALPHA, f15
	;;
	mov	AO1 = A
	add	AO2 = LDA, A
	;;
	shladd	AO3 = LDA, 1, A
	shladd	AO4 = LDA, 1, AO2
	;;
	shladd	AO5 = LDA, 1, AO3
	shladd	AO6 = LDA, 1, AO4
	;;
	shladd	AO7 = LDA, 1, AO5
	shladd	AO8 = LDA, 1, AO6
	shladd	A   = LDA, 3, A
	;;
	;;
	adds	PREB   = RPREFETCH * SIZE, YLD1
	adds	RPRE1  = RPREFETCH * SIZE, AO1
	adds	RPRE2  = (RPREFETCH + 8) * SIZE, AO2
	adds	RPRE3  = RPREFETCH * SIZE, AO3
	adds	RPRE4  = (RPREFETCH + 8) * SIZE, AO4
	adds	RPRE5  = RPREFETCH * SIZE, AO5
	adds	RPRE6  = (RPREFETCH + 8) * SIZE, AO6
	adds	RPRE7  = RPREFETCH * SIZE, AO7
	adds	RPRE8  = (RPREFETCH + 8) * SIZE, AO8

	(p8) LDFD	f80 = [AO1], 1 * SIZE
	(p8) LDFD	f81 = [AO2], 1 * SIZE
	(p8) LDFD	f82 = [AO3], 1 * SIZE
	(p8) LDFD	f83 = [AO4], 1 * SIZE
	(p8) LDFD	f84 = [AO5], 1 * SIZE
	(p8) LDFD	f85 = [AO6], 1 * SIZE
	(p8) LDFD	f86 = [AO7], 1 * SIZE
	(p8) LDFD	f87 = [AO8], 1 * SIZE
	(p8) LDFD	f106 = [YLD1], 1 * SIZE
	;;
	(p8) FMPY	f32 = f8,  f80
	(p8) FMPY	f33 = f9,  f81
	(p8) FMPY	f34 = f10, f82
	(p8) FMA	f35 = f11, f83, f106
	;;
	(p8) FMA	f32 = f12, f84, f32
	(p8) FMA	f33 = f13, f85, f33
	(p8) FMA	f34 = f14, f86, f34
	(p8) FMA	f35 = f15, f87, f35
	;;
	(p8) FADD	f32 = f32, f33
	(p8) FADD	f34 = f34, f35
	;;
	(p8) FADD	f32 = f32, f34
	;;
	(p8) STFD	[YST1] = f32, 1 * SIZE

	shr	I = MM, 3
	mov	pr.rot= 0
	;;
	cmp.eq	p6, p0 = 0, I
	cmp.eq	p16, p0 = r0, r0
	;;
	adds	I = -1, I
	tbit.nz	p13, p0 = MM, 2
	;;
	mov	ar.lc = I
	mov	ar.ec= 2
	(p6) br.cond.dpnt .L15
	;;
	.align 16

.L12:
	{ .mfi
	(p17) LDFPD	f95,  f96  = [AO8], 2 * SIZE
	(p17) FMA	f101 = f8,  f33, f101
	(p16) tbit.nz.unc	p14, p15 = I, 0
	}
	{ .mfi
	(p17) FMA	f104 = f8,  f34, f104
	}
	;;
	{ .mfi
	(p16) LDFPD	f32,  f33  = [AO1], 2 * SIZE
	(p17) FMA	f107 = f8,  f35, f107
	}
	{ .mfi
	(p14) PREFETCH	[RPRE1], 16 * SIZE
	(p17) FMA	f110 = f8,  f36, f110
	}
	;;
	{ .mfi
	(p16) LDFPD	f34,  f35  = [AO1], 2 * SIZE
	(p17) FMA	f113 = f8,  f37, f113
	}
	{ .mfi
	(p16) LDFPD	f100, f103 = [YLD1], 2 * SIZE
	(p17) FMA	f116 = f8,  f38, f116
	}
	;;
	{ .mfi
	(p16) LDFPD	f36,  f37  = [AO1], 2 * SIZE
	(p17) FMA	f119 = f8,  f39, f119
	}
	{ .mfi
	(p16) LDFPD	f106, f109 = [YLD1], 2 * SIZE
	(p17) FMA	f122 = f8,  f40, f122
	}
	;;
	{ .mfi
	(p16) LDFPD	f38,  f39  = [AO1], 2 * SIZE
	(p17) FMA	f101 = f9,  f41, f101
	}
	{ .mfi
	(p16) LDFPD	f112, f115 = [YLD1], 2 * SIZE
	(p17) FMA	f104 = f9,  f42, f104
	}
	;;
	{ .mfi
	(p16) LDFPD	f40,  f41  = [AO2], 2 * SIZE
	(p17) FMA	f107 = f9,  f43, f107
	}
	{ .mfi
	(p15) PREFETCH	[RPRE2], 16 * SIZE
	(p17) FMA	f110 = f9,  f44, f110
	}
	;;
	{ .mfi
	(p16) LDFPD	f42,  f43  = [AO2], 2 * SIZE
	(p17) FMA	f113 = f9,  f45, f113
	}
	{ .mfi
	(p16) LDFPD	f118, f121 = [YLD1], 2 * SIZE
	(p17) FMA	f116 = f9,  f46, f116
	}
	;;
	{ .mfi
	(p16) LDFPD	f44,  f45  = [AO2], 2 * SIZE
	(p17) FMA	f119 = f9,  f47, f119
	}
	{ .mfi
	(p18) STFD	[YST1] = f16, 1 * SIZE
	(p17) FMA	f122 = f9,  f48, f122
	}
	;;
	{ .mfi
	(p16) LDFPD	f46,  f47  = [AO2], 2 * SIZE
	(p17) FMA	f101 = f10, f49, f101
	}
	{ .mfi
	(p18) STFD	[YST1] = f17, 1 * SIZE
	(p17) FMA	f104 = f10, f50, f104
	}
	;;
	{ .mfi
	(p16) LDFPD	f48,  f49  = [AO3], 2 * SIZE
	(p17) FMA	f107 = f10, f51, f107
	}
	{ .mfi
	(p14) PREFETCH	[RPRE3], 16 * SIZE
	(p17) FMA	f110 = f10, f52, f110
	}
	;;
	{ .mfi
	(p16) LDFPD	f50,  f51  = [AO3], 2 * SIZE
	(p17) FMA	f113 = f10, f53, f113
	}
	{ .mfi
	(p17) FMA	f116 = f10, f54, f116
	}
	;;
	{ .mfi
	(p16) LDFPD	f52,  f53  = [AO3], 2 * SIZE
	(p17) FMA	f119 = f10, f55, f119
	}
	{ .mfi
	(p18) STFD	[YST1] = f18, 1 * SIZE
	(p17) FMA	f122 = f10, f56, f122
	}
	;;
	{ .mfi
	(p16) LDFPD	f54,  f55  = [AO3], 2 * SIZE
	(p17) FMA	f101 = f11, f57, f101
	}
	{ .mfi
	(p18) STFD	[YST1] = f19, 1 * SIZE
	(p17) FMA	f104 = f11, f58, f104
	}
	;;
	{ .mfi
	(p16) LDFPD	f56,  f57  = [AO4], 2 * SIZE
	(p17) FMA	f107 = f11, f59, f107
	}
	{ .mfi
	(p15) PREFETCH	[RPRE4], 16 * SIZE
	(p17) FMA	f110 = f11, f60, f110
	}
	;;
	{ .mfi
	(p16) LDFPD	f58,  f59  = [AO4], 2 * SIZE
	(p17) FMA	f113 = f11, f61, f113
	}
	{ .mfi
	(p17) FMA	f116 = f11, f62, f116
	}
	;;
	{ .mfi
	(p16) LDFPD	f60,  f61  = [AO4], 2 * SIZE
	(p17) FMA	f119 = f11, f63, f119
	}
	{ .mfi
	(p17) FMA	f122 = f11, f64, f122
	}
	;;
	{ .mfi
	(p16) LDFPD	f62,  f63  = [AO4], 2 * SIZE
	(p17) FMA	f101 = f12, f65, f101
	}
	{ .mfi
	(p18) STFD	[YST1] = f20, 1 * SIZE
	(p17) FMA	f104 = f12, f66, f104
	}
	;;
	{ .mfi
	(p16) LDFPD	f64,  f65  = [AO5], 2 * SIZE
	(p17) FMA	f107 = f12, f67, f107
	}
	{ .mfi
	(p18) STFD	[YST1] = f21, 1 * SIZE
	(p17) FMA	f110 = f12, f68, f110
	}
	;;
	{ .mfi
	(p16) LDFPD	f66,  f67  = [AO5], 2 * SIZE
	(p17) FMA	f113 = f12, f69, f113
	}
	{ .mfi
	(p14) PREFETCH	[RPRE5], 16 * SIZE
	(p17) FMA	f116 = f12, f70, f116
	}
	;;
	{ .mfi
	(p16) LDFPD	f68,  f69  = [AO5], 2 * SIZE
	(p17) FMA	f119 = f12, f71, f119
	}
	{ .mfi
	(p18) STFD	[YST1] = f22, 1 * SIZE
	(p17) FMA	f122 = f12, f72, f122
	}
	;;
	{ .mfi
	(p16) LDFPD	f70,  f71  = [AO5], 2 * SIZE
	(p17) FMA	f101 = f13, f73, f101
	}
	{ .mfi
	(p18) STFD	[YST1] = f23, 1 * SIZE
	(p17) FMA	f104 = f13, f74, f104
	}
	;;
	{ .mfi
	(p16) LDFPD	f72,  f73  = [AO6], 2 * SIZE
	(p17) FMA	f107 = f13, f75, f107
	}
	{ .mfi
	(p15) PREFETCH	[RPRE6], 16 * SIZE
	(p17) FMA	f110 = f13, f76, f110
	}
	;;
	{ .mfi
	(p16) LDFPD	f74,  f75  = [AO6], 2 * SIZE
	(p17) FMA	f113 = f13, f77, f113
	}
	{ .mfi
	(p17) FMA	f116 = f13, f78, f116
	}
	;;
	{ .mfi
	(p16) LDFPD	f76,  f77  = [AO6], 2 * SIZE
	(p17) FMA	f119 = f13, f79, f119
	}
	{ .mfi
	(p17) FMA	f122 = f13, f80, f122
	}
	;;
	{ .mfi
	(p16) LDFPD	f78,  f79  = [AO6], 2 * SIZE
	(p17) FMA	f101 = f14, f81, f101
	}
	{ .mfi
	(p17) FMA	f104 = f14, f82, f104
	}
	;;
	{ .mfi
	(p16) LDFPD	f80,  f81  = [AO7], 2 * SIZE
	(p17) FMA	f107 = f14, f83, f107
	}
	{ .mfi
	(p14) PREFETCH	[RPRE7], 16 * SIZE
	(p17) FMA	f110 = f14, f84, f110
	}
	;;
	{ .mfi
	(p16) LDFPD	f82,  f83  = [AO7], 2 * SIZE
	(p17) FMA	f113 = f14, f85, f113
	}
	{ .mfi
	(p17) FMA	f116 = f14, f86, f116
	}
	;;
	{ .mfi
	(p16) LDFPD	f84,  f85  = [AO7], 2 * SIZE
	(p17) FMA	f119 = f14, f87, f119
	}
	{ .mfi
	(p17) FMA	f122 = f14, f88, f122
	}
	;;
	{ .mfi
	(p16) LDFPD	f86,  f87  = [AO7], 2 * SIZE
	(p17) FMA	f16  = f15, f89, f101
	}
	{ .mfi
	(p17) FMA	f17  = f15, f90, f104
	}
	;;
	{ .mfi
	(p16) LDFPD	f88,  f89  = [AO8], 2 * SIZE
	(p17) FMA	f18  = f15, f91, f107
	}
	{ .mfi
	(p15) PREFETCH	[RPRE8], 16 * SIZE
	(p17) FMA	f19  = f15, f92, f110
	}
	;;
	{ .mfi
	(p16) LDFPD	f90,  f91  = [AO8], 2 * SIZE
	(p17) FMA	f20  = f15, f93, f113
	}
	{ .mfi
	(p14) lfetch.excl.nt2	[PREB],  16 * SIZE
	(p17) FMA	f21  = f15, f94, f116
	}
	;;
	{ .mfi
	(p16) LDFPD	f92,  f93  = [AO8], 2 * SIZE
	(p17) FMA	f22  = f15, f95, f119
	}
	{ .mfb
	(p16) adds	I = -1, I
	(p17) FMA	f23  = f15, f96, f122
	br.ctop.sptk.few .L12
	}
	;;
	.align 16

.L15:
	{ .mmi
	(p13) LDFPD	f32,  f33  = [AO1], 2 * SIZE
	(p13) LDFPD	f100, f101 = [YLD1], 2 * SIZE
	tbit.nz	p14, p0 = MM, 1
	}
	{ .mmi
	(p18) STFD	[YST1] = f16, 1 * SIZE
	cmp.lt p6, p0 = 1, J
	adds J = -1, J
	}
	;;
	{ .mmi
	(p13) LDFPD	f48,  f49  = [AO1], 2 * SIZE
	(p13) LDFPD	f102, f103 = [YLD1], 2 * SIZE
	tbit.nz	p15, p0 = MM, 0
	}
	{ .mmi
	(p18) STFD	[YST1] = f17, 1 * SIZE
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mmi
	(p14) LDFPD	f64,  f65  = [AO1], 2 * SIZE
	(p14) LDFPD	f104, f105 = [YLD1], 2 * SIZE
	nop	__LINE__
	}
	{ .mmi
	(p18) STFD	[YST1] = f18, 1 * SIZE
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mmi
	(p13) LDFPD	f34,  f35  = [AO2], 2 * SIZE
	(p13) LDFPD	f36,  f37  = [AO3], 2 * SIZE
	nop	__LINE__
	}
	{ .mmi
	(p18) STFD	[YST1] = f19, 1 * SIZE
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mmi
	(p15) LDFD	f80 = [AO1]
	(p15) LDFD	f106 = [YLD1], 1 * SIZE
	nop	__LINE__
	}
	{ .mmi
	(p18) STFD	[YST1] = f20, 1 * SIZE
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mmi
	(p13) LDFPD	f50,  f51  = [AO2], 2 * SIZE
	(p13) LDFPD	f52,  f53  = [AO3], 2 * SIZE
	nop	__LINE__
	}
	{ .mmi
	(p18) STFD	[YST1] = f21, 1 * SIZE
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mmi
	(p14) LDFPD	f66,  f67  = [AO2], 2 * SIZE
	(p14) LDFPD	f68,  f69  = [AO3], 2 * SIZE
	nop	__LINE__
	}
	{ .mmi
	(p18) STFD	[YST1] = f22, 1 * SIZE
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mmi
	(p15) LDFD	f81 = [AO2]
	(p15) LDFD	f82 = [AO3]
	nop	__LINE__
	}
	{ .mmi
	(p18) STFD	[YST1] = f23, 1 * SIZE
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mfi
	(p13) LDFPD	f38,  f39  = [AO4], 2 * SIZE
	(p13) FMA	f100 = f8,  f32, f100
	nop	__LINE__
	}
	{ .mfi
	(p13) LDFPD	f40,  f41  = [AO5], 2 * SIZE
	(p13) FMA	f101 = f8,  f33, f101
	nop	__LINE__
	}
	;;
	{ .mfi
	(p13) LDFPD	f54,  f55  = [AO4], 2 * SIZE
	(p13) FMA	f102 = f8,  f48, f102
	nop	__LINE__
	}
	{ .mfi
	(p13) LDFPD	f56,  f57  = [AO5], 2 * SIZE
	(p13) FMA	f103 = f8,  f49, f103
	nop	__LINE__
	}
	;;
	{ .mfi
	(p14) LDFPD	f70,  f71  = [AO4], 2 * SIZE
	(p14) FMA	f104 = f8,  f64, f104
	nop	__LINE__
	}
	{ .mfi
	(p14) LDFPD	f72,  f73  = [AO5], 2 * SIZE
	(p14) FMA	f105 = f8,  f65, f105
	nop	__LINE__
	}
	;;
	{ .mfi
	(p15) LDFD	f83 = [AO4]
	(p15) FMA	f106 = f8,  f80, f106
	nop	__LINE__
	}
	{ .mfi
	(p15) LDFD	f84 = [AO5]
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mfi
	(p13) LDFPD	f42,  f43  = [AO6], 2 * SIZE
	(p13) FMA	f100 = f9,  f34, f100
	nop	__LINE__
	}
	{ .mfi
	(p13) LDFPD	f44,  f45  = [AO7], 2 * SIZE
	(p13) FMA	f101 = f9,  f35, f101
	nop	__LINE__
	}
	;;
	{ .mfi
	(p13) LDFPD	f58,  f59  = [AO6], 2 * SIZE
	(p13) FMA	f102 = f9,  f50, f102
	nop	__LINE__
	}
	{ .mfi
	(p13) LDFPD	f60,  f61  = [AO7], 2 * SIZE
	(p13) FMA	f103 = f9,  f51, f103
	nop	__LINE__
	}
	;;
	{ .mfi
	(p14) LDFPD	f74,  f75  = [AO6], 2 * SIZE
	(p14) FMA	f104 = f9,  f66, f104
	nop	__LINE__
	}
	{ .mfi
	(p14) LDFPD	f76,  f77  = [AO7], 2 * SIZE
	(p14) FMA	f105 = f9,  f67, f105
	nop	__LINE__
	}
	;;
	{ .mfi
	(p15) LDFD	f85 = [AO6]
	(p15) FMA	f106 = f9,  f81, f106
	nop	__LINE__
	}
	{ .mfi
	(p15) LDFD	f86 = [AO7]
	nop	__LINE__
	nop	__LINE__
	}
	;;
	{ .mfi
	(p13) LDFPD	f46,  f47  = [AO8], 2 * SIZE
	(p13) FMA	f100 = f10, f36, f100
	nop	__LINE__
	}
	{ .mfi
	(p13) FMA	f101 = f10, f37, f101
	nop	__LINE__
	}
	;;
	{ .mfi
	(p13) LDFPD	f62,  f63  = [AO8], 2 * SIZE
	(p13) FMA	f102 = f10, f52, f102
	nop	__LINE__
	}
	{ .mfi
	(p13) FMA	f103 = f10, f53, f103
	nop	__LINE__
	}
	;;
	{ .mfi
	(p14) LDFPD	f78,  f79  = [AO8], 2 * SIZE
	(p14) FMA	f104 = f10, f68, f104
	nop	__LINE__
	}
	{ .mfi
	(p14) FMA	f105 = f10, f69, f105
	nop	__LINE__
	}
	;;
	{ .mfi
	(p15) LDFD	f87 = [AO8]
	(p15) FMA	f106 = f10, f82, f106
	nop	__LINE__
	}
	;;
	(p13) FMA	f100 = f11, f38, f100
	(p13) FMA	f101 = f11, f39, f101
	(p13) FMA	f102 = f11, f54, f102
	(p13) FMA	f103 = f11, f55, f103
	(p14) FMA	f104 = f11, f70, f104
	(p14) FMA	f105 = f11, f71, f105
	(p15) FMA	f106 = f11, f83, f106
	;;
	(p13) FMA	f100 = f12, f40, f100
	(p13) FMA	f101 = f12, f41, f101
	(p13) FMA	f102 = f12, f56, f102
	(p13) FMA	f103 = f12, f57, f103
	(p14) FMA	f104 = f12, f72, f104
	(p14) FMA	f105 = f12, f73, f105
	(p15) FMA	f106 = f12, f84, f106
	;;
	(p13) FMA	f100 = f13, f42, f100
	(p13) FMA	f101 = f13, f43, f101
	(p13) FMA	f102 = f13, f58, f102
	(p13) FMA	f103 = f13, f59, f103
	(p14) FMA	f104 = f13, f74, f104
	(p14) FMA	f105 = f13, f75, f105
	(p15) FMA	f106 = f13, f85, f106
	;;
	(p13) FMA	f100 = f14, f44, f100
	(p13) FMA	f101 = f14, f45, f101
	(p13) FMA	f102 = f14, f60, f102
	(p13) FMA	f103 = f14, f61, f103
	(p14) FMA	f104 = f14, f76, f104
	(p14) FMA	f105 = f14, f77, f105
	(p15) FMA	f106 = f14, f86, f106
	;;
	(p13) FMA	f100 = f15, f46, f100
	(p13) FMA	f101 = f15, f47, f101
	(p13) FMA	f102 = f15, f62, f102
	(p13) FMA	f103 = f15, f63, f103