symv_u.s

Optimized GotoBLAS libraries

/*********************************************************************/
/*                                                                   */
/*             Optimized BLAS libraries                              */
/*                     By Kazushige Goto <[e-mail]>     */
/*                                                                   */
/* Copyright (c) The University of Texas, 2005. All rights reserved. */
/* UNIVERSITY EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES CONCERNING  */
/* THIS SOFTWARE AND DOCUMENTATION, INCLUDING ANY WARRANTIES OF      */
/* MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE,              */
/* NON-INFRINGEMENT AND WARRANTIES OF PERFORMANCE, AND ANY WARRANTY  */
/* THAT MIGHT OTHERWISE ARISE FROM COURSE OF DEALING OR USAGE OF     */
/* TRADE. NO WARRANTY IS EITHER EXPRESS OR IMPLIED WITH RESPECT TO   */
/* THE USE OF THE SOFTWARE OR DOCUMENTATION.                         */
/* Under no circumstances shall University be liable for incidental, */
/* special, indirect, direct or consequential damages or loss of     */
/* profits, interruption of business, or related expenses which may  */
/* arise from use of Software or Documentation, including but not    */
/* limited to those resulting from defects in Software and/or        */
/* Documentation, or loss or inaccuracy of data of any kind.         */
/*********************************************************************/

#define ASSEMBLER
#include "common.h"

#ifndef NEEDPARAM
#ifndef DOUBLE
#include "sparam_u.h"
#else
#include "dparam_u.h"
#endif
#endif

#ifdef linux
#ifndef __64BIT__
#define M	r3
#define A	r4
#define LDA	r5
#define X	r6
#define	INCX	r7
#define	Y	r8
#define	INCY	r9
#define BUFFER	r10
#else
#define M	r3
#define A	r5
#define LDA	r6
#define X	r7
#define	INCX	r8
#define	Y	r9
#define	INCY	r10
#define BUFFER	r4
#endif
#endif

#if defined(_AIX) || defined(__APPLE__)
#if !defined(__64BIT__) && defined(DOUBLE)
#define M	r3
#define A	r6
#define LDA	r7
#define X	r8
#define	INCX	r9
#define	Y	r10
#define	INCY	r4
#define BUFFER	r5
#else
#define M	r3
#define A	r5
#define LDA	r6
#define X	r7
#define	INCX	r8
#define	Y	r9
#define	INCY	r10
#define BUFFER	r4
#endif
#endif

#define I	r11
#define	J	r12

#define AO1	r14
#define AO2	r15
#define AO3	r16
#define AO4	r17
#define XX	r18
#define YY	r19
#define	NEW_Y	r20
#define IS	r21
#define TEMP	r22

#define	PREA	r24

#define y01 f0
#define y02 f1
#define y03 f2
#define y04 f3

#define atemp1 f4
#define atemp2 f5
#define atemp3 f6
#define atemp4 f7

#define xtemp1 f8
#define xtemp2 f9
#define xtemp3 f10
#define xtemp4 f11

#define xsum1  f12
#define xsum2  f13
#define xsum3  f14
#define xsum4  f15

#define a1     f16
#define a2     f17
#define a3     f18
#define a4     f19
#define a5     f20
#define a6     f21
#define a7     f22
#define a8     f23
#define a9     f24
#define a10    f25
#define a11    f26
#define a12    f27
#define a13    f28
#define a14    f29
#define a15    f30
#define a16    f31

#define alpha  f1

#if defined(PPCG4)
#define PREFETCHSIZE_A  24
#endif

#if defined(PPC440) || defined(PPC440FP2)
#define PREFETCHSIZE_A  24
#endif

#ifdef PPC970
#define PREFETCHSIZE_A  64
#endif

#ifdef CELL
#define PREFETCHSIZE_A  72
#endif

#ifdef POWER4
#define PREFETCHSIZE_A  16
#endif

#ifdef POWER5
#define PREFETCHSIZE_A  64
#endif

#if defined(POWER4) || defined(POWER5) || defined(PPC970)
#define NOP1
#define NOP2
#else
#define NOP1   mr	LDA, LDA
#define NOP2   mr	INCX, INCX
#endif

#ifndef NEEDPARAM

#ifndef __64BIT__
#define STACKSIZE 224
#define ALPHA     200(SP)
#define	FZERO	  208(SP)
#else
#define STACKSIZE 280
#define ALPHA     256(SP)
#define FZERO	  264(SP)
#endif

	PROLOGUE
	PROFCODE

	addi	SP,   SP, -STACKSIZE
	li	r0,   0

	stfd	f14,     0(SP)
	stfd	f15,     8(SP)
	stfd	f16,    16(SP)
	stfd	f17,    24(SP)
	stfd	f18,    32(SP)
	stfd	f19,    40(SP)
	stfd	f20,    48(SP)
	stfd	f21,    56(SP)
	stfd	f22,    64(SP)
	stfd	f23,    72(SP)
	stfd	f24,    80(SP)
	stfd	f25,    88(SP)
	stfd	f26,    96(SP)
	stfd	f27,   104(SP)
	stfd	f28,   112(SP)
	stfd	f29,   120(SP)
	stfd	f30,   128(SP)
	stfd	f31,   136(SP)

#ifdef __64BIT__
	std	r0,    FZERO
	std	r14,   144(SP)
	std	r15,   152(SP)
	std	r16,   160(SP)
	std	r17,   168(SP)
	std	r18,   176(SP)
	std	r19,   184(SP)
	std	r20,   192(SP)
	std	r21,   200(SP)
	std	r22,   208(SP)
	std	r23,   216(SP)
	std	r24,   224(SP)
	std	r25,   232(SP)
	std	r26,   240(SP)
	std	r27,   248(SP)
#else
	stw	r0,    0 + FZERO
	stw	r0,    4 + FZERO
	stw	r14,   144(SP)
	stw	r15,   148(SP)
	stw	r16,   152(SP)
	stw	r17,   156(SP)
	stw	r18,   160(SP)
	stw	r19,   164(SP)
	stw	r20,   168(SP)
	stw	r21,   172(SP)
	stw	r22,   176(SP)
	stw	r23,   180(SP)
	stw	r24,   184(SP)
	stw	r25,   188(SP)
	stw	r26,   192(SP)
	stw	r27,   196(SP)
#endif

#ifdef linux
#ifdef __64BIT__
	ld	BUFFER,  112 + STACKSIZE(SP)
#endif
#endif

#if defined(_AIX) || defined(__APPLE__)
#ifndef __64BIT__
#ifdef DOUBLE
	lwz	INCY,    56 + STACKSIZE(SP)
	lwz	BUFFER,  60 + STACKSIZE(SP)
#else
	lwz	BUFFER,  56 + STACKSIZE(SP)
#endif
#else
	ld	BUFFER,  112 + STACKSIZE(SP)
#endif
#endif

	STFD	alpha, ALPHA

	slwi	LDA,  LDA,  BASE_SHIFT
	slwi	INCX, INCX, BASE_SHIFT
	slwi	INCY, INCY, BASE_SHIFT

	li	PREA, PREFETCHSIZE_A * SIZE

	cmpwi	cr0, M, 0
	ble-	LL(999)

	cmpwi	cr0, INCX, SIZE
	beq	LL(05)

	mr	XX, X
	mr	X, BUFFER

	srawi.	r0, M, 3
	mtspr	CTR, r0
	ble	LL(03)
	.align 4

LL(01):
	LFD	a1, 0 * SIZE(XX)
	add	XX, XX, INCX
	LFD	a2, 0 * SIZE(XX)
	add	XX, XX, INCX
	LFD	a3, 0 * SIZE(XX)
	add	XX, XX, INCX
	LFD	a4, 0 * SIZE(XX)
	add	XX, XX, INCX
	LFD	a5, 0 * SIZE(XX)
	add	XX, XX, INCX
	LFD	a6, 0 * SIZE(XX)
	add	XX, XX, INCX
	LFD	a7, 0 * SIZE(XX)
	add	XX, XX, INCX
	LFD	a8, 0 * SIZE(XX)
	add	XX, XX, INCX

	dcbt	XX, PREA
	dcbtst	BUFFER, PREA

	STFD	a1, 0 * SIZE(BUFFER)
	STFD	a2, 1 * SIZE(BUFFER)
	STFD	a3, 2 * SIZE(BUFFER)
	STFD	a4, 3 * SIZE(BUFFER)
	STFD	a5, 4 * SIZE(BUFFER)
	STFD	a6, 5 * SIZE(BUFFER)
	STFD	a7, 6 * SIZE(BUFFER)
	STFD	a8, 7 * SIZE(BUFFER)

	addi	BUFFER, BUFFER, 8 * SIZE
	bdnz	LL(01)
	.align 4

LL(03):
	andi.	r0, M, 7
	mtspr	CTR, r0
	ble	LL(05)
	.align 4

LL(04):
	LFD	a1, 0 * SIZE(XX)
	add	XX, XX, INCX

	STFD	a1, 0 * SIZE(BUFFER)
	addi	BUFFER, BUFFER, 1 * SIZE
	bdnz	LL(04)
	.align 4

LL(05):
	mr	NEW_Y, Y
	lfd	f0, FZERO

	cmpwi	cr0, INCY, SIZE
	beq	LL(10)

	mr	NEW_Y, BUFFER

	addi	r0, M,  7
	srawi.	r0, r0, 3
	mtspr	CTR, r0
	.align 4

LL(06):
	STFD	f0, 0 * SIZE(BUFFER)
	STFD	f0, 1 * SIZE(BUFFER)
	STFD	f0, 2 * SIZE(BUFFER)
	STFD	f0, 3 * SIZE(BUFFER)
	STFD	f0, 4 * SIZE(BUFFER)
	STFD	f0, 5 * SIZE(BUFFER)
	STFD	f0, 6 * SIZE(BUFFER)
	STFD	f0, 7 * SIZE(BUFFER)
	addi	BUFFER, BUFFER, 8 * SIZE
	bdnz	LL(06)
	.align 4

LL(10):
	li	IS, 0

	cmpwi	cr0, M, 4
	blt	LL(20)
	.align 4

LL(11):
	mr	AO1, A
	add	AO2, A,   LDA
	add	AO3, AO2, LDA
	add	AO4, AO3, LDA
	add	A,   AO4, LDA

	slwi	TEMP,  IS,  BASE_SHIFT
	add	TEMP, X, TEMP

	LFD	a16, ALPHA 
	lfd	xsum1, FZERO

	LFD	atemp1, 0 * SIZE(TEMP)
	LFD	atemp2, 1 * SIZE(TEMP)
	LFD	atemp3, 2 * SIZE(TEMP)
	LFD	atemp4, 3 * SIZE(TEMP)

	LFD	xtemp1,  0 * SIZE(X)
	LFD	xtemp2,  1 * SIZE(X)
	LFD	xtemp3,  2 * SIZE(X)
	LFD	xtemp4,  3 * SIZE(X)

	LFD	y01,  0 * SIZE(NEW_Y)
	LFD	y02,  1 * SIZE(NEW_Y)
	LFD	y03,  2 * SIZE(NEW_Y)
	LFD	y04,  3 * SIZE(NEW_Y)

	LFD	a1,  0 * SIZE(AO1)
	FMUL	atemp1, a16, atemp1
	LFD	a2,  1 * SIZE(AO1)
	FMUL	atemp2, a16, atemp2
	LFD	a3,  2 * SIZE(AO1)
	FMUL	atemp3, a16, atemp3
	LFD	a4,  3 * SIZE(AO1)
	FMUL	atemp4, a16, atemp4

	LFD	a5,  0 * SIZE(AO2)
	fmr	xsum2, xsum1
	LFD	a6,  1 * SIZE(AO2)
	fmr	xsum3, xsum1
	LFD	a7,  2 * SIZE(AO2)
	fmr	xsum4, xsum1
	LFD	a8,  3 * SIZE(AO2)

	LFD	a9,  0 * SIZE(AO3)
	LFD	a10, 1 * SIZE(AO3)
	LFD	a11, 2 * SIZE(AO3)
	LFD	a12, 3 * SIZE(AO3)

	LFD	a13, 0 * SIZE(AO4)
	LFD	a14, 1 * SIZE(AO4)
	LFD	a15, 2 * SIZE(AO4)
	LFD	a16, 3 * SIZE(AO4)

	mr	XX, X
	mr	YY, NEW_Y

	srawi.	r0,  IS, 4
	mtspr	CTR, r0
	ble	LL(14)
	.align 4

LL(12):
	FMADD	xsum1, xtemp1, a1,  xsum1
	PREFETCH_A1
	FMADD	y01, atemp1, a1,  y01
	LFD	a1,  4 * SIZE(AO1)

	FMADD	xsum2, xtemp1, a5,  xsum2
	NOP1
	FMADD	y02, atemp1, a2,  y02
	NOP2

	FMADD	xsum3, xtemp1, a9,  xsum3
	NOP1
	FMADD	y03, atemp1, a3,  y03
	NOP2

	FMADD	xsum4, xtemp1, a13, xsum4
	LFD	xtemp1,  4 * SIZE(XX)
	FMADD	y04, atemp1, a4,  y04
	NOP2

	FMADD	xsum1, xtemp2, a2,  xsum1
	LFD	a2,  5 * SIZE(AO1)
	FMADD	y01, atemp2, a5,  y01
	LFD	a5,  4 * SIZE(AO2)

	FMADD	xsum2, xtemp2, a6,  xsum2
	NOP1
	FMADD	y02, atemp2, a6,  y02
	LFD	a6,  5 * SIZE(AO2)

	FMADD	xsum3, xtemp2, a10, xsum3
	NOP1
	FMADD	y03, atemp2, a7,  y03
	NOP2

	FMADD	xsum4, xtemp2, a14, xsum4
	LFD	xtemp2,  5 * SIZE(XX)
	FMADD	y04, atemp2, a8,  y04
	PREFETCH_X

	FMADD	xsum1, xtemp3, a3,  xsum1
	LFD	a3,  6 * SIZE(AO1)
	FMADD	y01, atemp3, a9,  y01
	LFD	a9,  4 * SIZE(AO3)

	FMADD	xsum2, xtemp3, a7,  xsum2
	LFD	a7,  6 * SIZE(AO2)
	FMADD	y02, atemp3, a10, y02
	LFD	a10, 5 * SIZE(AO3)

	FMADD	xsum3, xtemp3, a11, xsum3
	NOP1
	FMADD	y03, atemp3, a11, y03
	LFD	a11, 6 * SIZE(AO3)

	FMADD	xsum4, xtemp3, a15, xsum4
	LFD	xtemp3,  6 * SIZE(XX)
	FMADD	y04, atemp3, a12, y04
	NOP2

	FMADD	xsum1, xtemp4, a4,  xsum1
	LFD	a4,  7 * SIZE(AO1)
	FMADD	y01, atemp4, a13, y01
	LFD	a13, 4 * SIZE(AO4)

	FMADD	xsum2, xtemp4, a8,  xsum2
	LFD	a8,  7 * SIZE(AO2)
	FMADD	y02, atemp4, a14, y02
	LFD	a14, 5 * SIZE(AO4)

	FMADD	xsum3, xtemp4, a12, xsum3
	LFD	a12, 7 * SIZE(AO3)
	FMADD	y03, atemp4, a15, y03
	LFD	a15, 6 * SIZE(AO4)

	FMADD	xsum4, xtemp4, a16, xsum4
	LFD	xtemp4,  7 * SIZE(XX)
	FMADD	y04, atemp4, a16, y04
	LFD	a16, 7 * SIZE(AO4)

	STFD	y01,  0 * SIZE(YY)
	LFD	y01,  4 * SIZE(YY)
	STFD	y02,  1 * SIZE(YY)
	LFD	y02,  5 * SIZE(YY)

	STFD	y03,  2 * SIZE(YY)
	LFD	y03,  6 * SIZE(YY)
	STFD	y04,  3 * SIZE(YY)
	LFD	y04,  7 * SIZE(YY)

	FMADD	xsum1, xtemp1, a1,  xsum1
	PREFETCH_A2
	FMADD	y01, atemp1, a1,  y01
	LFD	a1,  8 * SIZE(AO1)

	FMADD	xsum2, xtemp1, a5,  xsum2
	NOP1
	FMADD	y02, atemp1, a2,  y02
	NOP2

	FMADD	xsum3, xtemp1, a9,  xsum3
	NOP1
	FMADD	y03, atemp1, a3,  y03
	NOP2

	FMADD	xsum4, xtemp1, a13, xsum4
	LFD	xtemp1,  8 * SIZE(XX)
	FMADD	y04, atemp1, a4,  y04
	NOP2

	FMADD	xsum1, xtemp2, a2,  xsum1
	LFD	a2,  9 * SIZE(AO1)
	FMADD	y01, atemp2, a5,  y01
	LFD	a5,  8 * SIZE(AO2)

	FMADD	xsum2, xtemp2, a6,  xsum2
	NOP1
	FMADD	y02, atemp2, a6,  y02
	LFD	a6,  9 * SIZE(AO2)

	FMADD	xsum3, xtemp2, a10, xsum3
	NOP1
	FMADD	y03, atemp2, a7,  y03
	NOP2

	FMADD	xsum4, xtemp2, a14, xsum4
	LFD	xtemp2,  9 * SIZE(XX)
	FMADD	y04, atemp2, a8,  y04
	NOP2

	FMADD	xsum1, xtemp3, a3,  xsum1
	LFD	a3, 10 * SIZE(AO1)
	FMADD	y01, atemp3, a9,  y01
	LFD	a9,  8 * SIZE(AO3)

	FMADD	xsum2, xtemp3, a7,  xsum2
	LFD	a7, 10 * SIZE(AO2)
	FMADD	y02, atemp3, a10, y02
	LFD	a10, 9 * SIZE(AO3)

	FMADD	xsum3, xtemp3, a11, xsum3
	NOP1
	FMADD	y03, atemp3, a11, y03
	LFD	a11, 10 * SIZE(AO3)

	FMADD	xsum4, xtemp3, a15, xsum4
	LFD	xtemp3, 10 * SIZE(XX)
	FMADD	y04, atemp3, a12, y04
	NOP2

	FMADD	xsum1, xtemp4, a4,  xsum1
	LFD	a4, 11 * SIZE(AO1)
	FMADD	y01, atemp4, a13, y01
	LFD	a13, 8 * SIZE(AO4)

	FMADD	xsum2, xtemp4, a8,  xsum2
	LFD	a8, 11 * SIZE(AO2)
	FMADD	y02, atemp4, a14, y02
	LFD	a14, 9 * SIZE(AO4)

	FMADD	xsum3, xtemp4, a12, xsum3
	LFD	a12, 11 * SIZE(AO3)
	FMADD	y03, atemp4, a15, y03
	LFD	a15, 10 * SIZE(AO4)

	FMADD	xsum4, xtemp4, a16, xsum4
	LFD	xtemp4, 11 * SIZE(XX)
	FMADD	y04, atemp4, a16, y04
	LFD	a16, 11 * SIZE(AO4)

	STFD	y01,  4 * SIZE(YY)
	LFD	y01,  8 * SIZE(YY)
	STFD	y02,  5 * SIZE(YY)
	LFD	y02,  9 * SIZE(YY)

	STFD	y03,  6 * SIZE(YY)
	LFD	y03, 10 * SIZE(YY)
	STFD	y04,  7 * SIZE(YY)
	LFD	y04, 11 * SIZE(YY)


	FMADD	xsum1, xtemp1, a1,  xsum1
	PREFETCH_A3
	FMADD	y01, atemp1, a1,  y01
	LFD	a1, 12 * SIZE(AO1)

	FMADD	xsum2, xtemp1, a5,  xsum2
	NOP1
	FMADD	y02, atemp1, a2,  y02
	NOP2

	FMADD	xsum3, xtemp1, a9,  xsum3
	NOP1
	FMADD	y03, atemp1, a3,  y03
	NOP2

	FMADD	xsum4, xtemp1, a13, xsum4
	LFD	xtemp1, 12 * SIZE(XX)
	FMADD	y04, atemp1, a4,  y04
	NOP2

	FMADD	xsum1, xtemp2, a2,  xsum1
	LFD	a2, 13 * SIZE(AO1)
	FMADD	y01, atemp2, a5,  y01
	LFD	a5, 12 * SIZE(AO2)

	FMADD	xsum2, xtemp2, a6,  xsum2
	NOP1
	FMADD	y02, atemp2, a6,  y02
	LFD	a6, 13 * SIZE(AO2)

	FMADD	xsum3, xtemp2, a10, xsum3
	NOP1
	FMADD	y03, atemp2, a7,  y03
	PREFETCH_Y

	FMADD	xsum4, xtemp2, a14, xsum4
	LFD	xtemp2, 13 * SIZE(XX)
	FMADD	y04, atemp2, a8,  y04
	NOP2

	FMADD	xsum1, xtemp3, a3,  xsum1
	LFD	a3, 14 * SIZE(AO1)
	FMADD	y01, atemp3, a9,  y01
	LFD	a9, 12 * SIZE(AO3)

	FMADD	xsum2, xtemp3, a7,  xsum2
	LFD	a7, 14 * SIZE(AO2)
	FMADD	y02, atemp3, a10, y02
	LFD	a10,13 * SIZE(AO3)

	FMADD	xsum3, xtemp3, a11, xsum3
	NOP1
	FMADD	y03, atemp3, a11, y03
	LFD	a11, 14 * SIZE(AO3)

	FMADD	xsum4, xtemp3, a15, xsum4
	LFD	xtemp3, 14 * SIZE(XX)
	FMADD	y04, atemp3, a12, y04
	NOP2

	FMADD	xsum1, xtemp4, a4,  xsum1
	LFD	a4, 15 * SIZE(AO1)
	FMADD	y01, atemp4, a13, y01
	LFD	a13,12 * SIZE(AO4)

	FMADD	xsum2, xtemp4, a8,  xsum2
	LFD	a8, 15 * SIZE(AO2)
	FMADD	y02, atemp4, a14, y02
	LFD	a14, 13 * SIZE(AO4)

	FMADD	xsum3, xtemp4, a12, xsum3
	LFD	a12, 15 * SIZE(AO3)
	FMADD	y03, atemp4, a15, y03
	LFD	a15, 14 * SIZE(AO4)

	FMADD	xsum4, xtemp4, a16, xsum4
	LFD	xtemp4,  15 * SIZE(XX)
	FMADD	y04, atemp4, a16, y04
	LFD	a16, 15 * SIZE(AO4)

	STFD	y01,  8 * SIZE(YY)
	LFD	y01, 12 * SIZE(YY)
	STFD	y02,  9 * SIZE(YY)
	LFD	y02, 13 * SIZE(YY)

	STFD	y03, 10 * SIZE(YY)
	LFD	y03, 14 * SIZE(YY)
	STFD	y04, 11 * SIZE(YY)
	LFD	y04, 15 * SIZE(YY)

	FMADD	xsum1, xtemp1, a1,  xsum1
	PREFETCH_A4
	FMADD	y01, atemp1, a1,  y01
	LFD	a1, 16 * SIZE(AO1)

	FMADD	xsum2, xtemp1, a5,  xsum2
	NOP1
	FMADD	y02, atemp1, a2,  y02
	NOP2

	FMADD	xsum3, xtemp1, a9,  xsum3
	NOP1
	FMADD	y03, atemp1, a3,  y03
	NOP2

	FMADD	xsum4, xtemp1, a13, xsum4
	LFD	xtemp1, 16 * SIZE(XX)
	FMADD	y04, atemp1, a4,  y04
	addi	YY, YY, 16 * SIZE

	FMADD	xsum1, xtemp2, a2,  xsum1
	LFD	a2, 17 * SIZE(AO1)
	FMADD	y01, atemp2, a5,  y01
	LFD	a5, 16 * SIZE(AO2)

	FMADD	xsum2, xtemp2, a6,  xsum2
	addi	AO3, AO3, 16 * SIZE
	FMADD	y02, atemp2, a6,  y02
	LFD	a6, 17 * SIZE(AO2)

	FMADD	xsum3, xtemp2, a10, xsum3
	addi	AO1, AO1, 16 * SIZE
	FMADD	y03, atemp2, a7,  y03
	addi	AO2, AO2, 16 * SIZE

	FMADD	xsum4, xtemp2, a14, xsum4
	LFD	xtemp2, 17 * SIZE(XX)
	FMADD	y04, atemp2, a8,  y04
	addi	AO4, AO4, 16 * SIZE

	FMADD	xsum1, xtemp3, a3,  xsum1
	LFD	a3,  2 * SIZE(AO1)
	FMADD	y01, atemp3, a9,  y01
	LFD	a9,  0 * SIZE(AO3)

	FMADD	xsum2, xtemp3, a7,  xsum2
	LFD	a7,  2 * SIZE(AO2)
	FMADD	y02, atemp3, a10, y02