control.#1

epsondriver 驱动源代码

/**********************************************************************************************************
							Sincere Techonlogy
							 Shanghai.China
			(c) Copyright 2005,Sincere Technology,Shanghai China
							All Rights Reserved



File name         : control.c
Author            : Neil
Description       : All of the digital peripherals control codes is in this file.
Target            : C8051F023
Data              : 2005-3
**********************************************************************************************************/
#define CTONL_C

#include "Include.h"

/*********************************************************************************************************
----------------------------------------------------------------------------------------------------------
										void DELAY (int i)
										Author            : Neil
										Data              : 2005-4
----------------------------------------------------------------------------------------------------------
This routine used for delay
		
*********************************************************************************************************/
void DELAY (int i)
{
	int m;
	for (m=0;m<i;m++)
	;
}



/*********************************************************************************************************
----------------------------------------------------------------------------------------------------------
										void SMBUS_ISR (void)
										Author            : Neil
										Data              : 2005-4
----------------------------------------------------------------------------------------------------------
SMBus interrupt service routine:
		
*********************************************************************************************************/

void SMBUS_ISR (void) interrupt 7
{
   switch (SMB0STA){                   // Status code for the SMBus (SMB0STA register)

      // Master Transmitter/Receiver: START condition transmitted.
      // The R/W bit of the COMMAND word sent after this state will
      // always be a zero (W) because for both read and write,
      // the memory address must be written first.
      case SMB_START:
         SMB0DAT = (COMMAND & 0xFE);   // Load address of the slave to be accessed.
         STA = 0;                      // Manually clear START bit
         break;

      // Master Transmitter/Receiver: Repeated START condition transmitted.
      // This state should only occur during a read, after the memory address has been
      // sent and acknowledged.
      case SMB_RP_START:
         SMB0DAT = COMMAND;            // COMMAND should hold slave address + R.
         STA = 0;
         break;

      // Master Transmitter: Slave address + WRITE transmitted.  ACK received.
      case SMB_MTADDACK:
         SMB0DAT = HIGH_ADD;           // Load high byte of memory address
                                       // to be written.
         break;

      // Master Transmitter: Slave address + WRITE transmitted.  NACK received.
      // The slave is not responding.  Send a STOP followed by a START to try again.
      case SMB_MTADDNACK:
         STO = 1;
         STA = 1;
         break;

      // Master Transmitter: Data byte transmitted.  ACK received.
      // This state is used in both READ and WRITE operations.  Check BYTE_NUMBER
      // for memory address status - if only HIGH_ADD has been sent, load LOW_ADD.
      // If LOW_ADD has been sent, check COMMAND for R/W value to determine 
      // next state.
      case SMB_MTDBACK:
         switch (BYTE_NUMBER){
            case 2:                    // If BYTE_NUMBER=2, only HIGH_ADD
               SMB0DAT = LOW_ADD;      // has been sent.
               BYTE_NUMBER--;          // Decrement for next time around.
               break;
            case 1:                    // If BYTE_NUMBER=1, LOW_ADD was just sent.
               if (COMMAND & 0x01){    // If R/W=READ, sent repeated START.
                  STO = 0;
                  STA = 1;

               } else { 
                  SMB0DAT = WORD;      // If R/W=WRITE, load byte to write.
                  BYTE_NUMBER--;
               }
               break;
            default:                   // If BYTE_NUMBER=0, transfer is finished.
               STO = 1;
               SM_BUSY = 0;            // Free SMBus
            }
         break;


      // Master Transmitter: Data byte transmitted.  NACK received.
      // Slave not responding.  Send STOP followed by START to try again.
      case SMB_MTDBNACK:
         STO = 1;
         STA = 1;
         break;

      // Master Transmitter: Arbitration lost.
      // Should not occur.  If so, restart transfer.
      case SMB_MTARBLOST:
         STO = 1;
         STA = 1;
         break;

      // Master Receiver: Slave address + READ transmitted.  ACK received.
      // Set to transmit NACK after next transfer since it will be the last (only)
      // byte.
      case SMB_MRADDACK:
         AA = 0;                       // NACK sent on acknowledge cycle.
         break;

      // Master Receiver: Slave address + READ transmitted.  NACK received.
      // Slave not responding.  Send repeated start to try again.
      case SMB_MRADDNACK:
         STO = 0;
         STA = 1;
         break;

      // Data byte received.  ACK transmitted.
      // State should not occur because AA is set to zero in previous state.
      // Send STOP if state does occur.
      case SMB_MRDBACK:
         STO = 1;
         SM_BUSY = 0;
         break;

      // Data byte received.  NACK transmitted.
      // Read operation has completed.  Read data register and send STOP.
      case SMB_MRDBNACK:
         WORD = SMB0DAT;
         STO = 1;
         SM_BUSY = 0;                  // Free SMBus
         break;

      // All other status codes meaningless in this application. Reset communication.
      default:
         STO = 1;                      // Reset communication.
         SM_BUSY = 0;
         break;
      }

   SI=0;                               // clear interrupt flag
}



/*********************************************************************************************************
----------------------------------------------------------------------------------------------------------
										void SM_Send (char , unsigned int , char )
										Author            : Neil
										Data              : 2005-4
----------------------------------------------------------------------------------------------------------
SMBus byte write function-----------------------------------------------------
 Writes a single byte at the specified memory location.

 out_byte = data byte to be written
 byte_address = memory location to be written into (2 bytes)
 chip_address = device address of EEPROM chip to be written to
		
*********************************************************************************************************/
void SM_Send (char chip_address, unsigned int byte_address, char out_byte)
{
   while (SM_BUSY);                          // Wait for SMBus to be free.
   SM_BUSY = 1;                              // Occupy SMBus (set to busy)
   SMB0CN = 0x44;                            // SMBus enabled,
                                             // ACK on acknowledge cycle

   BYTE_NUMBER = 2;                          // 2 address bytes.
   COMMAND = (chip_address | WRITE);          // Chip select + WRITE

   HIGH_ADD = ((byte_address >> 8) & 0x00FF);// Upper 8 address bits
   LOW_ADD = (byte_address & 0x00FF);        // Lower 8 address bits

   WORD = out_byte;                          // Data to be writen
   
   STO = 0;
   STA = 1;                                  // Start transfer

}



/*********************************************************************************************************
----------------------------------------------------------------------------------------------------------
										char SM_Receive (char, unsigned int)
										Author            : Neil
										Data              : 2005-4
----------------------------------------------------------------------------------------------------------
 SMBus random read function------------------------------------------------------
 Reads 1 byte from the specified memory location.

 byte_address = memory address of byte to read
 chip_address = device address of EEPROM to be read from
		
*********************************************************************************************************/

char SM_Receive (char chip_address, unsigned int byte_address)
{
   while (SM_BUSY);                          // Wait for bus to be free.
   SM_BUSY = 1;                              // Occupy SMBus (set to busy)
   SMB0CN = 0x44;                            // SMBus enabled, ACK on acknowledge cycle

   BYTE_NUMBER = 2;                          // 2 address bytes
   COMMAND = (chip_address | READ);           // Chip select + READ

   HIGH_ADD = ((byte_address >> 8) & 0x00FF);// Upper 8 address bits
   LOW_ADD = (byte_address & 0x00FF);        // Lower 8 address bits
   
   STO = 0;
   STA = 1;                                  // Start transfer
   while (SM_BUSY);                          // Wait for transfer to finish
   return WORD;
}





/*********************************************************************************************************
----------------------------------------------------------------------------------------------------------
										void UART0_Isr(void)
										Author            : Neil
										Data              : 2005-4
----------------------------------------------------------------------------------------------------------
UART0 interrupt service routine:
		
*********************************************************************************************************/
void UART0_Isr(void)  interrupt 4
{
	ES0 = 0x0;							//Disable UART0 interrupt
	if(TI0)								//Transmission
		{
			SCON0 &=0xFD;				//Clearn transmit interrupt pending flag
			Tran_Flag=0;
			if (Count_UART0a==7)
				Tran_OK=0x45;
				
		}
 	else								//Receive
		{
			SCON0 &=0xFE;				//Clearn receive interrupt pending flag
			*pointer++ = SBUF0;
			Count_UART0++;
			if (Count_UART0==7)
			{
				Rec_OK=0x23;
			}
			
		}
	ES0 = 0x1;	 
}






/*********************************************************************************************************
----------------------------------------------------------------------------------------------------------
										void SetTG (void) 
										Author            : Neil
										Data              : 2005-5
----------------------------------------------------------------------------------------------------------
This routine is read data and address 
from 24lc256 to Set Timing Generator Register
		
*********************************************************************************************************/
void SetTG (void) 
{
		n=0;
		for(i=0;i<=28;i++)
		{
			sRecComBuf[0]=SM_Receive (_24LC256, 4*n);
			sRecComBuf[1]=SM_Receive (_24LC256, 4*n+1);
			sRecComBuf[2]=SM_Receive (_24LC256, 4*n+2);
			sRecComBuf[3]=SM_Receive (_24LC256, 4*n+3);
			n++;
			pointer=sRecComBuf;          //pointer->sRecComBuf[0]
			Address0707=*pointer++<<8;
			Address0707+=*pointer++;
			Data0707   =*pointer++<<8;
			Data0707   +=*pointer;
			Address24LC256=*pointer++<<8; 
			Address24LC256  +=*pointer++;     
			pointer=sRecComBuf;          //pointer->sRecComBuf[0]
			_0707READY();
			WRITE_0707(Address0707,Data0707);
			NONE_READY();
		}
}




/*********************************************************************************************************
----------------------------------------------------------------------------------------------------------
										void SetVSPCR (void) 
										Author            : Neil
										Data              : 2005-5
----------------------------------------------------------------------------------------------------------
This routine is read data and address 
from 24lc256 to Set Video Signal Processing Common Setting Register
		
*********************************************************************************************************/
void SetVSPCR (void)
{
	n=29;
	for(i=0;i<=17;i++)
		{
			sRecComBuf[0]=SM_Receive (_24LC256, 4*n);
			sRecComBuf[1]=SM_Receive (_24LC256, 4*n+1);
			sRecComBuf[2]=SM_Receive (_24LC256, 4*n+2);
			sRecComBuf[3]=SM_Receive (_24LC256, 4*n+3);
			n++;
			pointer=sRecComBuf;          //pointer->sRecComBuf[0]
			Address0707=*pointer++<<8;
			Address0707+=*pointer++;
			Data0707   =*pointer++<<8;
			Data0707   +=*pointer;
			Address24LC256=*pointer++<<8; 
			Address24LC256  +=*pointer++;     
			pointer=sRecComBuf;          //pointer->sRecComBuf[0]
			_0707READY();
			WRITE_0707(Address0707,Data0707);
			NONE_READY();
		}
}





/*********************************************************************************************************
----------------------------------------------------------------------------------------------------------
										void SetVSPRSR (void) 
										Author            : Neil
										Data              : 2005-5
----------------------------------------------------------------------------------------------------------
This routine is read data and address 
from 24lc256 to Set Video Signal Processing Red Setting Register
		
*********************************************************************************************************/
void SetVSPRSR (void)
{
	n=47;
	for(i=0;i<=18;i++)
		{
			sRecComBuf[0]=SM_Receive (_24LC256, 4*n);
			sRecComBuf[1]=SM_Receive (_24LC256, 4*n+1);
			sRecComBuf[2]=SM_Receive (_24LC256, 4*n+2);
			sRecComBuf[3]=SM_Receive (_24LC256, 4*n+3);
			n++;
			pointer=sRecComBuf;          //pointer->sRecComBuf[0]
			Address0707=*pointer++<<8;
			Address0707+=*pointer++;
			Data0707   =*pointer++<<8;
			Data0707   +=*pointer;
			Address24LC256=*pointer++<<8; 
			Address24LC256  +=*pointer++;     
			pointer=sRecComBuf;          //pointer->sRecComBuf[0]
			_0707READY();
			WRITE_0707(Address0707,Data0707);
			NONE_READY();
		}
}