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📄 target-supports.exp

📁 用于进行gcc测试
💻 EXP
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                                                                                proc check_effective_target_vect_pack_trunc { } {    global et_vect_pack_trunc                                                                                    if [info exists et_vect_pack_trunc_saved] {        verbose "check_effective_target_vect_pack_trunc: using cached result" 2    } else {        set et_vect_pack_trunc_saved 0        if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])             || [istarget i?86-*-*]             || [istarget x86_64-*-*] } {            set et_vect_pack_trunc_saved 1        }    }    verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2    return $et_vect_pack_trunc_saved}# Return 1 if the target plus current options supports a vector# promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.## This won't change for different subtargets so cache the result.                                   proc check_effective_target_vect_unpack { } {    global et_vect_unpack                                            if [info exists et_vect_unpack_saved] {        verbose "check_effective_target_vect_unpack: using cached result" 2    } else {        set et_vect_unpack_saved 0        if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])             || [istarget i?86-*-*]             || [istarget x86_64-*-*] } {            set et_vect_unpack_saved 1        }    }    verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2      return $et_vect_unpack_saved}# Return 1 if the target plus current options does not guarantee# that its STACK_BOUNDARY is >= the reguired vector alignment.## This won't change for different subtargets so cache the result.proc check_effective_target_unaligned_stack { } {    global et_unaligned_stack_saved    if [info exists et_unaligned_stack_saved] {        verbose "check_effective_target_unaligned_stack: using cached result" 2    } else {        set et_unaligned_stack_saved 0        if { ( [istarget i?86-*-*] || [istarget x86_64-*-*] )          && (! [istarget *-*-darwin*] ) } {            set et_unaligned_stack_saved 1        }    }    verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2    return $et_unaligned_stack_saved}# Return 1 if the target plus current options does not support a vector# alignment mechanism, 0 otherwise.## This won't change for different subtargets so cache the result.proc check_effective_target_vect_no_align { } {    global et_vect_no_align_saved    if [info exists et_vect_no_align_saved] {	verbose "check_effective_target_vect_no_align: using cached result" 2    } else {	set et_vect_no_align_saved 0	if { [istarget mipsisa64*-*-*]	     || [istarget sparc*-*-*]	     || [istarget ia64-*-*] } { 	    set et_vect_no_align_saved 1	}    }    verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2    return $et_vect_no_align_saved}# Return 1 if arrays are aligned to the vector alignment# boundary, 0 otherwise.## This won't change for different subtargets so cache the result.proc check_effective_target_vect_aligned_arrays { } {    global et_vect_aligned_arrays    if [info exists et_vect_aligned_arrays_saved] {	verbose "check_effective_target_vect_aligned_arrays: using cached result" 2    } else {	set et_vect_aligned_arrays_saved 0        if { (([istarget x86_64-*-*]              || [istarget i?86-*-*]) && [is-effective-target lp64])              || [istarget spu-*-*] } {	    set et_vect_aligned_arrays_saved 1	}    }    verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2    return $et_vect_aligned_arrays_saved}# Return 1 if types of size 32 bit or less are naturally aligned# (aligned to their type-size), 0 otherwise.## This won't change for different subtargets so cache the result.proc check_effective_target_natural_alignment_32 { } {    global et_natural_alignment_32    if [info exists et_natural_alignment_32_saved] {        verbose "check_effective_target_natural_alignment_32: using cached result" 2    } else {        # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.        set et_natural_alignment_32_saved 1        if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {            set et_natural_alignment_32_saved 0        }    }    verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2    return $et_natural_alignment_32_saved}# Return 1 if types of size 64 bit or less are naturally aligned (aligned to their# type-size), 0 otherwise.## This won't change for different subtargets so cache the result.proc check_effective_target_natural_alignment_64 { } {    global et_natural_alignment_64    if [info exists et_natural_alignment_64_saved] {        verbose "check_effective_target_natural_alignment_64: using cached result" 2    } else {        set et_natural_alignment_64_saved 0        if { ([is-effective-target lp64] && ![istarget *-*-darwin*])             || [istarget spu-*-*] } {            set et_natural_alignment_64_saved 1        }    }    verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2    return $et_natural_alignment_64_saved}# Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.## This won't change for different subtargets so cache the result.proc check_effective_target_vector_alignment_reachable { } {    global et_vector_alignment_reachable    if [info exists et_vector_alignment_reachable_saved] {        verbose "check_effective_target_vector_alignment_reachable: using cached result" 2    } else {        if { [check_effective_target_vect_aligned_arrays]             || [check_effective_target_natural_alignment_32] } {            set et_vector_alignment_reachable_saved 1        } else {            set et_vector_alignment_reachable_saved 0        }    }    verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2    return $et_vector_alignment_reachable_saved}# Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.## This won't change for different subtargets so cache the result.proc check_effective_target_vector_alignment_reachable_for_64bit { } {    global et_vector_alignment_reachable_for_64bit    if [info exists et_vector_alignment_reachable_for_64bit_saved] {        verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2    } else {        if { [check_effective_target_vect_aligned_arrays]              || [check_effective_target_natural_alignment_64] } {            set et_vector_alignment_reachable_for_64bit_saved 1        } else {            set et_vector_alignment_reachable_for_64bit_saved 0        }    }    verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2    return $et_vector_alignment_reachable_for_64bit_saved}# Return 1 if the target supports vector conditional operations, 0 otherwise.proc check_effective_target_vect_condition { } {    global et_vect_cond_saved    if [info exists et_vect_cond_saved] {	verbose "check_effective_target_vect_cond: using cached result" 2    } else {	set et_vect_cond_saved 0	if { [istarget powerpc*-*-*]	     || [istarget ia64-*-*]	     || [istarget i?86-*-*]	     || [istarget spu-*-*]	     || [istarget x86_64-*-*] } {	   set et_vect_cond_saved 1	}    }    verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2    return $et_vect_cond_saved}# Return 1 if the target supports vector char multiplication, 0 otherwise.proc check_effective_target_vect_char_mult { } {    global et_vect_char_mult_saved    if [info exists et_vect_char_mult_saved] {	verbose "check_effective_target_vect_char_mult: using cached result" 2    } else {	set et_vect_char_mult_saved 0	if { [istarget ia64-*-*]	     || [istarget i?86-*-*]	     || [istarget x86_64-*-*] } {	   set et_vect_char_mult_saved 1	}    }    verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2    return $et_vect_char_mult_saved}# Return 1 if the target supports vector short multiplication, 0 otherwise.proc check_effective_target_vect_short_mult { } {    global et_vect_short_mult_saved    if [info exists et_vect_short_mult_saved] {	verbose "check_effective_target_vect_short_mult: using cached result" 2    } else {	set et_vect_short_mult_saved 0	if { [istarget ia64-*-*]	     || [istarget i?86-*-*]	     || [istarget x86_64-*-*] } {	   set et_vect_short_mult_saved 1	}    }    verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2    return $et_vect_short_mult_saved}# Return 1 if the target supports vector int multiplication, 0 otherwise.proc check_effective_target_vect_int_mult { } {    global et_vect_int_mult_saved    if [info exists et_vect_int_mult_saved] {	verbose "check_effective_target_vect_int_mult: using cached result" 2    } else {	set et_vect_int_mult_saved 0	if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])	     || [istarget spu-*-*]	     || [istarget i?86-*-*]	     || [istarget x86_64-*-*] } {	   set et_vect_int_mult_saved 1	}    }    verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2    return $et_vect_int_mult_saved}# Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.proc check_effective_target_vect_extract_even_odd { } {    global et_vect_extract_even_odd_saved        if [info exists et_vect_extract_even_odd_saved] {        verbose "check_effective_target_vect_extract_even_odd: using cached result" 2    } else {        set et_vect_extract_even_odd_saved 0         if { [istarget powerpc*-*-*] } {           set et_vect_extract_even_odd_saved 1        }    }    verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2    return $et_vect_extract_even_odd_saved}# Return 1 if the target supports vector interleaving, 0 otherwise.proc check_effective_target_vect_interleave { } {    global et_vect_interleave_saved        if [info exists et_vect_interleave_saved] {        verbose "check_effective_target_vect_interleave: using cached result" 2    } else {        set et_vect_interleave_saved 0        if { [istarget powerpc*-*-*]             || [istarget i?86-*-*]             || [istarget x86_64-*-*] } {           set et_vect_interleave_saved 1        }    }    verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2    return $et_vect_interleave_saved}# Return 1 if the target supports vector interleaving and extract even/odd, 0 otherwise.proc check_effective_target_vect_strided { } {    global et_vect_strided_saved    if [info exists et_vect_strided_saved] {        verbose "check_effective_target_vect_strided: using cached result" 2    } else {        set et_vect_strided_saved 0        if { [check_effective_target_vect_interleave]             && [check_effective_target_vect_extract_even_odd] } {           set et_vect_strided_saved 1        }    }    verbose "check_effective_target_vect_strided: returning $et_vect_strided_saved" 2    return $et_vect_strided_saved}# Return 1 if the target supports section-anchorsproc check_effective_target_section_anchors { } {    global et_section_anchors_saved    if [info exists et_section_anchors_saved] {        verbose "check_effective_target_section_anchors: using cached result" 2    } else {        set et_section_anchors_saved 0        if { [istarget powerpc*-*-*] } {           set et_section_anchors_saved 1        }    }    verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2    return $et_section_anchors_saved}# Return 1 if the target supports atomic operations on "int" and "long".proc check_effective_target_sync_int_long { } {    global et_sync_int_long_saved    if [info exists et_sync_int_long_saved] {        verbose "check_effective_target_sync_int_long: using cached result" 2    } else {        set et_sync_int_long_saved 0# This is intentionally powerpc but not rs6000, rs6000 doesn't have the# load-reserved/store-conditional instructions.        if { [istarget ia64-*-*]	     || [istarget i?86-*-*]	     || [istarget x86_64-*-*]	     || [istarget alpha*-*-*] 	     || [istarget s390*-*-*] 	     || [istarget powerpc*-*-*]	     || [istarget sparc64-*-*]	     || [istarget sparcv9-*-*] } {           set et_sync_int_long_saved 1        }    }    verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2    return $et_sync_int_long_saved}# Return 1 if the target supports atomic operations on "char" and "short".proc check_effective_target_sync_char_short { } {    global et_sync_char_short_saved    if [info exists et_sync_char_short_saved] {        verbose "check_effective_target_sync_char_short: using cached result" 2    } else {        set et_sync_char_short_saved 0# This is intentionally powerpc but not rs6000, rs6000 doesn't have the# load-reserved/store-conditional instructions.        if { [istarget ia64-*-*]	     || [istarget i?86-*-*]	     || [istarget x86_64-*-*]	     || [istarget alpha*-*-*] 	     || [istarget s390*-*-*] 	     || [istarget powerpc*-*-*]	     || [istarget sparc64-*-*]	     || [istarget sparcv9-*-*] } {           set et_sync_char_short_saved 1        }    }    verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2    return $et_sync_char_short_saved}# Return 1 if the target uses a ColdFire FPU.proc check_effective_target_coldfire_fpu { } {    return [check_no_compiler_messages coldfire_fpu assembly {	#ifndef __mcffpu__	#error FOO	#endif    }]}# Return true if this is a uClibc target.proc check_effective_target_uclibc {} {    return [check_no_compiler_messages uclibc object {	#include <features.h>	#if !defined (__UCLIBC__)	#error FOO	#endif    }]}# Return true if this is a uclibc target and if the uclibc feature# described by __$feature__ is not present.proc check_missing_uclibc_feature {feature} {    return [check_no_com

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