mcf548x_psc.h

freescale MCF5485EVB开发板上中断操作示例

#define MCF_PSC_MR_BC_6               (0x01)
#define MCF_PSC_MR_BC_7               (0x02)
#define MCF_PSC_MR_BC_8               (0x03)
#define MCF_PSC_MR_CM_NORMAL          (0x00)
#define MCF_PSC_MR_CM_ECHO            (0x40)
#define MCF_PSC_MR_CM_LOCAL_LOOP      (0x80)
#define MCF_PSC_MR_CM_REMOTE_LOOP     (0xC0)
#define MCF_PSC_MR_SB_STOP_BITS_1     (0x07)
#define MCF_PSC_MR_SB_STOP_BITS_15    (0x08)
#define MCF_PSC_MR_SB_STOP_BITS_2     (0x0F)

/* Bit definitions and macros for MCF_PSC_SR */
#define MCF_PSC_SR_ERR                (0x0040)
#define MCF_PSC_SR_CDE_DEOF           (0x0080)
#define MCF_PSC_SR_RXRDY              (0x0100)
#define MCF_PSC_SR_FU                 (0x0200)
#define MCF_PSC_SR_TXRDY              (0x0400)
#define MCF_PSC_SR_TXEMP_URERR        (0x0800)
#define MCF_PSC_SR_OE                 (0x1000)
#define MCF_PSC_SR_PE_CRCERR          (0x2000)
#define MCF_PSC_SR_FE_PHYERR          (0x4000)
#define MCF_PSC_SR_RB_NEOF            (0x8000)

/* Bit definitions and macros for MCF_PSC_CSR */
#define MCF_PSC_CSR_TCSEL(x)          (((x)&0x0F)<<0)
#define MCF_PSC_CSR_RCSEL(x)          (((x)&0x0F)<<4)
#define MCF_PSC_CSR_RCSEL_SYS_CLK     (0xD0)
#define MCF_PSC_CSR_RCSEL_CTM16       (0xE0)
#define MCF_PSC_CSR_RCSEL_CTM         (0xF0)
#define MCF_PSC_CSR_TCSEL_SYS_CLK     (0x0D)
#define MCF_PSC_CSR_TCSEL_CTM16       (0x0E)
#define MCF_PSC_CSR_TCSEL_CTM         (0x0F)

/* Bit definitions and macros for MCF_PSC_CR */
#define MCF_PSC_CR_RXC(x)             (((x)&0x03)<<0)
#define MCF_PSC_CR_TXC(x)             (((x)&0x03)<<2)
#define MCF_PSC_CR_MISC(x)            (((x)&0x07)<<4)
#define MCF_PSC_CR_NONE               (0x00)
#define MCF_PSC_CR_STOP_BREAK         (0x70)
#define MCF_PSC_CR_START_BREAK        (0x60)
#define MCF_PSC_CR_BKCHGINT           (0x50)
#define MCF_PSC_CR_RESET_ERROR        (0x40)
#define MCF_PSC_CR_RESET_TX           (0x30)
#define MCF_PSC_CR_RESET_RX           (0x20)
#define MCF_PSC_CR_RESET_MR           (0x10)
#define MCF_PSC_CR_TX_DISABLED        (0x08)
#define MCF_PSC_CR_TX_ENABLED         (0x04)
#define MCF_PSC_CR_RX_DISABLED        (0x02)
#define MCF_PSC_CR_RX_ENABLED         (0x01)

/* Bit definitions and macros for MCF_PSC_TB_8BIT */
#define MCF_PSC_TB_8BIT_TB3(x)        (((x)&0x000000FF)<<0)
#define MCF_PSC_TB_8BIT_TB2(x)        (((x)&0x000000FF)<<8)
#define MCF_PSC_TB_8BIT_TB1(x)        (((x)&0x000000FF)<<16)
#define MCF_PSC_TB_8BIT_TB0(x)        (((x)&0x000000FF)<<24)

/* Bit definitions and macros for MCF_PSC_TB_16BIT */
#define MCF_PSC_TB_16BIT_TB1(x)       (((x)&0x0000FFFF)<<0)
#define MCF_PSC_TB_16BIT_TB0(x)       (((x)&0x0000FFFF)<<16)

/* Bit definitions and macros for MCF_PSC_TB_AC97 */
#define MCF_PSC_TB_AC97_SOF           (0x00000800)
#define MCF_PSC_TB_AC97_TB(x)         (((x)&0x000FFFFF)<<12)

/* Bit definitions and macros for MCF_PSC_IPCR */
#define MCF_PSC_IPCR_RESERVED         (0x0C)
#define MCF_PSC_IPCR_CTS              (0x0D)
#define MCF_PSC_IPCR_D_CTS            (0x1C)
#define MCF_PSC_IPCR_SYNC             (0x8C)

/* Bit definitions and macros for MCF_PSC_ACR */
#define MCF_PSC_ACR_IEC0              (0x01)
#define MCF_PSC_ACR_CTMS(x)           (((x)&0x07)<<4)
#define MCF_PSC_ACR_BRG               (0x80)

/* Bit definitions and macros for MCF_PSC_ISR */
#define MCF_PSC_ISR_ERR               (0x0040)
#define MCF_PSC_ISR_DEOF              (0x0080)
#define MCF_PSC_ISR_TXRDY             (0x0100)
#define MCF_PSC_ISR_RXRDY_FU          (0x0200)
#define MCF_PSC_ISR_DB                (0x0400)
#define MCF_PSC_ISR_IPC               (0x8000)

/* Bit definitions and macros for MCF_PSC_IMR */
#define MCF_PSC_IMR_ERR               (0x0040)
#define MCF_PSC_IMR_DEOF              (0x0080)
#define MCF_PSC_IMR_TXRDY             (0x0100)
#define MCF_PSC_IMR_RXRDY_FU          (0x0200)
#define MCF_PSC_IMR_DB                (0x0400)
#define MCF_PSC_IMR_IPC               (0x8000)

/* Bit definitions and macros for MCF_PSC_IP */
#define MCF_PSC_IP_CTS                (0x01)
#define MCF_PSC_IP_TGL                (0x40)
#define MCF_PSC_IP_LWPR_B             (0x80)

/* Bit definitions and macros for MCF_PSC_OPSET */
#define MCF_PSC_OPSET_RTS             (0x01)

/* Bit definitions and macros for MCF_PSC_OPRESET */
#define MCF_PSC_OPRESET_RTS           (0x01)

/* Bit definitions and macros for MCF_PSC_SICR */
#define MCF_PSC_SICR_SIM(x)           (((x)&0x07)<<0)
#define MCF_PSC_SICR_SHDIR            (0x10)
#define MCF_PSC_SICR_DTS              (0x20)
#define MCF_PSC_SICR_AWR              (0x40)
#define MCF_PSC_SICR_ACRB             (0x80)
#define MCF_PSC_SICR_SIM_UART         (0x00)
#define MCF_PSC_SICR_SIM_MODEM8       (0x01)
#define MCF_PSC_SICR_SIM_MODEM16      (0x02)
#define MCF_PSC_SICR_SIM_AC97         (0x03)
#define MCF_PSC_SICR_SIM_SIR          (0x04)
#define MCF_PSC_SICR_SIM_MIR          (0x05)
#define MCF_PSC_SICR_SIM_FIR          (0x06)

/* Bit definitions and macros for MCF_PSC_IRCR1 */
#define MCF_PSC_IRCR1_SPUL            (0x01)
#define MCF_PSC_IRCR1_SIPEN           (0x02)
#define MCF_PSC_IRCR1_FD              (0x04)

/* Bit definitions and macros for MCF_PSC_IRCR2 */
#define MCF_PSC_IRCR2_NXTEOF          (0x01)
#define MCF_PSC_IRCR2_ABORT           (0x02)
#define MCF_PSC_IRCR2_SIPREQ          (0x04)

/* Bit definitions and macros for MCF_PSC_IRMDR */
#define MCF_PSC_IRMDR_M_FDIV(x)       (((x)&0x7F)<<0)
#define MCF_PSC_IRMDR_FREQ            (0x80)

/* Bit definitions and macros for MCF_PSC_IRFDR */
#define MCF_PSC_IRFDR_F_FDIV(x)       (((x)&0x0F)<<0)

/* Bit definitions and macros for MCF_PSC_RFCNT */
#define MCF_PSC_RFCNT_CNT(x)          (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_TFCNT */
#define MCF_PSC_TFCNT_CNT(x)          (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_RFSR */
#define MCF_PSC_RFSR_EMT              (0x0001)
#define MCF_PSC_RFSR_ALARM            (0x0002)
#define MCF_PSC_RFSR_FU               (0x0004)
#define MCF_PSC_RFSR_FRMRY            (0x0008)
#define MCF_PSC_RFSR_OF               (0x0010)
#define MCF_PSC_RFSR_UF               (0x0020)
#define MCF_PSC_RFSR_RXW              (0x0040)
#define MCF_PSC_RFSR_FAE              (0x0080)
#define MCF_PSC_RFSR_FRM(x)           (((x)&0x000F)<<8)
#define MCF_PSC_RFSR_TAG              (0x1000)
#define MCF_PSC_RFSR_TXW              (0x4000)
#define MCF_PSC_RFSR_IP               (0x8000)
#define MCF_PSC_RFSR_FRM_BYTE0        (0x0800)
#define MCF_PSC_RFSR_FRM_BYTE1        (0x0400)
#define MCF_PSC_RFSR_FRM_BYTE2        (0x0200)
#define MCF_PSC_RFSR_FRM_BYTE3        (0x0100)

/* Bit definitions and macros for MCF_PSC_TFSR */
#define MCF_PSC_TFSR_EMT              (0x0001)
#define MCF_PSC_TFSR_ALARM            (0x0002)
#define MCF_PSC_TFSR_FU               (0x0004)
#define MCF_PSC_TFSR_FRMRY            (0x0008)
#define MCF_PSC_TFSR_OF               (0x0010)
#define MCF_PSC_TFSR_UF               (0x0020)
#define MCF_PSC_TFSR_RXW              (0x0040)
#define MCF_PSC_TFSR_FAE              (0x0080)
#define MCF_PSC_TFSR_FRM(x)           (((x)&0x000F)<<8)
#define MCF_PSC_TFSR_TAG              (0x1000)
#define MCF_PSC_TFSR_TXW              (0x4000)
#define MCF_PSC_TFSR_IP               (0x8000)
#define MCF_PSC_TFSR_FRM_BYTE0        (0x0800)
#define MCF_PSC_TFSR_FRM_BYTE1        (0x0400)
#define MCF_PSC_TFSR_FRM_BYTE2        (0x0200)
#define MCF_PSC_TFSR_FRM_BYTE3        (0x0100)

/* Bit definitions and macros for MCF_PSC_RFCR */
#define MCF_PSC_RFCR_CNTR(x)          (((x)&0x0000FFFF)<<0)
#define MCF_PSC_RFCR_TXW_MSK          (0x00040000)
#define MCF_PSC_RFCR_OF_MSK           (0x00080000)
#define MCF_PSC_RFCR_UF_MSK           (0x00100000)
#define MCF_PSC_RFCR_RXW_MSK          (0x00200000)
#define MCF_PSC_RFCR_FAE_MSK          (0x00400000)
#define MCF_PSC_RFCR_IP_MSK           (0x00800000)
#define MCF_PSC_RFCR_GR(x)            (((x)&0x00000007)<<24)
#define MCF_PSC_RFCR_FRMEN            (0x08000000)
#define MCF_PSC_RFCR_TIMER            (0x10000000)
#define MCF_PSC_RFCR_WRITETAG         (0x20000000)
#define MCF_PSC_RFCR_SHADOW           (0x80000000)

/* Bit definitions and macros for MCF_PSC_TFCR */
#define MCF_PSC_TFCR_CNTR(x)          (((x)&0x0000FFFF)<<0)
#define MCF_PSC_TFCR_TXW_MSK          (0x00040000)
#define MCF_PSC_TFCR_OF_MSK           (0x00080000)
#define MCF_PSC_TFCR_UF_MSK           (0x00100000)
#define MCF_PSC_TFCR_RXW_MSK          (0x00200000)
#define MCF_PSC_TFCR_FAE_MSK          (0x00400000)
#define MCF_PSC_TFCR_IP_MSK           (0x00800000)
#define MCF_PSC_TFCR_GR(x)            (((x)&0x00000007)<<24)
#define MCF_PSC_TFCR_FRMEN            (0x08000000)
#define MCF_PSC_TFCR_TIMER            (0x10000000)
#define MCF_PSC_TFCR_WRITETAG         (0x20000000)
#define MCF_PSC_TFCR_SHADOW           (0x80000000)

/* Bit definitions and macros for MCF_PSC_RFAR */
#define MCF_PSC_RFAR_ALARM(x)         (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_TFAR */
#define MCF_PSC_TFAR_ALARM(x)         (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_RFRP */
#define MCF_PSC_RFRP_READ(x)          (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_TFRP */
#define MCF_PSC_TFRP_READ(x)          (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_RFWP */
#define MCF_PSC_RFWP_WRITE(x)         (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_TFWP */
#define MCF_PSC_TFWP_WRITE(x)         (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_RLRFP */
#define MCF_PSC_RLRFP_LFP(x)          (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_TLRFP */
#define MCF_PSC_TLRFP_LFP(x)          (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_RLWFP */
#define MCF_PSC_RLWFP_LFP(x)          (((x)&0x01FF)<<0)

/* Bit definitions and macros for MCF_PSC_TLWFP */
#define MCF_PSC_TLWFP_LFP(x)          (((x)&0x01FF)<<0)

/********************************************************************/

#endif /* __MCF548X_PSC_H__ */