mcf548x_sec.h

freescale MCF5485EVB开发板上中断操作示例

/*
 * File:	mcf548x_sec.h
 * Purpose:	Register and bit definitions for the MCF548X
 *
 * Notes:	
 *	
 */

#ifndef __MCF548X_SEC_H__
#define __MCF548X_SEC_H__

/*********************************************************************
*
* Integrated Security Engine (SEC)
*
*********************************************************************/

/* Register read/write macros */
#define MCF_SEC_EUACRH     (*(vuint32*)(void*)(&__MBAR[0x021000]))
#define MCF_SEC_EUACRL     (*(vuint32*)(void*)(&__MBAR[0x021004]))
#define MCF_SEC_EUASRH     (*(vuint32*)(void*)(&__MBAR[0x021028]))
#define MCF_SEC_EUASRL     (*(vuint32*)(void*)(&__MBAR[0x02102C]))
#define MCF_SEC_SIMRH      (*(vuint32*)(void*)(&__MBAR[0x021008]))
#define MCF_SEC_SIMRL      (*(vuint32*)(void*)(&__MBAR[0x02100C]))
#define MCF_SEC_SISRH      (*(vuint32*)(void*)(&__MBAR[0x021010]))
#define MCF_SEC_SISRL      (*(vuint32*)(void*)(&__MBAR[0x021014]))
#define MCF_SEC_SICRH      (*(vuint32*)(void*)(&__MBAR[0x021018]))
#define MCF_SEC_SICRL      (*(vuint32*)(void*)(&__MBAR[0x02101C]))
#define MCF_SEC_SIDR       (*(vuint32*)(void*)(&__MBAR[0x021020]))
#define MCF_SEC_SMCR       (*(vuint32*)(void*)(&__MBAR[0x021030]))
#define MCF_SEC_MEAR       (*(vuint32*)(void*)(&__MBAR[0x021038]))
#define MCF_SEC_CCCR0      (*(vuint32*)(void*)(&__MBAR[0x02200C]))
#define MCF_SEC_CCCR1      (*(vuint32*)(void*)(&__MBAR[0x02300C]))
#define MCF_SEC_CCPSRH0    (*(vuint32*)(void*)(&__MBAR[0x022010]))
#define MCF_SEC_CCPSRH1    (*(vuint32*)(void*)(&__MBAR[0x023010]))
#define MCF_SEC_CCPSRL0    (*(vuint32*)(void*)(&__MBAR[0x022014]))
#define MCF_SEC_CCPSRL1    (*(vuint32*)(void*)(&__MBAR[0x023014]))
#define MCF_SEC_CDPR0      (*(vuint32*)(void*)(&__MBAR[0x022044]))
#define MCF_SEC_CDPR1      (*(vuint32*)(void*)(&__MBAR[0x023044]))
#define MCF_SEC_FR0        (*(vuint32*)(void*)(&__MBAR[0x02204C]))
#define MCF_SEC_FR1        (*(vuint32*)(void*)(&__MBAR[0x02304C]))
#define MCF_SEC_AFRCR      (*(vuint32*)(void*)(&__MBAR[0x028018]))
#define MCF_SEC_AFSR       (*(vuint32*)(void*)(&__MBAR[0x028028]))
#define MCF_SEC_AFISR      (*(vuint32*)(void*)(&__MBAR[0x028030]))
#define MCF_SEC_AFIMR      (*(vuint32*)(void*)(&__MBAR[0x028038]))
#define MCF_SEC_DRCR       (*(vuint32*)(void*)(&__MBAR[0x02A018]))
#define MCF_SEC_DSR        (*(vuint32*)(void*)(&__MBAR[0x02A028]))
#define MCF_SEC_DISR       (*(vuint32*)(void*)(&__MBAR[0x02A030]))
#define MCF_SEC_DIMR       (*(vuint32*)(void*)(&__MBAR[0x02A038]))
#define MCF_SEC_MDRCR      (*(vuint32*)(void*)(&__MBAR[0x02C018]))
#define MCF_SEC_MDSR       (*(vuint32*)(void*)(&__MBAR[0x02C028]))
#define MCF_SEC_MDISR      (*(vuint32*)(void*)(&__MBAR[0x02C030]))
#define MCF_SEC_MDIMR      (*(vuint32*)(void*)(&__MBAR[0x02C038]))
#define MCF_SEC_RNGRCR     (*(vuint32*)(void*)(&__MBAR[0x02E018]))
#define MCF_SEC_RNGSR      (*(vuint32*)(void*)(&__MBAR[0x02E028]))
#define MCF_SEC_RNGISR     (*(vuint32*)(void*)(&__MBAR[0x02E030]))
#define MCF_SEC_RNGIMR     (*(vuint32*)(void*)(&__MBAR[0x02E038]))
#define MCF_SEC_AESRCR     (*(vuint32*)(void*)(&__MBAR[0x032018]))
#define MCF_SEC_AESSR      (*(vuint32*)(void*)(&__MBAR[0x032028]))
#define MCF_SEC_AESISR     (*(vuint32*)(void*)(&__MBAR[0x032030]))
#define MCF_SEC_AESIMR     (*(vuint32*)(void*)(&__MBAR[0x032038]))

/* Bit definitions and macros for MCF_SEC_EUACRH */
#define MCF_SEC_EUACRH_AFEU(x)          (((x)&0x0000000F)<<0)
#define MCF_SEC_EUACRH_MDEU(x)          (((x)&0x0000000F)<<8)
#define MCF_SEC_EUACRH_RNG(x)           (((x)&0x0000000F)<<24)
#define MCF_SEC_EUACRH_RNG_NOASSIGN     (0x00000000)
#define MCF_SEC_EUACRH_RNG_CHA0         (0x01000000)
#define MCF_SEC_EUACRH_RNG_CHA1         (0x02000000)
#define MCF_SEC_EUACRH_MDEU_NOASSIGN    (0x00000000)
#define MCF_SEC_EUACRH_MDEU_CHA0        (0x00000100)
#define MCF_SEC_EUACRH_MDEU_CHA1        (0x00000200)
#define MCF_SEC_EUACRH_AFEU_NOASSIGN    (0x00000000)
#define MCF_SEC_EUACRH_AFEU_CHA0        (0x00000001)
#define MCF_SEC_EUACRH_AFEU_CHA1        (0x00000002)

/* Bit definitions and macros for MCF_SEC_EUACRL */
#define MCF_SEC_EUACRL_AESU(x)          (((x)&0x0000000F)<<16)
#define MCF_SEC_EUACRL_DEU(x)           (((x)&0x0000000F)<<24)
#define MCF_SEC_EUACRL_DEU_NOASSIGN     (0x00000000)
#define MCF_SEC_EUACRL_DEU_CHA0         (0x01000000)
#define MCF_SEC_EUACRL_DEU_CHA1         (0x02000000)
#define MCF_SEC_EUACRL_AESU_NOASSIGN    (0x00000000)
#define MCF_SEC_EUACRL_AESU_CHA0        (0x00010000)
#define MCF_SEC_EUACRL_AESU_CHA1        (0x00020000)

/* Bit definitions and macros for MCF_SEC_EUASRH */
#define MCF_SEC_EUASRH_AFEU(x)          (((x)&0x0000000F)<<0)
#define MCF_SEC_EUASRH_MDEU(x)          (((x)&0x0000000F)<<8)
#define MCF_SEC_EUASRH_RNG(x)           (((x)&0x0000000F)<<24)

/* Bit definitions and macros for MCF_SEC_EUASRL */
#define MCF_SEC_EUASRL_AESU(x)          (((x)&0x0000000F)<<16)
#define MCF_SEC_EUASRL_DEU(x)           (((x)&0x0000000F)<<24)

/* Bit definitions and macros for MCF_SEC_SIMRH */
#define MCF_SEC_SIMRH_AERR              (0x08000000)
#define MCF_SEC_SIMRH_CHA0DN            (0x10000000)
#define MCF_SEC_SIMRH_CHA0ERR           (0x20000000)
#define MCF_SEC_SIMRH_CHA1DN            (0x40000000)
#define MCF_SEC_SIMRH_CHA1ERR           (0x80000000)

/* Bit definitions and macros for MCF_SEC_SIMRL */
#define MCF_SEC_SIMRL_TEA               (0x00000040)
#define MCF_SEC_SIMRL_DEUDN             (0x00000100)
#define MCF_SEC_SIMRL_DEUERR            (0x00000200)
#define MCF_SEC_SIMRL_AESUDN            (0x00001000)
#define MCF_SEC_SIMRL_AESUERR           (0x00002000)
#define MCF_SEC_SIMRL_MDEUDN            (0x00010000)
#define MCF_SEC_SIMRL_MDEUERR           (0x00020000)
#define MCF_SEC_SIMRL_AFEUDN            (0x00100000)
#define MCF_SEC_SIMRL_AFEUERR           (0x00200000)
#define MCF_SEC_SIMRL_RNGDN             (0x01000000)
#define MCF_SEC_SIMRL_RNGERR            (0x02000000)

/* Bit definitions and macros for MCF_SEC_SISRH */
#define MCF_SEC_SISRH_AERR              (0x08000000)
#define MCF_SEC_SISRH_CHA0DN            (0x10000000)
#define MCF_SEC_SISRH_CHA0ERR           (0x20000000)
#define MCF_SEC_SISRH_CHA1DN            (0x40000000)
#define MCF_SEC_SISRH_CHA1ERR           (0x80000000)

/* Bit definitions and macros for MCF_SEC_SISRL */
#define MCF_SEC_SISRL_TEA               (0x00000040)
#define MCF_SEC_SISRL_DEUDN             (0x00000100)
#define MCF_SEC_SISRL_DEUERR            (0x00000200)
#define MCF_SEC_SISRL_AESUDN            (0x00001000)
#define MCF_SEC_SISRL_AESUERR           (0x00002000)
#define MCF_SEC_SISRL_MDEUDN            (0x00010000)
#define MCF_SEC_SISRL_MDEUERR           (0x00020000)
#define MCF_SEC_SISRL_AFEUDN            (0x00100000)
#define MCF_SEC_SISRL_AFEUERR           (0x00200000)
#define MCF_SEC_SISRL_RNGDN             (0x01000000)
#define MCF_SEC_SISRL_RNGERR            (0x02000000)

/* Bit definitions and macros for MCF_SEC_SICRH */
#define MCF_SEC_SICRH_AERR              (0x08000000)
#define MCF_SEC_SICRH_CHA0DN            (0x10000000)
#define MCF_SEC_SICRH_CHA0ERR           (0x20000000)
#define MCF_SEC_SICRH_CHA1DN            (0x40000000)
#define MCF_SEC_SICRH_CHA1ERR           (0x80000000)

/* Bit definitions and macros for MCF_SEC_SICRL */
#define MCF_SEC_SICRL_TEA               (0x00000040)
#define MCF_SEC_SICRL_DEUDN             (0x00000100)
#define MCF_SEC_SICRL_DEUERR            (0x00000200)
#define MCF_SEC_SICRL_AESUDN            (0x00001000)
#define MCF_SEC_SICRL_AESUERR           (0x00002000)
#define MCF_SEC_SICRL_MDEUDN            (0x00010000)
#define MCF_SEC_SICRL_MDEUERR           (0x00020000)
#define MCF_SEC_SICRL_AFEUDN            (0x00100000)
#define MCF_SEC_SICRL_AFEUERR           (0x00200000)
#define MCF_SEC_SICRL_RNGDN             (0x01000000)
#define MCF_SEC_SICRL_RNGERR            (0x02000000)

/* Bit definitions and macros for MCF_SEC_SMCR */
#define MCF_SEC_SMCR_CURR_CHAN(x)       (((x)&0x0000000F)<<4)
#define MCF_SEC_SMCR_SWR                (0x01000000)
#define MCF_SEC_SMCR_CURR_CHAN_1        (0x00000010)
#define MCF_SEC_SMCR_CURR_CHAN_2        (0x00000020)

/* Bit definitions and macros for MCF_SEC_CCCRn */
#define MCF_SEC_CCCRn_RST               (0x00000001)
#define MCF_SEC_CCCRn_CDIE              (0x00000002)
#define MCF_SEC_CCCRn_NT                (0x00000004)
#define MCF_SEC_CCCRn_NE                (0x00000008)
#define MCF_SEC_CCCRn_WE                (0x00000010)
#define MCF_SEC_CCCRn_BURST_SIZE(x)     (((x)&0x00000007)<<8)
#define MCF_SEC_CCCRn_BURST_SIZE_2      (0x00000000)
#define MCF_SEC_CCCRn_BURST_SIZE_8      (0x00000100)
#define MCF_SEC_CCCRn_BURST_SIZE_16     (0x00000200)
#define MCF_SEC_CCCRn_BURST_SIZE_24     (0x00000300)
#define MCF_SEC_CCCRn_BURST_SIZE_32     (0x00000400)
#define MCF_SEC_CCCRn_BURST_SIZE_40     (0x00000500)
#define MCF_SEC_CCCRn_BURST_SIZE_48     (0x00000600)
#define MCF_SEC_CCCRn_BURST_SIZE_56     (0x00000700)

/* Bit definitions and macros for MCF_SEC_CCPSRHn */
#define MCF_SEC_CCPSRHn_STATE(x)        (((x)&0x000000FF)<<0)

/* Bit definitions and macros for MCF_SEC_CCPSRLn */
#define MCF_SEC_CCPSRLn_PAIR_PTR(x)     (((x)&0x000000FF)<<0)
#define MCF_SEC_CCPSRLn_EUERR           (0x00000100)
#define MCF_SEC_CCPSRLn_SERR            (0x00000200)
#define MCF_SEC_CCPSRLn_DERR            (0x00000400)
#define MCF_SEC_CCPSRLn_PERR            (0x00001000)
#define MCF_SEC_CCPSRLn_TEA             (0x00002000)
#define MCF_SEC_CCPSRLn_SD              (0x00010000)
#define MCF_SEC_CCPSRLn_PD              (0x00020000)