yunsuanqi.rpt

maxplus环境下通过硬件实现存储器工作的原理展示

-- Equation name is 'D2', type is bidir 
D2       = TRI(_LC6_B22,  _LC1_B9);

-- Node name is 'D3' 
-- Equation name is 'D3', type is bidir 
D3       = TRI(_LC8_B16,  _LC1_B9);

-- Node name is 'D4' 
-- Equation name is 'D4', type is bidir 
D4       = TRI(_LC6_B6,  _LC1_B9);

-- Node name is 'D5' 
-- Equation name is 'D5', type is bidir 
D5       = TRI(_LC1_B10,  _LC1_B9);

-- Node name is 'D6' 
-- Equation name is 'D6', type is bidir 
D6       = TRI(_LC2_B9,  _LC1_B9);

-- Node name is 'D7' 
-- Equation name is 'D7', type is bidir 
D7       = TRI(_LC3_B19,  _LC1_B9);

-- Node name is 'seg_a' 
-- Equation name is 'seg_a', type is output 
seg_a    =  _LC1_C6;

-- Node name is 'seg_b' 
-- Equation name is 'seg_b', type is output 
seg_b    =  _LC2_C6;

-- Node name is 'seg_c' 
-- Equation name is 'seg_c', type is output 
seg_c    =  _LC5_C11;

-- Node name is 'seg_d' 
-- Equation name is 'seg_d', type is output 
seg_d    =  _LC1_C10;

-- Node name is 'seg_e' 
-- Equation name is 'seg_e', type is output 
seg_e    =  _LC7_C3;

-- Node name is 'seg_f' 
-- Equation name is 'seg_f', type is output 
seg_f    =  _LC4_C3;

-- Node name is 'seg_g' 
-- Equation name is 'seg_g', type is output 
seg_g    =  _LC8_C10;

-- Node name is 's0' 
-- Equation name is 's0', type is output 
s0       =  _LC8_B1;

-- Node name is 's1' 
-- Equation name is 's1', type is output 
s1       =  _LC7_B1;

-- Node name is 's2' 
-- Equation name is 's2', type is output 
s2       =  _LC4_B1;

-- Node name is 's3' 
-- Equation name is 's3', type is output 
s3       =  _LC5_B1;

-- Node name is '|bed_7seg:76|~44~1' from file "bed_7seg.tdf" line 7, column 8
-- Equation name is '_LC2_C10', type is buried 
-- synthesized logic cell 
_LC2_C10 = LCELL( _EQ001);
  _EQ001 = !_LC1_B7 & !_LC4_B6;

-- Node name is '|bed_7seg:76|:78' from file "bed_7seg.tdf" line 11, column 8
-- Equation name is '_LC3_C3', type is buried 
_LC3_C3  = LCELL( _EQ002);
  _EQ002 = !_LC1_B2 &  _LC1_B12 &  _LC2_C10;

-- Node name is '|bed_7seg:76|:87' from file "bed_7seg.tdf" line 12, column 8
-- Equation name is '_LC1_C3', type is buried 
_LC1_C3  = LCELL( _EQ003);
  _EQ003 = !_LC1_B2 & !_LC1_B7 &  _LC1_B12 &  _LC4_B6;

-- Node name is '|bed_7seg:76|:107' from file "bed_7seg.tdf" line 14, column 8
-- Equation name is '_LC8_C6', type is buried 
_LC8_C6  = LCELL( _EQ004);
  _EQ004 = !_LC1_B2 &  _LC1_B7 &  _LC1_B12 &  _LC4_B6;

-- Node name is '|bed_7seg:76|~149~1' from file "bed_7seg.tdf" line 18, column 8
-- Equation name is '_LC6_C3', type is buried 
-- synthesized logic cell 
_LC6_C3  = LCELL( _EQ005);
  _EQ005 =  _LC1_B2 & !_LC1_B12;

-- Node name is '|bed_7seg:76|:168' from file "bed_7seg.tdf" line 20, column 18
-- Equation name is '_LC2_C6', type is buried 
_LC2_C6  = LCELL( _EQ006);
  _EQ006 =  _LC1_B2 & !_LC1_B7 & !_LC1_B12
         #  _LC1_B2 & !_LC1_B7 &  _LC4_B6
         # !_LC1_B2 &  _LC1_B7 & !_LC1_B12
         # !_LC1_B7 & !_LC1_B12 &  _LC4_B6
         # !_LC1_B2 & !_LC1_B12 & !_LC4_B6
         #  _LC1_B7 & !_LC1_B12 & !_LC4_B6
         # !_LC1_B2 & !_LC1_B7 & !_LC4_B6
         # !_LC1_B2 &  _LC1_B7 &  _LC4_B6;

-- Node name is '|bed_7seg:76|~169~1' from file "bed_7seg.tdf" line 20, column 20
-- Equation name is '_LC1_C11', type is buried 
-- synthesized logic cell 
_LC1_C11 = LCELL( _EQ007);
  _EQ007 =  _LC1_B2 & !_LC1_B7 &  _LC4_B6
         # !_LC1_B2 & !_LC1_B12 &  _LC4_B6
         # !_LC1_B7 & !_LC1_B12
         #  _LC1_B2 & !_LC1_B12 & !_LC4_B6
         # !_LC1_B2 & !_LC1_B7 & !_LC4_B6
         # !_LC1_B2 &  _LC1_B7 &  _LC4_B6;

-- Node name is '|bed_7seg:76|~169~2' from file "bed_7seg.tdf" line 20, column 20
-- Equation name is '_LC5_C6', type is buried 
-- synthesized logic cell 
_LC5_C6  = LCELL( _EQ008);
  _EQ008 = !_LC1_B2 & !_LC1_B7 & !_LC1_B12 & !_LC4_B6
         #  _LC1_B2 &  _LC1_B7 & !_LC1_B12 & !_LC4_B6;

-- Node name is '|bed_7seg:76|:169' from file "bed_7seg.tdf" line 20, column 20
-- Equation name is '_LC5_C11', type is buried 
_LC5_C11 = LCELL( _EQ009);
  _EQ009 =  _LC3_C10
         #  _LC1_C3
         #  _LC1_C11;

-- Node name is '|bed_7seg:76|:176' from file "bed_7seg.tdf" line 21, column 8
-- Equation name is '_LC4_C10', type is buried 
_LC4_C10 = LCELL( _EQ010);
  _EQ010 =  _LC1_B2 &  _LC1_B7 &  _LC1_B12 & !_LC4_B6;

-- Node name is '|bed_7seg:76|~178~1' from file "bed_7seg.tdf" line 21, column 22
-- Equation name is '_LC5_C10', type is buried 
-- synthesized logic cell 
_LC5_C10 = LCELL( _EQ011);
  _EQ011 =  _LC1_B2 & !_LC1_B7 & !_LC1_B12
         #  _LC1_B2 & !_LC1_B7 &  _LC4_B6
         # !_LC1_B2 &  _LC1_B7 & !_LC1_B12 &  _LC4_B6;

-- Node name is '|bed_7seg:76|~178~2' from file "bed_7seg.tdf" line 21, column 22
-- Equation name is '_LC7_C6', type is buried 
-- synthesized logic cell 
_LC7_C6  = LCELL( _EQ012);
  _EQ012 =  _LC1_B2 & !_LC1_B7 & !_LC1_B12
         # !_LC1_B2 &  _LC1_B7 & !_LC1_B12 &  _LC4_B6;

-- Node name is '|bed_7seg:76|~178~3' from file "bed_7seg.tdf" line 21, column 22
-- Equation name is '_LC5_C3', type is buried 
-- synthesized logic cell 
_LC5_C3  = LCELL( _EQ013);
  _EQ013 =  _LC1_B2 & !_LC1_B7 & !_LC1_B12;

-- Node name is '|bed_7seg:76|:178' from file "bed_7seg.tdf" line 21, column 22
-- Equation name is '_LC1_C10', type is buried 
_LC1_C10 = LCELL( _EQ014);
  _EQ014 =  _LC6_C10
         #  _LC1_B2 &  _LC1_B12 &  _LC2_C10
         # !_LC1_B2 & !_LC1_B12 &  _LC2_C10;

-- Node name is '|bed_7seg:76|~185~1' from file "bed_7seg.tdf" line 22, column 16
-- Equation name is '_LC3_C6', type is buried 
-- synthesized logic cell 
_LC3_C6  = LCELL( _EQ015);
  _EQ015 = !_LC1_B2 &  _LC1_B7 & !_LC1_B12 & !_LC4_B6
         # !_LC1_B2 & !_LC1_B7 &  _LC1_B12 &  _LC4_B6;

-- Node name is '|bed_7seg:76|~185~2' from file "bed_7seg.tdf" line 22, column 16
-- Equation name is '_LC4_C6', type is buried 
-- synthesized logic cell 
_LC4_C6  = LCELL( _EQ016);
  _EQ016 =  _LC1_B2 &  _LC1_B12 & !_LC4_B6
         #  _LC1_B2 &  _LC1_B7 &  _LC1_B12
         #  _LC1_B7 &  _LC1_B12 & !_LC4_B6;

-- Node name is '|bed_7seg:76|~185~3' from file "bed_7seg.tdf" line 22, column 16
-- Equation name is '_LC6_C6', type is buried 
-- synthesized logic cell 
_LC6_C6  = LCELL( _EQ017);
  _EQ017 =  _LC4_C6
         #  _LC5_C6;

-- Node name is '|bed_7seg:76|:185' from file "bed_7seg.tdf" line 22, column 16
-- Equation name is '_LC1_C6', type is buried 
_LC1_C6  = LCELL( _EQ018);
  _EQ018 =  _LC6_C6
         #  _LC7_C6
         #  _LC8_C6
         #  _LC3_C6;

-- Node name is '|bed_7seg:76|~186~1' from file "bed_7seg.tdf" line 22, column 24
-- Equation name is '_LC2_C3', type is buried 
-- synthesized logic cell 
_LC2_C3  = LCELL( _EQ019);
  _EQ019 =  _LC1_B2 &  _LC1_B12 & !_LC4_B6
         #  _LC1_B7 &  _LC1_B12 & !_LC4_B6
         # !_LC1_B2 & !_LC1_B7 & !_LC1_B12 & !_LC4_B6
         #  _LC1_B2 &  _LC1_B7;

-- Node name is '|bed_7seg:76|~186~2' from file "bed_7seg.tdf" line 22, column 24
-- Equation name is '_LC8_C3', type is buried 
-- synthesized logic cell 
_LC8_C3  = LCELL( _EQ020);
  _EQ020 = !_LC1_B2 &  _LC1_B7 & !_LC1_B12 & !_LC4_B6
         #  _LC1_B2 & !_LC1_B7 &  _LC1_B12 &  _LC4_B6;

-- Node name is '|bed_7seg:76|:186' from file "bed_7seg.tdf" line 22, column 24
-- Equation name is '_LC7_C3', type is buried 
_LC7_C3  = LCELL( _EQ021);
  _EQ021 =  _LC2_C10 &  _LC6_C3
         #  _LC2_C3
         #  _LC8_C3;

-- Node name is '|bed_7seg:76|:187' from file "bed_7seg.tdf" line 22, column 26
-- Equation name is '_LC4_C3', type is buried 
_LC4_C3  = LCELL( _EQ022);
  _EQ022 =  _LC2_C3
         #  _LC3_C3
         #  _LC5_C3
         #  _LC1_C3;

-- Node name is '|bed_7seg:76|~188~1' from file "bed_7seg.tdf" line 22, column 28
-- Equation name is '_LC3_C10', type is buried 
-- synthesized logic cell 
_LC3_C10 = LCELL( _EQ023);
  _EQ023 = !_LC1_B2 &  _LC1_B7 &  _LC1_B12 & !_LC4_B6
         #  _LC1_B2 &  _LC1_B7 & !_LC1_B12 &  _LC4_B6;

-- Node name is '|bed_7seg:76|~188~2' from file "bed_7seg.tdf" line 22, column 28
-- Equation name is '_LC6_C10', type is buried 
-- synthesized logic cell 
_LC6_C10 = LCELL( _EQ024);
  _EQ024 =  _LC4_C10
         #  _LC5_C10
         #  _LC3_C6
         #  _LC3_C10;

-- Node name is '|bed_7seg:76|~188~3' from file "bed_7seg.tdf" line 22, column 28
-- Equation name is '_LC7_C10', type is buried 
-- synthesized logic cell 
_LC7_C10 = LCELL( _EQ025);
  _EQ025 =  _LC1_B2 &  _LC1_B7 &  _LC1_B12 &  _LC4_B6
         #  _LC1_B2 &  _LC1_B7 & !_LC1_B12 & !_LC4_B6
         # !_LC1_B2 & !_LC1_B7 &  _LC1_B12 & !_LC4_B6;

-- Node name is '|bed_7seg:76|:188' from file "bed_7seg.tdf" line 22, column 28
-- Equation name is '_LC8_C10', type is buried 
_LC8_C10 = LCELL( _EQ026);
  _EQ026 =  _LC7_C10
         #  _LC6_C10;

-- Node name is '|cdu16:68|74161:1|f74161:sub|:9' = '|cdu16:68|74161:1|f74161:sub|QA' 
-- Equation name is '_LC8_B1', type is buried 
_LC8_B1  = DFFE( _EQ027, GLOBAL( clk), GLOBAL( clr_181),  VCC,  VCC);
  _EQ027 = !en_181 &  _LC8_B1
         #  en_181 & !_LC8_B1;

-- Node name is '|cdu16:68|74161:1|f74161:sub|:87' = '|cdu16:68|74161:1|f74161:sub|QB' 
-- Equation name is '_LC7_B1', type is buried 
_LC7_B1  = DFFE( _EQ028, GLOBAL( clk), GLOBAL( clr_181),  VCC,  VCC);
  _EQ028 = !_LC6_B1 &  _LC7_B1
         #  _LC6_B1 & !_LC7_B1;

-- Node name is '|cdu16:68|74161:1|f74161:sub|:99' = '|cdu16:68|74161:1|f74161:sub|QC' 
-- Equation name is '_LC4_B1', type is buried 
_LC4_B1  = DFFE( _EQ029, GLOBAL( clk), GLOBAL( clr_181),  VCC,  VCC);
  _EQ029 =  _LC4_B1 & !_LC7_B1
         #  _LC4_B1 & !_LC6_B1
         # !_LC4_B1 &  _LC6_B1 &  _LC7_B1;

-- Node name is '|cdu16:68|74161:1|f74161:sub|:110' = '|cdu16:68|74161:1|f74161:sub|QD' 
-- Equation name is '_LC5_B1', type is buried 
_LC5_B1  = DFFE( _EQ030, GLOBAL( clk), GLOBAL( clr_181),  VCC,  VCC);
  _EQ030 =  _LC5_B1 & !_LC7_B1
         #  _LC5_B1 & !_LC6_B1
         # !_LC4_B1 &  _LC5_B1
         #  _LC4_B1 & !_LC5_B1 &  _LC6_B1 &  _LC7_B1;

-- Node name is '|cdu16:68|74161:1|f74161:sub|:80' 
-- Equation name is '_LC6_B1', type is buried 
_LC6_B1  = LCELL( _EQ031);
  _EQ031 =  en_181 &  _LC8_B1;

-- Node name is '|cdu16:69|74161:1|f74161:sub|:9' = '|cdu16:69|74161:1|f74161:sub|QA' 
-- Equation name is '_LC4_B12', type is buried 
_LC4_B12 = DFFE( _EQ032, GLOBAL( clk), GLOBAL( clr),  VCC,  VCC);
  _EQ032 = !_LC3_B12 &  _LC4_B12
         #  _LC4_B12 & !_LC6_B12