init_pll_b.c

blackfin的MDMA程序

#include "main.h"

#define		CoreCLOCK_multiplier	15
#define		SCLK_divider			4
void Init_PLL_B(int num)		//num=0,1
{
	short previous_PLL= *pPLL_CTL;
	short previous_SICA_IWR = *pSICA_IWR0;
  	short previous_SICB_IWR = *pSICB_IWR0;
  
  	
  	if(num == 0)
  	{
  		*pSICA_IWR0 = (previous_SICA_IWR | 0x1); // enable PLL Wakeup Interrupt
		*pPLL_CTL = 0x1200;		//(15 MULti)
		ssync();

		idle();					 // put in idle

		*pSICA_IWR0 = previous_SICA_IWR; // continue here after idle, restore previous IWR content
		ssync();
		ssync();
		ssync();
		ssync();
		*pSICA_IWR0 = (previous_SICA_IWR | 0x1); // enable PLL Wakeup Interrupt
		*pPLL_CTL = 0x1e00;		//(15 MULti)
		ssync();

		idle();					 // put in idle

		*pSICA_IWR0 = previous_SICA_IWR; // continue here after idle, restore previous IWR content
		ssync();
  	}
  	else
  	{
		*pSICB_IWR0 = (previous_SICB_IWR | 0x1); // enable PLL Wakeup Interrupt
		*pPLL_CTL = 0x1200;		//(15 MULti)
		ssync();

		idle();					 // put in idle

		*pSICB_IWR0 = previous_SICB_IWR; // continue here after idle, restore previous IWR content
		ssync();
		ssync();
		ssync();
		*pSICB_IWR0 = (previous_SICB_IWR | 0x1); // enable PLL Wakeup Interrupt
		*pPLL_CTL = 0x1e00;		//(15 MULti)
		ssync();

		idle();					 // put in idle

		*pSICB_IWR0 = previous_SICB_IWR; // continue here after idle, restore previous IWR content
		ssync();
  	}
  	
  	*pPLL_DIV = (*pPLL_DIV & 0xFFF0) | SCLK_divider;
  	ssync();
}