sub.asm

calculator code ,use toshibaor nec LSI

;V3.00S_CLR		equ	0x07		;'c '
;V3.00S_MTL		equ	0x0e		;'M*'
;V3.00S_MST		equ	0x0d		;'M<>'
;V3.00S_MPL		equ	0x0b		;'M+'
;V3.00S_MMI		equ	0x0c		;'M-'
;V3.00S_M2TL		equ	0x10		;'G*'
;V3.00S_STASTA	equ	0x77	;'**' 
;V3.00S_M2ST		equ	0x0f		;'G<>'
;V3.00S_STAS		equ	0x76	;'*S'
;V3.00S_M2PL		equ	0x3e		;'G+'
;V3.00S_STAPL		equ	0x73	;'*+' 
;V3.00S_PLSTA		equ	0x37	;'+*'
;V3.00S_M2MI		equ	0x3f		;'G-'
;V3.00S_STAMN		equ	0x70	;'*-' 
;V3.00S_M2TLV		equ	0x97		;'G*'
;V3.00S_M2STV		equ	0x96		;'G<>'
;V3.00S_M2PLV		equ	0x3e		;'G+'
;V3.00S_M2MIV		equ	0x3f		;'G-'
;V3.00S_PER		equ	0x06		;' %'
;V3.00S_STAPER	equ	0x71		;'*%'
;V3.00S_PRDS		equ	0x01		;'-%'
;V3.00S_PRAD		equ	0x31		;'+%'
;V3.00S_DLTAL		equ	0x82		;delta+' '
;V3.00S_DLTA		equ	0x28		;' "+delta V1.26
;V3.00S_PRDL		equ	0x81		;delta+'%'
;V3.00S_DLAS		equ	0x87		;delta+'*'
;V3.00S_PRMU		equ	0x21		;' %'
;V3.00S_MKUP		equ	0xa2		;'M '
;V3.00S_RVS		equ	0x22		;'  '
;V3.00S_AVR		equ	0x27		;' *'
;V3.00S_ROOT		equ	0x22		;'  '
;V3.00S_TAX		equ	0x12		;'% '
;V3.00S_PRN		equ	0x62		;'<> '
;V3.00S_EUR		equ	0x22		;'  '
;V3.00S_EUEQ		equ	0xc2		;'= '
;V3.00S_COST		equ	0x2b		;' C'
;V3.00S_SELL		equ	0x26		;' <>'
;V3.00S_M		equ	0x2a		;' M'
;V3.00S_MARG		equ	0xa1		;'M%'
;V3.00S_PERMARG	equ	0x1a		;'%M'
;V3.00S_TAXA		equ	0x27		;' *'
;V3.00S_ICG		equ	0x29		;' G'
;V3.00S_ICGV		equ	0x29		;' G'
;V3.00S_ICM		equ	0x2a		;' M'
;V3.00S_ASM		equ	0x7a		;'*M'
;V3.00S_ASC		equ	0x7b		;'*C'
;V3.00S_ASDL		equ	0x78		;'*'+delta
;V3.00S_MIPL		equ	0x03		;'-+'	
;V3.00S_MIMI		equ	0x00		;'--'
;V3.00S_MIST		equ	0x06		;'-S'
;V3.00S_MITL		equ	0x07		;'-T'
;V3.00S_EUROS		equ	0x29		;' euro'
;V3.00S_G		equ	0x9f		;'G '
;V3.00S_GPL		equ	0x93		;'G+'
;V3.00S_GAST		equ	0x97		;'G*'
;==============================================================================
P_SPC	equ	0x20	;for print " "
;-----------------------------------------------------------
;interrupt enable flag set:

EF4		equ	4;(EIRL).4 /INT0
EF5		equ	5;(EIRL).5 INTTC1
EF6		equ	6;(EIRL).6 INT1
EF7		equ	7;(EIRL).7 INTTBT
EF8		equ	0;(EIRH).0 INTTC3
EF9		equ	1;(EIRH).1 INTSIO(High speed SIO interrupt)
EF10		equ	2;(EIRH).2 INTTC4
EF11		equ	3;(EIRH).3 INT3
EF12		equ	4;(EIRH).4 INT4
EF13		equ	5;(EIRH).5 INTTC2
EF14		equ	6;(EIRH).6 /INT5
EF15		equ	7;(EIRH).7 INTADC or INT2
;interrupt request flag set:
IL2		equ	2;(ILL).2 INTSWI 
IL3		equ	3;(ILL).3 INTATRAP
IL4		equ	4;(ILL).4 /INT0
IL5		equ	5;(ILL).5 INTTC1
IL6		equ	6;(ILL).6 INT1
IL7		equ	7;(ILL).7 INTTB
IL8		equ	0;(ILH).0 INTTC3
IL9		equ	1;(ILH).1 INTSIO
IL10		equ	2;(ILH).2 INTTC4
IL11		equ	3;(ILH).3 INT3
IL12		equ	4;(ILH).4 INT4
IL13		equ	5;(ILH).5 INTTC2
IL14		equ	6;(ILH).6 /INT5
IL15		equ	7;(ILH).7 INTADC or /INT2
;	DBR_LCD_RATE		equ	(0x0f33<<4)+5	;LCD DBR matrix point for "RATE"
;	DBR_LCD1235_RATE	equ	(0x0f33<<4)+3	;LCD DBR matrix point for "RATE"
;	DBR_LCD1297_RATE	equ	(0x0f33<<4)+4	;LCD DBR matrix point for "RATE"
;	DBR_LCD120_RATE		equ	(0x0f33<<4)+4	;LCD DBR matrix point for "RATE"
;	DBR_LCD1297_GT		equ	(0x0f32<<4)+2	;LCD DBR matrix point for "GT"
;	;LCD_PRN		equ	(0x0f31<<4)+3	;LCD DBR matrix point for "PRINT"
;	;LCD_FIN		equ	(0x0f30<<4)+3	;LCD DEB matrix point for "FIN"

AUTOOFFTIME	equ	31250;1500
	$list

	public	w1_clear,w2_clear,w3_clear,ten_clear,acc_clear,gt_clear,mem1_clear,w1_zerock,ten_zerock
	public	calc_add,calc_mult,calc_div,stg_sfl47,stg_sfr47,stg_sfl49,stg_sfr49
	public	spc_prnbuf,spc_dt,spc_disp,_spaceck
	public	ten_to_w2,ten_to_w2dp,wk_update,ic_update,add_mode,ten_to_w1,ten_to_w1dp
	public	w1_to_ten,w2_to_ten,mem1_to_w2,gt_to_w2,w1_to_w2,acc_to_w2,w2_to_w1,const_to_w1,w1_to_const,w2_to_const,wk_round
	public	exchg_w12,const_to_w2,w2_to_tax,cost_to_w2,w2_to_cost,sell_to_w2,w2_to_sell,marg_to_w2,w2_to_marg,marg_to_w1,sell_to_w1,cost_to_w1
	public	dt_to_prn,prn_to_dt,dp_adjust,_zerock,wk_round_0,wkrnd_zsp0	
	public	move_to_w1,move_to_w2,move_9byte,clear_9byte
	public	euro1_to_w2,euro2_to_w2,w2_to_euro1,w2_to_euro2,ten_to_euro1,ten_to_euro2,euro1_to_ten,euro2_to_ten
	public	tax2_to_w1,tax2_to_w2,tax_to_w1,tax_to_w2
	public	w2_to_tax2,w1_to_acc,w2_to_acc,acc_to_ten,wk_round_with_ten_dp
	public	const_clear,wk_round_with_const_dp,wk_round_with_2DP
	public	wk_round_down,wk_round_up
	public	w2_print,w2_round_print,w2_round
	public	w1_print,w1_round_print,w1_round
	public	w1_to_w4,w4_to_w1,w2_to_w4,w4_to_w2,w1_to_ftemp,ftemp_to_w2
	public	move_to_ten
	extern	wk_print
ROM	section	code 
;===================================================
;	Data clear	use resister:  hl, c, a
;===================================================
;clear work resister...............
const_clear:
		ld	hl,CONST
		j	clear_9byte
w1_clear:
		ld	hl,W1
		j	clear_9byte
w2_clear:
		ld	hl,W2
		j	clear_9byte
w3_clear:
		ld	hl,W3
		j	clear_9byte
ten_clear:
		ld	(TEN_CT),0	;V3.08
		ld	hl,TENKEY
		j	clear_9byte
;clear work resister & item counter...............
acc_clear:
;V2.03		@CLB	(ACC_STORE)	;V1.26 only used for V1297
		ld	hl,ACC
		call	clear_9byte
		j	ica_clear
mem1_clear:
		ld	hl,MEM1
		call	clear_9byte
		j	icm_clear
gt_clear:
		ld	hl,MEMGT
		call	clear_9byte
		j	icg_clear

;clear item counter.................
ica_clear:
		ld	hl,IC_A
		j	clear_2byte
icm_clear:
		ld	hl,IC_M
		j	clear_2byte
icg_clear:
		ld	hl,IC_G
		j	clear_2byte

;space clear.......................
spc_dt:
		ld	hl,DT_BUF
		ld	a,0xff
		j	fill_9byte
spc_prnbuf:
;V4.03		ld	(PRN_BUF_S),P_SPC	;clear prn_buff sign "+" or "-"
		ld	hl,PRN_BUF
spc_prnbuf0:
		ld	a,ps_spc
		ld	c,24-1
		j	fill_nb

spc_disp:
		ld	hl,DISP
		ld	a,D_SPC
		ld	c,14-1			;fill data from address+13
		j	fill_nb0

clear_2byte:
		ld	a,0
		ld	c,2-1			;fill data from address+1
		j	fill_nb0
clear_9byte:
		ld	a,0
fill_9byte:
		ld	c,9-1			;fill data from address+8
fill_nb:
fill_nb0:	
		ld	(hl+c),a
		dec	c
		j	f,fill_nb0		;reg.c is not 0xff?  yes->
		ret

;===================================================
;	Data transfer  use register:  ix, iy, c, a
;===================================================
;transfer to W1........................
sell_to_w1:
		ld	ix,SELL
		j	move_to_w1
cost_to_w1:
		ld	ix,COST
		j	move_to_w1
marg_to_w1:
		ld	ix,MARG
		j	move_to_w1
tax_to_w1:
		ld	ix,TAXRT
		j	move_to_w1
tax2_to_w1:
		ld	ix,TAX2RT
		j	move_to_w1
const_to_w1:
		ld	ix,CONST
		j	move_to_w1
mem1_to_w1:
		ld	ix,MEM1
		j	move_to_w1
gt_to_w1:
		ld	ix,MEMGT
		j	move_to_w1
w2_to_w1:
		ld	ix,W2
		j	move_to_w1
w3_to_w1:
		ld	ix,W3
		j	move_to_w1
ten_to_w1:
		ld	ix,TENKEY
		j	move_to_w1

;transfer to W2........................
cost_to_w2:
		ld	ix,COST
		j	move_to_w2
sell_to_w2:
		ld	ix,SELL
		j	move_to_w2
marg_to_w2:
		ld	ix,MARG
		j	move_to_w2
tax_to_w2:
		ld	ix,TAXRT
		j	move_to_w2
tax2_to_w2:
		ld	ix,TAX2RT
		j	move_to_w2
const_to_w2:
		ld	ix,CONST
		j	move_to_w2
gt_to_w2:
		ld	ix,MEMGT
		j	move_to_w2
mem1_to_w2:
		ld	ix,MEM1
		j	move_to_w2
acc_to_w2:
		ld	ix,ACC
		j	move_to_w2
w1_to_w2:
		ld	ix,W1
		j	move_to_w2
w3_to_w2:
		ld	ix,W3
		j	move_to_w2
ten_to_w2:
		ld	ix,TENKEY
		j	move_to_w2
euro1_to_w2:
		push	wa
	ld	wa,F_COUNTRY1
	set	(F_COUNTRY1>>4).a
		pop	wa
		ld	ix,EURO_RATE1
		j	move_to_w2
euro2_to_w2:
		push	wa
	ld	wa,F_COUNTRY2
	set	(F_COUNTRY2>>4).a
		pop	wa
		ld	ix,EURO_RATE2
		j	move_to_w2
;transfer to W3........................
w1_to_w3:
		ld	ix,W1
		j	move_to_w3
w2_to_w3:
		ld	ix,W2
		j	move_to_w3

;transfer to TENKEY....................
w1_to_ten:
		ld	ix,W1
		j	move_to_ten
w2_to_ten:
		ld	ix,W2
		j	move_to_ten
acc_to_ten:
		ld	ix,ACC
		j	move_to_ten
;transfer to CONST........................
w1_to_const:
		ld	ix,W1
		j	move_to_const
w2_to_const:
		ld	ix,W2
		j	move_to_const
;-----------------------------------------
w2_to_acc:				;V1.26
		ld	ix,W2		;V1.26
		j	move_to_acc	;V1.26
w1_to_acc:
		ld	ix,W1
		j	move_to_acc
;set distination address.........
move_to_w1:
		ld	iy,W1
		j	move_9byte
move_to_w2:
		ld	iy,W2
		j	move_9byte
move_to_w3:
		ld	iy,W3
		j	move_9byte
move_to_ten:
		ld	iy,TENKEY
		j	move_9byte
move_to_const:
		ld	iy,CONST
		j	move_9byte
move_to_acc:
		ld	iy,ACC
		j	move_9byte
;others..........................
ten_to_euro1:
		ld	ix,TENKEY
		ld	iy,EURO_RATE1
		j	move_9byte	
ten_to_euro2:
		ld	ix,TENKEY
		ld	iy,EURO_RATE2
		j	move_9byte
euro1_to_ten:
		push	wa
	ld	wa,F_COUNTRY1
	set	(F_COUNTRY1>>4).a
		pop	wa
		ld	ix,EURO_RATE1
		ld	iy,TENKEY
		j	move_9byte	
euro2_to_ten:
		push	wa
	ld	wa,F_COUNTRY2
	set	(F_COUNTRY2>>4).a
		pop	wa
		ld	ix,EURO_RATE2
		ld	iy,TENKEY
		j	move_9byte
w2_to_euro1:
		ld	ix,W2
		ld	iy,EURO_RATE1
		j	move_9byte
w2_to_euro2:
		ld	ix,W2
		ld	iy,EURO_RATE2
		j	move_9byte
w2_to_tax:
		ld	ix,W2
		ld	iy,TAXRT
		j	move_9byte
w2_to_tax2:
		ld	ix,W2
		ld	iy,TAX2RT
		j	move_9byte
w2_to_cost:
		ld	ix,W2
		ld	iy,COST
		j	move_9byte
w2_to_sell:
		ld	ix,W2
		ld	iy,SELL
		j	move_9byte
w2_to_marg:
		ld	ix,W2
		ld	iy,MARG
		j	move_9byte
 dt_to_prn:
;V4.03 		ld	ix,DT_BUF
;V4.03 		ld	iy,PRN_BUF
;V4.03 		j	move_9byte
 prn_to_dt:
;V4.03 		ld	ix,PRN_BUF
;V4.03 		ld	iy,DT_BUF
;V4.03 		j	move_9byte

w1_to_w4:
		ld	ix,W1
		ld	iy,W4
		jp	move_9byte	
w1_to_ftemp:
;V4.11		ld	ix,W1
;V4.11		ld	iy,FN_TEMP
;V4.11		jp	move_9byte	
ftemp_to_w2:
;V4.11		ld	ix,FN_TEMP
;V4.11		ld	iy,W2
;V4.11		jp	move_9byte
w4_to_w1:
		ld	ix,W4
		ld	iy,W1
		jp	move_9byte
w2_to_w4:
		ld	ix,W2
		ld	iy,W4
		jp	move_9byte
w4_to_w2:
		ld	ix,W4
		ld	iy,W2
		jp	move_9byte

move_9byte:
		ld	c,9-1			;move 9bytes
move_nb0:	
		ld	a,(ix)
		ld	(iy),a
		inc	ix
		inc	iy
		dec	c
		j	f,move_nb0		;reg.c is not 0xff?  yes->
		ret
;---------------------------------------
w1_round:
	ld	hl,W1
	jp	wreg_round
	;------------------------------
w2_round:
	ld	hl,W2
	;------------------------------
wreg_round:
	call	wk_round
	ret
	;------------------------------
w1_round_print:
	call	w1_round
w1_print:
	ld	hl,W1
	jp	wreg_print
	;------------------------------
w2_round_print:
	call	w2_round
w2_print:
	ld	hl,W2
	;------------------------------
	;==============================
wreg_print:
	call	wk_print
	ret
;==============================================================================
;	 Exchange work register  use register:  ix, iy, c, a, b
;==============================================================================
exchg_w12:
		ld	ix,W1
		ld	iy,W2
		j	exchg_9byte
exchg_9byte:
		ld	c,9-1			;move 9bytes
exchg_nb0:	
		ld	a,(ix)
		ld	b,(iy)
		ld	(ix),b
		ld	(iy),a
		inc	ix
		inc	iy
		dec	c
		j	f,exchg_nb0		;reg.c is not 0xff?  yes->
		ret

;==============================================================================
;	ADD mode
;==============================================================================
;W2 shift to right(shift DP_POS times)
;ignore when not enter tenkey
;ignore when enter tenkey with DP
add_mode:
	ld	wa,SW_A
	test	(SW_A>>4).a		;bit -reverse-> jump status