📄 eeprom.lst
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0000011C FD0000 R +0 853 853 call ee_read ;16bit data read into bc
0000011F E641 +0 854 854 pop w ;V1.05
00000121 EA8F +0 855 855 cmp bc,de ;the data read (bc) is same as write (de)
00000123 D80F +0 856 856 j eq,ee_write9
00000125 +0 857 857 ee_write5:
00000125 29 +0 858 858 dec w ; if compare the data is different,double sure by retry write--read 3 times
00000126 D805 +0 859 859 j eq,ee_write8 ;
00000128 EA49 +0 860 860 ld bc,de ;resume de to bc
0000012A FE0000 R +0 861 861 jp ee_write_x ;
0000012D +0 862 862 ee_write8:
0000012D 480000 R +0 863 863 ld wa,EP_FAIL
00000130 E10000F2 R +0 864 864 set (EP_FAIL>>4).a
00000134 +0 865 865 ee_write9:
00000134 E10000CC R +0 866 866 clr (FLG_2).4
00000138 FA +0 867 867 ret
+0 868 868 ;===========================================================
+0 869 869
+0 870 870 ;===========================================================
00000139 +0 871 871 ee_read:
00000139 E10000C4 R +0 872 872 set (FLG_2).4
0000013D F10000F91E R +0 873 873 ld (EP_TIM),EETIM
00000142 +0 874 874 ee_read_0:
00000142 C500 R +0 875 875 set (P0CR).EP_DIO ;as output port
00000144 CD00 R +0 876 876 clr (P0DR).EP_DIO ;
00000146 00 +0 877 877 nop ;V1.34
00000147 00 +0 878 878 nop ;V1.34
00000148 00 +0 879 879 nop ;V1.34
00000149 C700 R +0 880 880 set (P0DR).EP_CS
0000014B FD0000 R +0 881 881 call ee_wait_10_nop ;V1.34
0000014E FD0000 R +0 882 882 call high_out ;start bit output
00000151 E1000040 R +0 883 883 ld a,(EP_ADDR) ;
00000155 643F +0 884 884 and a,0y00111111 ;address from 0~63
00000157 6680 +0 885 885 or a,0y10000000 ;instruction read from EEPROM: 10xxxxxx
00000159 FD0000 R +0 886 886 call data_out ;output read instruction and address
0000015C CD00 R +0 887 887 clr (P0DR).EP_DIO
0000015E 00 +0 888 888 nop ;V1.34
0000015F 00 +0 889 889 nop ;V1.34
00000160 00 +0 890 890 nop ;V1.34
00000161 CD00 R +0 891 891 clr (P0CR).EP_DIO ;P17 as inupt port
00000163 C500 R +0 892 892 set (P0DR).EP_DIO
00000165 FD0000 R +0 893 893 call data_in ;16bit data readed from EEEPROM and save in b,c
00000168 43 +0 894 894 ld b,a ;D8~D15 saved in regiser c
00000169 FD0000 R +0 895 895 call data_in
0000016C 42 +0 896 896 ld c,a ;D0~D7 saved inregister b
0000016D CF00 R +0 897 897 clr (P0DR).EP_CS
0000016F FD0000 R +0 898 898 call ee_wait_10_nop ;V1.34
+0 899 899 ;read one time again
00000172 C500 R +0 900 900 set (P0CR).EP_DIO ;as output port
00000174 CD00 R +0 901 901 clr (P0DR).EP_DIO ;
00000176 00 +0 902 902 nop ;V1.34
00000177 00 +0 903 903 nop ;V1.34
00000178 00 +0 904 904 nop ;V1.34
00000179 C700 R +0 905 905 set (P0DR).EP_CS
0000017B FD0000 R +0 906 906 call ee_wait_10_nop ;V1.34
0000017E FD0000 R +0 907 907 call high_out
00000181 E1000040 R +0 908 908 ld a,(EP_ADDR)
00000185 643F +0 909 909 and a,0y00111111
00000187 6680 +0 910 910 or a,0y10000000
00000189 FD0000 R +0 911 911 call data_out
0000018C CD00 R +0 912 912 clr (P0DR).EP_DIO
0000018E 00 +0 913 913 nop ;V1.34
0000018F 00 +0 914 914 nop ;v1.34
00000190 00 +0 915 915 nop ;V1.34
00000191 CD00 R +0 916 916 clr (P0CR).EP_DIO ;P17 as inupt port
00000193 C500 R +0 917 917 set (P0DR).EP_DIO
00000195 FD0000 R +0 918 918 call data_in
00000198 45 +0 919 919 ld d,a ;D8~D15
00000199 FD0000 R +0 920 920 call data_in
0000019C 44 +0 921 921 ld e,a ;D0~D7
0000019D E997 +0 922 922 cmp de,bc
0000019F D90E +0 923 923 j ne,ee_read_err
000001A1 CF00 R +0 924 924 clr (P0DR).EP_CS
000001A3 00 +0 925 925 nop ;V1.34
000001A4 00 +0 926 926 nop ;V1.34
000001A5 00 +0 927 927 nop ;v1.34
000001A6 C500 R +0 928 928 set (P0CR).EP_DIO ;as output port
000001A8 CD00 R +0 929 929 clr (P0DR).EP_DIO ;
000001AA E10000CC R +0 930 930 clr (FLG_2).4
000001AE FA +0 931 931 ret
000001AF +0 932 932 ee_read_err:
000001AF CF00 R +0 933 933 clr (P0DR).EP_CS
000001B1 E1000040 R +0 934 934 ld a,(EP_TIM)
000001B5 D98B +0 935 935 j ne,ee_read_0
000001B7 480000 R +0 936 936 ld wa,EP_FAIL
000001BA E10000F2 R +0 937 937 set (EP_FAIL>>4).a
000001BE E10000CC R +0 938 938 clr (FLG_2).4
000001C2 FA +0 939 939 ret
+0 940 940
+0 941 941 ;===============================================================
000001C3 +0 942 942 eeprom_check: ;read the data from EEPROM (00h) and (3fh), and compare with check_code
+0 943 943 ;
000001C3 F10000F900 R +0 944 944 ld (EP_ADDR),EE_TEST1 ;check the data in EEPROM register (0000h)
000001C8 FD0000 R +0 945 945 call ee_read
000001CB E100008F R +0 946 946 cmp bc,(check_code)
000001CF D910 +0 947 947 j ne,eeprom_err
000001D1 F10000F93E R +0 948 948 ld (EP_ADDR),EE_TEST2 ;check the data in EEPROM register(003fh)
000001D6 FD0000 R +0 949 949 call ee_read
000001D9 E100008F R +0 950 950 cmp bc,(check_code)
000001DD D902 +0 951 951 j ne,eeprom_err
000001DF 04 +0 952 952 clr cf ;clear cf indicate EEPROM check succeed
000001E0 FA +0 953 953 ret
000001E1 +0 954 954 eeprom_err:
000001E1 05 +0 955 955 set cf ;set cf indicate EEPROM check fail
000001E2 FA +0 956 956 ret
+0 957 957
+0 958 958 ;====================================================================
000001E3 +0 959 959 ee_to_euro1:
000001E3 4B0000 R +0 960 960 ld hl,EURO_RATE1+OFF_MSD
000001E6 FE0000 R +0 961 961 jp ee_to_euro
000001E9 +0 962 962 ee_to_euro2:
000001E9 4B0000 R +0 963 963 ld hl,EURO_RATE2+OFF_MSD
000001EC +0 964 964 ee_to_euro:
000001EC 1904 +0 965 965 ld w,RATE_L
000001EE E8F2 +0 966 966 mul w,a
000001F0 04 +0 967 967 clr cf
000001F1 6102 +0 968 968 add a,EE_EU1
000001F3 F1000078 R +0 969 969 ld (EP_ADDR),a
+0 970 970
000001F7 FE0000 R +0 971 971 jp ee_to_wkreg
000001FA +0 972 972 ee_to_tax:
000001FA F10000F936 R +0 973 973 ld (EP_ADDR),EE_TAX
000001FF 4B0000 R +0 974 974 ld hl,TAXRT+OFF_MSD
00000202 FE0000 R +0 975 975 jp ee_to_wkreg
+0 976 976
00000205 +0 977 977 ee_to_tax2:
00000205 F10000F93A R +0 978 978 ld (EP_ADDR),EE_TAX2
0000020A 4B0000 R +0 979 979 ld hl,TAX2RT+OFF_MSD
0000020D FE0000 R +0 980 980 jp ee_to_wkreg
00000210 +0 981 981 ee_to_ten: ;
00000210 1904 +0 982 982 ld w,RATE_L ;
00000212 E8F2 +0 983 983 mul w,a ;
00000214 04 +0 984 984 clr cf ;
00000215 6102 +0 985 985 add a,EE_EU1 ;
00000217 F1000078 R +0 986 986 ld (EP_ADDR),a ;
0000021B FD0000 R +0 987 987 call ten_clear
0000021E 4B0000 R +0 988 988 ld hl,TENKEY+1 ;TEN_MSD
+0 989 989 ;====================================================================
+0 990 990 ;read 8bytes data from EEPROM-->(hl)-->work register buffer
+0 991 991 ;====================================================================
00000221 +0 992 992 ee_to_wkreg:
00000221 480000 R +0 993 993 ld wa,EP_FAIL
00000224 E10000FC R +0 994 994 test (EP_FAIL>>4).a ;bit -reverse-> jump status
00000228 80 +0 995 995 j t,ee_to_wkreg_ok ;if jump status is 1 -> branch
00000229 FA +0 996 996 ret
0000022A +0 997 997 ee_to_wkreg_ok:
0000022A 1D00 +0 998 998 ld d,0
0000022C 1C04 +0 999 999 ld e,RATE_L ;4 word read
0000022E +0 1000 1000 ee_to_wkreg0:
0000022E 52 +0 1001 1001 push de ;backup de register
0000022F FD0000 R +0 1002 1002 call ee_read ;EPROM-->bc
00000232 D2 +0 1003 1003 pop de ;popout de register
00000233 E948 +0 1004 1004 ld wa,bc ;backup bc
00000235 ED42 +0 1005 1005 ld c,d ;pointer for wk buffer-->c
00000237 F779 +0 1006 1006 ld (hl+c),w ;\
00000239 25 +0 1007 1007 inc d ;|wa-->wk buffer
0000023A 22 +0 1008 1008 inc c
0000023B F778 +0 1009 1009 ld (hl+c),a ;|increase d point to next buffer
0000023D 25 +0 1010 1010 inc d ;/
0000023E E10000F0 R +0 1011 1011 inc (EP_ADDR)
00000242 2C +0 1012 1012 dec e
00000243 D9E9 +0 1013 1013 j ne,ee_to_wkreg0 ;finished 8byte read and save into buffer
+0 1014 1014 ;------------adjust wk bufer data is available? digit not over 9, decimal not over 14
00000245 1A00 +0 1015 1015 ld c,0
00000247 +0 1016 1016 ee_to_wreg1:
00000247 E740 +0 1017 1017 ld a,(hl+c)
00000249 41 +0 1018 1018 ld w,a ;backup a into w
0000024A 64F0 +0 1019 1019 and a,0xf0
0000024C 67A0 +0 1020 1020 cmp a,0xa0
0000024E DA03 +0 1021 1021 j lt,ee_to_wreg1_1
00000250 E9640F +0 1022 1022 and w,0x0f ;up nibble cleared to "0"
00000253 +0 1023 1023 ee_to_wreg1_1:
00000253 11 ⌨️ 快捷键说明
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