📄 basic_fn.asm
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;V3.01 ld a,(DT_BUF_LSD) ;V1.06
;V3.01 and a,0x0f ;V1.06
;V3.01 cmp a,C_DP ;V1.06
;V3.01 j eq,dp_key_09 ;V1.06
;V3.01 cmp (DT_DOT_CNT),4 ;V1.06
;V3.01 j ge,dp_key_09 ;V1.06
;V3.01 cmp (DT_CHR_CNT),2 ;V1.06
;V3.01 j ge,dp_key_08 ;V1.06
;V3.01 ld hl,DT_BUF ;V1.06
;V3.01 call stg_sfl49 ;V1.06
;V3.01 ld a,(DT_BUF_LSD) ;V1.06
;V3.01 swap a ;V1.06
;V3.01 cmp (DT_DOT_CNT),0 ;V1.06
;V3.01 j ne,dp_key_07 ;V1.06
;V3.01 or a,0xc0 ;V1.06 dot replace "0"
dp_key_07: ;V1.24
;V3.01 or a,0xd0 ;V1.24 "D" replace "0", will be return to 0 when print
dp_key_071: ;V1.24
;V3.01 ld (DT_BUF_LSD),a ;V1.06
;V3.01 inc (DT_CT) ;V1.06
dp_key_08: ;V1.06
inc (DT_DOT_CNT) ;V1.06
dp_key_080: ;V1.07
ld w,C_DP ;w <- DP character
call dt_update ;DT_BUF update for #/D print
dp_key_09:
ld (DT_CHR_CNT),0 ;V1.06
j tenkey_end
;===============================================================================
; GT
;===============================================================================
gt_key:
;V1.23
;V3.14 ld hl,IC_G
;V3.14 call ic_to_icbk ;V1.22
;V3.14 ld (SYM),S_SPC ;V1.26
;V3.14gt_ic_print: ;V1.24
;V3.14 call ic_print
;V3.14 call gt_to_w2
;V3.14 call w2_to_w4 ;V1.22 for average calc
;V3.14 call gt_clear ;yes -> GT function
;V3.14 @CLB (ICON_GT) ;V1.18
;V3.14 ld hl,W2
;V3.14 call wk_round ;W2(GT value) rounding
;V3.14 ld (SYM),S_GT
;V3.14 @BBS (SW_EUROS,gt_key_gt_to_stasta) ;V1.24
;V3.14 ld (SYM),S_STASTA ;V1.24
;V3.14gt_key_gt_to_stasta: ;V1.24
;V3.14 call wk_print ;W2 print
;V3.14 call feed_1 ;1 line feed
;V3.14 j gt_key_2
;V3.14gt_key_0:
;V3.14 ld hl,W2
;V3.14 ld (SYM),S_GS
;V3.14 call wk_print ;W2 print
;V3.14gt_key_2:
;V3.14 call w2_to_ten ;for display accumulator value(W2)
;V3.14 @SEB (F_FNEABL) ;V1.09
j function_end
;===============================================================================
; CE/C
;===============================================================================
ce_key:
ld wa,F_COUNTRY
clr (F_COUNTRY>>4).a
ld wa,EURO_PROG
clr (EURO_PROG>>4).a
ld wa,RATE_PROG
clr (RATE_PROG>>4).a
ld wa,F_TNKEY
test (F_TNKEY>>4).a ;bit -reverse-> jump status
j f,ce_key_start ;if jump status is 0 -> branch
ld wa,F_RATE
test (F_RATE>>4).a ;bit -reverse-> jump status
j f,ce_key_start ;if jump status is 0 -> branch
test (FLG_MODE).2
j t,ce_key_x
call ten_zerock ;V4.12
j nz,ce_key_x ;V4.12
test (TEN_S).0 ;V4.12
j f,ce_key_start ;V4.12
ce_key_x: ;V4.12
ld a,(PRE_KEY) ;V1.30
ld (KEYIN),a ;V1.30
jp no_operation ;V1.30
ce_key_start:
ld (KEYIN),K_CE ;V1.13
jp cec_key_yyy ;V1.13
cec_key:
ld wa,F_COUNTRY
clr (F_COUNTRY>>4).a
ld wa,SW_AC
test (SW_AC>>4).a ;bit -reverse-> jump status
j f,cec_key_0 ;if jump status is 0 -> branch
ld wa,F_TNKEY
test (F_TNKEY>>4).a ;bit -reverse-> jump status
j t,cec_key_0 ;if jump status is 1 -> branch
cec_key_yyy: ;V1.13
ld (DT_CHR_CNT),0 ;V1.31
call ten_clear ;clear key entry only
call spc_dt ;clear #/D key buffer
j cec_key_2 ;-> function_end
;clear function.........
cec_key_0:
call work_clear_acc ; no h/w initialize
ld hl,ACC
ld (SYM),S_CLR
call wk_print ;accumulator value(zero) print
call feed_1 ;1 line feed
ld wa,IC_PROG
clr (IC_PROG>>4).a
jp function_end ;V1.10
cec_key_2:
;V4.01 @CLB (IC_PROG) ;V1.23
j function_end_0
all_clear:
;h/w initialize...........
ld wa,IO_MT
test (IO_MT>>4).a ;bit -reverse-> jump status
j f,all_clear ;if jump status is 0 -> branch
;V4.01 @CLB (IC_PROG) ;V1.23
call init_vft ;V2.01
di
call init_io ;IO initialize
;V3.00 call init_pf ;initialize Timer3 for power failure detection
call init_scan ;initialize Timer4 for key scan
ei ;interrupt enable
;work area clear..........
work_clear_acc:
call acc_clear
work_clear:
call ten_clear
call spc_dt ;clear #/D key buffer
;V3.00 call fn_register_clear ;V1.13
;V3.00 ld (FINANCE_0),0 ;V1.09
;V3.00 ld (FINANCE_1),0 ;V1.09
ld (FLG_E),0y00000000 ;clear calculate instruction flag
ld (FLG_C),0y00000000 ;clear constant calculation flag
ret
;===============================================================================
; -
;===============================================================================
acc_minus:
;V4.01 @BBS (IC_PROG,set_ic_minus_key) ;V1.23 for V15 logic
;V4.01 cmp (PRE_KEY),K_M2CAL ;V1.22\
;V4.01 j ne,acc_minus_start ;V1.22|for [M2-]
;V4.01 ld (KEYIN),K_M2MI ;V1.22|
;V4.01 jp mem2_minus ;v1.22/
acc_minus_start: ;V1.22
;V3.00 @BBC (SW_V15,acc_minus_x) ;V1.19\
;V3.00 cmp (PRE_KEY),K_TAX ;V1.19|
;V3.00 j ne,acc_minus_x ;V1.19|
;V3.00 @BBC (M_TX2,acc_minus_tx1) ;V1.19|for V15 tax[-]
;V3.00 @BBC (M_TX1,acc_minus_tx0) ;V2.07
;V3.00 ld (KEYIN),K_TX12M ;V2.07
;V3.00 jp tax12_minus ;V2.07
;V3.00acc_minus_tx0:
;V3.00 ld (KEYIN),K_TX2M ;V1.19|
;V3.00 jp tax_minus_a ;V2.18
;V3.00acc_minus_tx1: ;V1.19|
;V3.00 ld (KEYIN),K_TXM ;V1.19|
;V3.00 jp tax_minus_a ;V1.19/v2.19
;------------------------------------------------------above for V15 logic
acc_minus_x:
ld wa,EURO_PROG
test (EURO_PROG>>4).a ;bit -reverse-> jump status
j f,eurate_minus_key ;if jump status is 0 -> branch
ld wa,RATE_PROG
test (RATE_PROG>>4).a ;bit -reverse-> jump status
j f,no_operation ;if jump status is 0 -> branch
acc_minus_y: ;V1.16
;V4.01 @BBC (SW_SGT,acc_minus_z) ;V1.25
acc_minus_z:
ld wa,F_MIN_TRA
set (F_MIN_TRA>>4).a
;V4.13 jp acc_plus_x ;V1.31
;===============================================================================
; +
;===============================================================================
acc_plus:
;V4.01 @BBS (IC_PROG,set_ic_plus_key) ;V1.23
;V4.01 cmp (PRE_KEY),K_M2CAL ;V1.22\
;V4.01 j ne,acc_plus_start ;V1.22|for [M2+]
;V4.01 ld (KEYIN),K_M2PL ;V1.22|
;V4.01 jp mem2_plus ;v1.22/
acc_plus_start: ;V1.22
;V3.00 @BBC (SW_V15,acc_plus_x) ;V1.19\
;V3.00 cmp (PRE_KEY),K_TAX ;V1.19| wait for [+] or [-] for [TAX+] or [TAX-] function
;V3.00 j ne,acc_plus_x ;V1.19|
;V3.00 @BBC (M_TX2,acc_plus_tx1) ;V1.19|
;V3.00 @BBC (M_TX1,acc_plus_tx0) ;V2.07
;V3.00 ld (KEYIN),K_TX12P ;V2.07
;V3.00 jp tax12_plus ;V2.07
;V3.00acc_plus_tx0:
;V3.00 ld (KEYIN),K_TX2P ;V1.19|
;V3.00 jp tax_plus_a ;V1.19|
;V3.00acc_plus_tx1: ;V1.19|
;V3.00 ld (KEYIN),K_TXP ;V1.19|
;V3.00 jp tax_plus_a ;V1.19/v2.19
;V2.19 jp tax_plus_x ;V2.18
;------------------------------------------------------- above for V15 logic
acc_plus_x: ;V1.19
;V4.12 @BBS (EURO_PROG,eurate_plus_key) ;\is euro rate setting mode?
ld wa,RATE_PROG
test (RATE_PROG>>4).a ;bit -reverse-> jump status
j f,no_operation ;if jump status is 0 -> branch
acc_plus_y: ;V1.16
;V4.01 @BBC (SW_SGT,acc_plus01) ;V1.17 [+]/[-] have function for [+=]/[-=]?
;-------------------------------------------------------------------
acc_plus_z:
;V4.01 ld a,(FLG_E) ;V1.17
;V4.01 and a,0y00000011 ;V1.17check E_MUL,E_DIV flags
;V4.01 j nz,acc_plus000 ;V1.17
;V4.01 @BBS (F_PEREXE,acc_plus01) ;V1.24
;V4.01 @BBC (SW_SGK,acc_plus01) ;V1.19
;V4.01 ld a,(FLG_C) ;V1.19
;V4.01 and a,0y00000011 ;V1.19
;V4.01 j z,acc_plus01 ;V1.19
;V4.01acc_plus000:
;V4.01 @BBC (E_MUP,acc_plus00001) ;V1.24
;V4.01 call equal_mup ;V1.24
;V4.01 jp acc_plus00099 ;V1.24
;V4.01acc_plus00001: ;V1.24
;V4.01 @BBC (E_DLT,acc_plus00002) ;V1.24
;V4.01 call equal_dlt ;V1.24
;V4.01 jp acc_plus00099 ;V1.24
;V4.01acc_plus00002: ;v1.24
;V4.01 call equal_sub ;V1.17
;V4.01 ld (FLG_C),0
;V4.01acc_plus00099:
;V4.01 @BBS (F_CALER,acc_plus29) ;V1.17if error occured? yes->
;V4.01 @SEB (FEED_REQ) ;V1.27
;V4.01 call w1_to_w2 ;V1.17
;V4.01 call w2_to_ten ;V1.17
acc_plus01: ;V1.17
ld wa,F_TNKEY
test (F_TNKEY>>4).a ;bit -reverse-> jump status
j f,acc_plus02 ;if jump status is 0 -> branch
;check %+/- operation........
cmp (PRE_KEY),K_PER ;if previouse key is % ?
j ne,acc_plus00 ;no ->
ld wa,C_MUL
test (C_MUL>>4).a ;bit -reverse-> jump status
j f,acc_plus20 ;if jump status is 0 -> branch
acc_plus00:
;if no tenkey entry, check repeat entry........
cmp (PRE_KEY),K_PLS ;if previouse key is + ?
j eq,acc_plus10 ; yes -> use W2(previouse added value) for repeat entry
cmp (PRE_KEY),K_MIN ;if previouse key is - ?
j eq,acc_plus10 ; yes -> use W2(previouse added value) for repeat entry
acc_plus02:
;V1.05 call ten_to_w2dp ;tenkey -> W2 with DP adjustment
call add_mode ;W2 shift 2digit to right when select ADD mode
j cs,acc_plus03 ;V105 add mode ? yes->
call ten_to_w2dp ;V105 tenkey -> W2 with DP adjustment
;V3.14 call ten_to_w2 ;V3.12
acc_plus03: ;V105
j acc_plus11
acc_plus10:
ld hl,W2 ;DP adjustment for repeat entry
call dp_adjust ;adjustment DP location previouse accumulated value(in case of change DP slider)
acc_plus11:
ld (SYM),S_PLS
ld wa,F_MIN_TRA
test (F_MIN_TRA>>4).a ;bit -reverse-> jump status
j t,acc_plus12 ;if jump status is 1 -> branch
ld (SYM),S_MIN
acc_plus12:
ld hl,W2
call wk_print ;W2(input value) print
ld hl,ACC
call wk_update ;w2 contents add to ACC and increment item counter
ld wa,F_CALER
test (F_CALER>>4).a ;bit -reverse-> jump status
j f,acc_plus29 ;if jump status is 0 -> branch
ld hl,IC_A
call ic_update ;increment item counter
ld hl,W1 ;V3.05
call _zerock ;V3.05
j ne,acc_plus13 ;V3.05
ld (W1_S),0 ;V3.05
acc_plus13: ;V3.05
call w1_to_ten ;for display accumulated value(W1)
ld wa,FEED_REQ
test (FEED_REQ>>4).a ;bit -reverse-> jump status
j t,acc_plus29 ;if jump status is 1 -> branch
call feed_1 ;V1.27
ld wa,FEED_REQ
clr (FEED_REQ>>4).a
j acc_plus29
;percent +/- calculation........................
acc_plus20:
call const_to_w2 ;W2 <- multiplicand
call ten_to_w1
ld wa,F_MIN_TRA
test (F_MIN_TRA>>4).a ;bit -reverse-> jump status
j t,acc_plus21 ;if jump status is 1 -> branch
xor (W1_S),0x01 ;W1 sign change
acc_plus21:
call calc_add ;W1<- W1(calculated answer of %) + W2
ld wa,F_CALER
test (F_CALER>>4).a ;bit -reverse-> jump status
j f,acc_plus29 ;if jump status is 0 -> branch
ld hl,W1
call wk_round ;W1(answer) rounding
ld (SYM),S_PRAD
ld (KEYIN),K_PRP ;update current key code to +%(dummy key code)
ld wa,F_MIN_TRA
test (F_MIN_TRA>>4).a ;bit -reverse-> jump status
j t,acc_plus213 ;if jump status is 1 -> branch
ld (SYM),S_PRDS
ld (KEYIN),K_PRM ;update current key code to -%(dummy key code)
acc_plus213:
test (FLG_MODE).2
j f,acc_plus22
call _zerock ;V1.35
j ne,acc_plus22 ;V1.35
ld (W1_S),0 ;V1.35
acc_plus22:
ld wa,F_MIN_TRA
clr (F_MIN_TRA>>4).a
call wk_print ;W1(answer) print
call feed_1
call w1_to_ten ;for display calculated answer(W1)
acc_plus29:
ld (SYM),S_AST ;for error print
;V4.13 @BBC (SW_TA,acc_plus99) ;V1.39d
;V4.13 ld (FLG_C),0 ;V1.39d
acc_plus99: ;V1.39d
j function_end
;===============================================================================
; S
;===============================================================================
acc_subtl:
;V4.01 cmp (PRE_KEY),K_M2CAL ;V1.22
;V4.01 j ne,acc_subtl_start ;V1.22
;V4.01 ld (KEYIN),K_M2ST ;V1.22
;V4.01 jp mem2_subtl_start ;V1.22
acc_subtl_start: ;V1.22
;V3.00 @BBC (SW_V15,acc_subtl_nov1297) ;V2.05
;V3.00 @BBC (SW_TA,acc_subtl_nov1297) ;V2.05
;V3.00acc_subtl_start1:
;---------------------------------------------for V1297 mode
;V3.00 @BBC (F_TNKEY,acc_subtl_yuan) ;V1.26
;V3.00 ld (KEYIN),K_SHD ;V1.26
;V3.00 jp sharp_date ;V1.26
acc_subtl_yuan: ;V1.25
;V3.00 ld a,(FLG_E) ;V1.25
;V3.00 push wa
;V3.00 @BBC (SW_SGK,acc_subtl_nocont) ;V1.26
;V3.00 pop wa
;V3.00 or a,(FLG_C) ;V1.26
;V3.00 jp acc_subtl_nocont_1 ;V1.26
;V3.00acc_subtl_nocont: ;V1.26
;V3.00 pop wa ;V1.26
;V3.00acc_subtl_nocont_1: ;V1.26
;V3.00 and a,0y00001111 ;V1.26
;V3.00 j eq,acc_subtl_clear ;V1.25
;V3.00 call const_to_w2 ;V1.26
;V3.00 jp acc_subtl_clear_1 ;V1.26
;V3.00acc_subtl_clear: ;V1.26
;V3.00 call w2_clear ;V1.26
;V3.00acc_subtl_clear_1: ;V1.26
;V3.00 call w2_to_ten ;V1.26
;V3.00 ld (SYM),S_ST ;V1.26
;V3.00 ld hl,W2 ;V1.26
;V3.00 call wk_print ;V1.26
;V3.00 call feed_1 ;V1.25
;V3.00 @BBS (SW_SGK,acc_subtl_9) ;V1.31
;V3.00 and (FLG_C),0 ;V1.40
;V3.00 jp acc_subtl_9 ;V1.25
;----------------------------------------------------
acc_subtl_nov1297:
;V4.13 @BBC (SW_DTST,acc_subtl_x) ;V1.20
;V4.13 @BBC (F_TNKEY,acc_subtl_x) ;V1.33
;V2.10 ld a,(TEN_CT) ;V1.20\
;V2.10 j eq,acc_subtl_x ;V1.20|ten key entry, to do sharp date function
;V4.13 ld (KEYIN),K_SHD ;V1.20|
;V4.13 jp sharp_date ;V1.20/
acc_subtl_x: ;V1.20
;-----------------------------------------------below is for TA logic
;V3.00 @BBC (SW_TA,acc_subtl_y) ;V1.19
;V3.00 ld (FLG_C),0 ;V1.44
;V3.00 ld a,(FLG_E) ;V1.19
;V3.00 and a,0y00001111 ;V1.19check E_MUL,E_DIV,E_DLT,E_MU flags
;V3.00 j z,acc_subtl_y ;V1.19
;V3.00 @BBC (E_MUP,acc_subtl_x01) ;V1.24
;V3.00 call equal_mup ;V1.24
;V3.00 jp acc_subtl_x99 ;V1.24
;V3.00acc_subtl_x01: ;V1.24
;V3.00 @BBC (E_DLT,acc_subtl_x02) ;V1.24
;V3.00 call equal_dlt ;V1.24
;V3.00 jp acc_subtl_x99 ;V1.24
;V3.00acc_subtl_x02: ;v1.24
;V3.00 call equal_sub ;V1.19
;V3.00acc_subtl_x99:
;V3.00 ld (FLG_E),0 ;V1.24
;V3.00 ld (KEYIN),K_EQU ;V1.50
;V3.00 ld (FLG_C),0 ;V1.24
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