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📄 ram.lst

📁 calculator code ,use toshibaor nec LSI
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                                 +0  467    467 
0000025D                         +0  468    468 FLG_ICON	dsb	1			;for icon display of VFT
0000025E                         +0  469    469 FLG_ICON_1	dsb	1	;V1.46
                                 +0  470    470 
0000025F                         +0  471    471 VPRN		dsb	1
00000260                         +0  472    472 STB_BAK		dsb	2
00000262                         +0  473    473 PHASE_CT	dsb	1
00000263                         +0  474    474 STEP_CT		dsb	1
00000264                         +0  475    475 LINE_PTR	dsb	1
00000265                         +0  476    476 DOT_CT		dsb	1
00000266                         +0  477    477 DOT_LINE	dsb	36
0000028A                         +0  478    478 DIGIT_CT	dsb	1
0000028B                         +0  479    479 HD_TEMP		dsb	2
0000028D                         +0  480    480 STEP_BAK	dsb	2
0000028F                         +0  481    481 LINE_PTR_BK	dsb	1	;V4.03
                                 +0  482    482 ;/////////////// not clear these areas when resume from power failure ////////////////
                                 +0  483    483 
00000290                         +0  484    484 RAM_END:
                                 +0  485    485 
                                 +0  486    486 ;End of user RAM (0x081f)
                                 +0  487    487 ;	|
                                 +0  488    488 ;Stack area (at least keep 32bytes)
                                 +0  489    489 ;	|
                                 +0  490    490 ;End of RAM (0x043f) 
                                 +0  491    491 ;RAM_BOT		equ	0x083f ;this RAM size is for TMP86CM74A,TMP86CS25,TMP86CM25
  0000043F                       +0  492    492 RAM_BOT		equ	0x043f	;V2.24 this RAM size is for TMP86CM74A
                                 +0  493    493 ;Data Buffer Register for LCD....................
  00000F80                       +0  494    494 DBR_TOP		equ	0x0f80
                                 +0  495    495 ;	|
                                 +0  496    496 ;	|
  00000FA0                       +0  497    497 DBR_SEG		equ	0x0fa0
                                 +0  498    498 ;
                                 +0  499    499 ;
  00000FCF                       +0  500    500 DBR_BOT		equ	0x0fcf
                                 +0  501    501 ;V2.00MULSEL		equ	0x0fc0
                                 +0  502    502 ;V2.00STOPCR		equ	0x0f9a
                                 +0  503    503 ;==============================================================================
                                 +0  504    504 ;	RAM address equations
                                 +0  505    505 ;==============================================================================
                                 +0  506    506 ;Data structure of work memory...................
  00000007                       +0  507    507 LENG_WK		equ	7			;length of data resistor
  00000000                       +0  508    508 OFF_S		equ	0
  00000001                       +0  509    509 OFF_MSD		equ	1
  00000002                       +0  510    510 OFF_MSD12	equ	2			;in case of 12digit model
  00000003                       +0  511    511 OFF_MSD10	equ	3	;V1.21 in case of 10digit model
  00000007                       +0  512    512 OFF_LSD		equ	7
  00000008                       +0  513    513 OFF_DP		equ	8
                                 +0  514    514 ;
                                 +0  515    515 ;
                                 +0  516    516 ;Work register structure........................
                                 +0  517    517 ;
                                 +0  518    518 ;   e.g) -1234567.8901234
                                 +0  519    519 ;
                                 +0  520    520 ;	SGN  MSD - - - - - - - - - - - - - LSD  DP
                                 +0  521    521 ;	+0   +1   +2   +3   +4   +5   +6   +7   +8
                                 +0  522    522 ;       0 1  1 2  3 4  5 6  7 8  9 0  1 2  3 4  0 7
                                 +0  523    523 ;
  00000040                       +0  524    524 W1_S		equ	W1			;sign (bit0)
  00000041                       +0  525    525 W1_MSD		equ	W1+OFF_MSD		;14th-13th digit
  00000047                       +0  526    526 W1_LSD		equ	W1+OFF_LSD		;2nd-1st digit
  00000048                       +0  527    527 W1_DP		equ	W1+OFF_DP		;dp location
  00000049                       +0  528    528 W2_S		equ	W2			;
  0000004A                       +0  529    529 W2_MSD		equ	W2+OFF_MSD		;
  00000050                       +0  530    530 W2_LSD		equ	W2+OFF_LSD		;
  00000051                       +0  531    531 W2_DP		equ	W2+OFF_DP		;
  00000052                       +0  532    532 W3_S		equ	W3			;
  00000053                       +0  533    533 W3_MSD		equ	W3+OFF_MSD		;
  00000059                       +0  534    534 W3_LSD		equ	W3+OFF_LSD		;
  0000005A                       +0  535    535 W3_DP		equ	W3+OFF_DP		;
  0000005B                       +0  536    536 TEN_S		equ	TENKEY
  0000005C                       +0  537    537 TEN_MSD		equ	TENKEY+OFF_MSD
  00000062                       +0  538    538 TEN_LSD		equ	TENKEY+OFF_LSD
  00000063                       +0  539    539 TEN_DP		equ	TENKEY+OFF_DP
                                 +0  540    540 
  0000009F                       +0  541    541 MDSW_0		equ	MDSW+0
  000000A0                       +0  542    542 MDSW_1		equ	MDSW+1
  000000A1                       +0  543    543 MDSW_2		equ	MDSW+2
  000000A2                       +0  544    544 MDSW_3		equ	MDSW+3
                                 +0  545    545 
  000000A3                       +0  546    546 MDSW_01		equ	MDSW+4
  000000A4                       +0  547    547 MDSW_11		equ	MDSW+5
  000000A5                       +0  548    548 MDSW_21		equ	MDSW+6
                                 +0  549    549 
  000000B4                       +0  550    550 MDFLG_0		equ	MDFLG+0
  000000B5                       +0  551    551 MDFLG_1		equ	MDFLG+1
  000000B6                       +0  552    552 MDFLG_2		equ	MDFLG+2
  000000B7                       +0  553    553 MDFLG_3		equ	MDFLG+3
                                 +0  554    554 
  000000B8                       +0  555    555 MDFLG_01	equ	MDFLG+4
  000000B9                       +0  556    556 MDFLG_11	equ	MDFLG+5
  000000BA                       +0  557    557 MDFLG_21	equ	MDFLG+6
                                 +0  558    558 
  000000AD                       +0  559    559 MDFLG_RT0	equ	MDFLG_RT+0
  000000AE                       +0  560    560 MDFLG_RT1	equ	MDFLG_RT+1
  000000AF                       +0  561    561 MDFLG_RT2	equ	MDFLG_RT+2
  000000B0                       +0  562    562 MDFLG_RT3	equ	MDFLG_RT+3
                                 +0  563    563 
  000000B1                       +0  564    564 MDFLG_RT01	equ	MDFLG_RT+4
  000000B2                       +0  565    565 MDFLG_RT11	equ	MDFLG_RT+5
  000000B3                       +0  566    566 MDFLG_RT21	equ	MDFLG_RT+6
                                 +0  567    567 
                                 +0  568    568 ;Mode switch bit location............
                                 +0  569    569 ;	MDSW_01,MDSW_0
                                 +0  570    570 ;	bit -> 3  2   1   0    7   6   5   4   3   2   1   0
                                 +0  571    571 ;	       SG D14 V15 AM12 ADM DP6 DP5 DP4 DP3 DP2 DP1 DP0
                                 +0  572    572 
                                 +0  573    573 ;	MDSW_11,MDSW_1
                                 +0  574    574 ;	bit -> 3   2   1   0    7   6   5   4    3   2   1  0
                                 +0  575    575 ;	       SGG SGM SGT IC+- NCT OFF MGT EUTX DSP GT  UP 5/4 
                                 +0  576    576 
                                 +0  577    577 ;	MDSW_21,MDSW_2
                                 +0  578    578 ;	bit -> 3   2   1 0   7   6   5  4  3   2   1     0
                                 +0  579    579 ;	       FIN 24H   TA  DMY AMZ AC M2 CMP FED EUROS SGK  
                                 +0  580    580 ;
                                 +0  581    581 ;==============================================================================
                                 +0  582    582 ;	RAM flag bit equations
                                 +0  583    583 ;==============================================================================
                                 +0  584    584 ;
                                 +0  585    585 ;  flag equation contents -> aaaa aaaa aaaa 0bbb
                                 +0  586    586 ;                            --flag addr--   bit
                                 +0  587    587 ;
                                 +0  588    588 ;
  00000930                       +0  589    589 E_MUL		equ	(FLG_E<<4)+0
  00000931                       +0  590    590 E_DIV		equ	(FLG_E<<4)+1
  00000932                       +0  591    591 E_DLT		equ	(FLG_E<<4)+2
  00000933                       +0  592    592 E_MUP		equ	(FLG_E<<4)+3
  00000934                       +0  593    593 E_CST		equ	(FLG_E<<4)+4
  00000935                       +0  594    594 E_SEL		equ	(FLG_E<<4)+5
  00000936                       +0  595    595 E_MAR		equ	(FLG_E<<4)+6
  00000937                       +0  596    596 F_M2CAL		equ	(FLG_E<<4)+7
                                 +0  597    597 
  00000940                       +0  598    598 C_MUL		equ	(FLG_C<<4)+0
  00000941                       +0  599    599 C_DIV		equ	(FLG_C<<4)+1
  00000942                       +0  600    600 C_DLT		equ	(FLG_C<<4)+2
  00000943                       +0  601    601 C_MUP		equ	(FLG_C<<4)+3
  00000944                       +0  602    602 C_CST		equ	(FLG_C<<4)+4
  00000945                       +0  603    603 C_SEL		equ	(FLG_C<<4)+5
  00000946                       +0  604    604 C_MAR		equ	(FLG_C<<4)+6
  00000947                       +0  605    605 CSM_RECALL	equ	(FLG_C<<4)+7
                                 +0  606    606 
  00000950                       +0  607    607 F_CALER		equ	(FLG_1<<4)+0	;calculation error
  00000951                       +0  608    608 F_ZDIVER	equ	(FLG_1<<4)+1	;0 divided error
  00000952                       +0  609    609 F_PERCAL	equ	(FLG_1<<4)+2	;shift 2 DP for % calculation
  00000953                       +0  610    610 F_MIN_TRA	equ	(FLG_1<<4)+3	;minus tranzaction (-, M- M2-)
  00000954                       +0  611    611 F_DPIN		equ	(FLG_1<<4)+4	;DP key entered
  00000955                       +0  612    612 F_OFF		equ	(FLG_1<<4)+5	;off mode
  00000956                       +0  613    613 F_RATE		equ	(FLG_1<<4)+6	;rate setting mode
  00000957                       +0  614    614 F_RTUPD		equ	(FLG_1<<4)+7	;new tax rate entry in rate set mode
                                 +0  615    615 
  00000960                       +0  616    616 MEQ_ENB		equ	(FLG_2<<4)+0	;M+=/M-= enable for after calculation error 
  00000961                       +0  617    617 ERR_MES		equ	(FLG_2<<4)+1	;already print error message (for NP->PRN, FEED key) 
  00000962                       +0  618    618 ERR_CLR		equ	(FLG_2<<4)+2	;just after clear calculation error 
  00000963                       +0  619    619 EP_FAIL		equ	(FLG_2<<4)+3	;EEPROM fail flag
  00000964                       +0  620    620 EP_ACCES	equ	(FLG_2<<4)+4	;EEPROM busy flag
  00000965                       +0  621    621 RATE_PROG	equ	(FLG_2<<4)+5	;indicate enter into rate setting mode
  00000966                       +0  622    622 EURO_PROG	equ	(FLG_2<<4)+6	;indicate enter into euro rate setting mode
  00000967                       +0  623    623 IC_PROG		equ	(FLG_2<<4)+7		;used for view euro rate "by" + or "-"
                                 +0  624    624 

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