📄 business_fn.lst
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00000213 E00007 R +0 864 864 cmp a,(TEN_CT)
00000216 DB09 +0 865 865 j ge,keep_ten_6dig_0
00000218 22 +0 866 866 inc c
00000219 EA6708 +0 867 867 cmp c,8
0000021C DB03 +0 868 868 j ge,keep_ten_6dig_0
0000021E FE0000 R +0 869 869 jp keep_ten_6dig_x
00000221 +0 870 870 keep_ten_6dig_0:
00000221 070006 R +0 871 871 cmp (TEN_CT),6
00000224 DA22 +0 872 872 j lt,to_inc_ten_digit
00000226 +0 873 873 to_dec_ten_digit:
00000226 070007 R +0 874 874 cmp (TEN_CT),7
00000229 DA30 +0 875 875 j lt,keep_ten_6dig_end
0000022B DD0D +0 876 876 j gt,to_dec_ten_digit_1
0000022D 070006 R +0 877 877 cmp (TEN_DP),6
00000230 D908 +0 878 878 j ne,to_dec_ten_digit_1
00000232 4B0000 R +0 879 879 ld hl,TENKEY+1
00000235 FD0000 R +0 880 880 call test_zero_before_dp
00000238 DB21 +0 881 881 j cc,keep_ten_6dig_end
0000023A +0 882 882 to_dec_ten_digit_1:
0000023A 4B0000 R +0 883 883 ld hl,TENKEY
0000023D FD0000 R +0 884 884 call stg_sfr47
00000240 E000F8 R +0 885 885 dec (TENKEY+8)
00000243 E000F8 R +0 886 886 dec (TEN_CT)
00000246 DDDE +0 887 887 j gt,to_dec_ten_digit
+0 888 888
00000248 +0 889 889 to_inc_ten_digit:
00000248 070006 R +0 890 890 cmp (TEN_CT),6
0000024B DB0E +0 891 891 j ge,keep_ten_6dig_end
0000024D 4B0000 R +0 892 892 ld hl,TENKEY
00000250 FD0000 R +0 893 893 call stg_sfl47
00000253 E000F0 R +0 894 894 inc (TENKEY+8)
00000256 E000F0 R +0 895 895 inc (TEN_CT)
00000259 FCED +0 896 896 j to_inc_ten_digit
+0 897 897
0000025B +0 898 898 keep_ten_6dig_end:
0000025B FA +0 899 899 ret
+0 900 900 ;-----------------------------------------
0000025C +0 901 901 test_zero_before_dp:
0000025C 1A00 +0 902 902 ld c,0
0000025E 190E +0 903 903 ld w,14
00000260 +0 904 904 test_zero_before_dp_s:
00000260 E740 +0 905 905 ld a,(hl+c)
00000262 64F0 +0 906 906 and a,0xf0
00000264 D918 +0 907 907 j ne,test_zero_before_dp_1
00000266 29 +0 908 908 dec w
00000267 D7000F R +0 909 909 cmp w,(hl+OFF_DP-1)
0000026A D810 +0 910 910 j eq,test_zero_before_dp_0
0000026C E740 +0 911 911 ld a,(hl+c)
0000026E 640F +0 912 912 and a,0x0f
00000270 D90C +0 913 913 j ne,test_zero_before_dp_1
00000272 29 +0 914 914 dec w
00000273 D7000F R +0 915 915 cmp w,(hl+OFF_DP-1)
00000276 D804 +0 916 916 j eq,test_zero_before_dp_0
00000278 22 +0 917 917 inc c
00000279 FE0000 R +0 918 918 jp test_zero_before_dp_s
0000027C +0 919 919 test_zero_before_dp_0:
0000027C 04 +0 920 920 clr cf
0000027D FA +0 921 921 ret
0000027E +0 922 922 test_zero_before_dp_1:
0000027E 05 +0 923 923 set cf
0000027F FA +0 924 924 ret
+0 925 925 ;-----------------------------------------
+0 926 926 ;V2.08
00000280 +0 927 927 check_dp_over_slid:
00000280 D70040 R +0 928 928 ld a,(hl+OFF_DP)
00000283 E00007 R +0 929 929 cmp a,(DP_POS)
00000286 +0 930 930 check_dp_over_slid_0:
00000286 DB27 +0 931 931 j ge,check_dp_over_slid_end
00000288 D70045 R +0 932 932 ld d,(hl+OFF_MSD)
0000028B 480000 R +0 933 933 ld wa,M14
0000028E E10000FC R +0 934 934 test (M14>>4).a ;bit -reverse-> jump status
00000292 AD +0 935 935 j f,check_dp_over_slid_1 ;if jump status is 0 -> branch
00000293 D70045 R +0 936 936 ld d,(hl+OFF_MSD12) ;V1.21
00000296 480000 R +0 937 937 ld wa,M10
00000299 E10000FC R +0 938 938 test (M10>>4).a ;bit -reverse-> jump status
0000029D 82 +0 939 939 j t,check_dp_over_slid_1 ;if jump status is 1 -> branch
0000029E D70045 R +0 940 940 ld d,(hl+OFF_MSD10) ;V1.21
000002A1 +0 941 941 check_dp_over_slid_1: ;V1.21
000002A1 ED64F0 +0 942 942 and d,0xf0
000002A4 D909 +0 943 943 j nz,check_dp_over_slid_end
000002A6 D700F0 R +0 944 944 inc (hl+OFF_DP)
000002A9 FD0000 R +0 945 945 call stg_sfl47
000002AC FE0000 R +0 946 946 jp check_dp_over_slid
000002AF +0 947 947 check_dp_over_slid_end:
000002AF FA +0 948 948 ret
+0 949 949 ;V2.08
+0 950 950 ;=================================
000002B0 +0 951 951 check_dp_over2:
000002B0 D7006702 R +0 952 952 cmp (hl+OFF_DP),2
000002B4 +0 953 953 check_dp_over2_0:
000002B4 DB27 +0 954 954 j ge,check_dp_over2_end
000002B6 D70045 R +0 955 955 ld d,(hl+OFF_MSD)
000002B9 480000 R +0 956 956 ld wa,M14
000002BC E10000FC R +0 957 957 test (M14>>4).a ;bit -reverse-> jump status
000002C0 AD +0 958 958 j f,check_dp_over2_1 ;if jump status is 0 -> branch
000002C1 D70045 R +0 959 959 ld d,(hl+OFF_MSD12) ;V1.21
000002C4 480000 R +0 960 960 ld wa,M10
000002C7 E10000FC R +0 961 961 test (M10>>4).a ;bit -reverse-> jump status
000002CB 82 +0 962 962 j t,check_dp_over2_1 ;if jump status is 1 -> branch
000002CC D70045 R +0 963 963 ld d,(hl+OFF_MSD10) ;V1.21
000002CF +0 964 964 check_dp_over2_1: ;V1.21
000002CF ED64F0 +0 965 965 and d,0xf0
000002D2 D909 +0 966 966 j nz,check_dp_over2_end
000002D4 D700F0 R +0 967 967 inc (hl+OFF_DP)
000002D7 FD0000 R +0 968 968 call stg_sfl47
000002DA FE0000 R +0 969 969 jp check_dp_over2
000002DD +0 970 970 check_dp_over2_end:
000002DD FA +0 971 971 ret
+0 972 972
000002DE +0 973 973 keep_2dp:
000002DE 0C00 R +0 974 974 ld a,(DP_POS)
000002E0 F678 +0 975 975 push a
000002E2 0A0002 R +0 976 976 ld (DP_POS),2
000002E5 FD0000 R +0 977 977 call wk_round_0
000002E8 E640 +0 978 978 pop a
000002EA 0E00 R +0 979 979 ld (DP_POS),a
000002EC FA +0 980 980 ret
+0 981 981
+0 982 982 ;V2.06-----------------------------
000002ED +0 983 983 fix_round_down_keep_2dp:
000002ED 0C00 R +0 984 984 ld a,(MDFLG_1) ;V2.06 keep round flag
000002EF F678 +0 985 985 push a ;v2.06
000002F1 480000 R +0 986 986 ld wa,SW_RNDUP
000002F4 E10000FA R +0 987 987 clr (SW_RNDUP>>4).a
000002F8 480000 R +0 988 988 ld wa,SW_RND54
000002FB E10000FA R +0 989 989 clr (SW_RND54>>4).a
000002FF FD0000 R +0 990 990 call keep_2dp
00000302 E640 +0 991 991 pop a ;V2.06
00000304 0E00 R +0 992 992 ld (MDFLG_1),a ;V2.06 restore round flag
00000306 FA +0 993 993 ret
+0 994 994
00000307 +0 995 995 fix_round_up_keep_2dp:
00000307 0C00 R +0 996 996 ld a,(MDFLG_1) ;V2.06 keep round flag
00000309 F678 +0 997 997 push a ;v2.06
0000030B 480000 R +0 998 998 ld wa,SW_RNDUP
0000030E E10000F2 R +0 999 999 set (SW_RNDUP>>4).a
00000312 480000 R +0 1000 1000 ld wa,SW_RND54
00000315 E10000FA R +0 1001 1001 clr (SW_RND54>>4).a
00000319 FD0000 R +0 1002 1002 call keep_2dp
0000031C E640 +0 1003 1003 pop a ;V2.06
0000031E 0E00 R +0 1004 1004 ld (MDFLG_1),a ;V2.06 restore round flag
00000320 FA +0 1005 1005 ret
+0 1006 1006 ;V2.06---------------------------------------
00000321 +0 1007 1007 tax_mark_print:
+0 1008 1008 ;V3.00 @BBS (SW_V15,tax_mark_print_0) ;V2.07
00000321 FA +0 1009 1009 ret ;V2.07
+0 1010 1010 ;V3.00tax_mark_print_0: ;V2.07
+0 1011 1011 ;V3.00 call spc_prnbuf
+0 1012 1012 ;V3.00 ld hl,PRN_BUF
+0 1013 1013 ;V3.00 ld a,0xcc
+0 1014 1014 ;V3.00 ld c,7
+0 1015 1015 ;V3.00 whic_tax_print_1:
+0 1016 1016 ;V3.00 ld (hl+c),a
+0 1017 1017 ;V3.00 dec c
+0 1018 1018 ;V3.00 cmp c,3
+0 1019 1019 ;V3.00 j f,whic_tax_print_1
+0 1020 1020 ;V3.00 ld a,0xfc ;only"." at right side
+0 1021 1021 ;V3.00 ld (hl+c),a
+0 1022 1022 ;V3.00 ld (PRN_BUF_SYM),S_SPC
+0 1023 1023 ;V3.00 ld (PRN_BUF+5),0xc1 ;for set_tax1_mark_print:
+0 1024 1024 ;V3.00 @BBC (M_TX2,whic_tax_print_end)
+0 1025 1025 ;V3.00 @BBC (M_TX1,to_tax2_mark_print) ;V2.07
+0 1026 1026 ;V3.00 ld (PRN_BUF+5),0x1b ;V2.07 '1,'
+0 1027 1027 ;V3.00 ld (PRN_BUF+6),0x2c ;V2.07 '2.'
+0 1028 1028 ;V3.00 jp whic_tax_print_end ;V2.07
+0 1029 1029 ;V3.00to_tax2_mark_print: ;V2.07
+0 1030 1030 ;V3.00 ld (PRN_BUF+5),0xc2 ;for set_tax2_mark_print:
+0 1031 1031 ;V3.00whic_tax_print_end:
+0 1032 1032 ;V3.00 call print_bk
+0 1033 1033 ;V3.00 ret
+0 1034 1034 ;----------------------------------------------------V2.06
+0 1035 1035 ;===============================================================================
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