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📄 key.med

📁 calculator code ,use toshibaor nec LSI
💻 MED
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 =1   623       ;V3.00S_RVS		equ	0x22		;'  '
 =1   624       ;V3.00S_AVR		equ	0x27		;' *'
 =1   625       ;V3.00S_ROOT		equ	0x22		;'  '
 =1   626       ;V3.00S_TAX		equ	0x12		;'% '
 =1   627       ;V3.00S_PRN		equ	0x62		;'<> '
 =1   628       ;V3.00S_EUR		equ	0x22		;'  '
 =1   629       ;V3.00S_EUEQ		equ	0xc2		;'= '
 =1   630       ;V3.00S_COST		equ	0x2b		;' C'
 =1   631       ;V3.00S_SELL		equ	0x26		;' <>'
 =1   632       ;V3.00S_M		equ	0x2a		;' M'
 =1   633       ;V3.00S_MARG		equ	0xa1		;'M%'
 =1   634       ;V3.00S_PERMARG	equ	0x1a		;'%M'
 =1   635       ;V3.00S_TAXA		equ	0x27		;' *'
 =1   636       ;V3.00S_ICG		equ	0x29		;' G'
 =1   637       ;V3.00S_ICGV		equ	0x29		;' G'
 =1   638       ;V3.00S_ICM		equ	0x2a		;' M'
 =1   639       ;V3.00S_ASM		equ	0x7a		;'*M'
 =1   640       ;V3.00S_ASC		equ	0x7b		;'*C'
 =1   641       ;V3.00S_ASDL		equ	0x78		;'*'+delta
 =1   642       ;V3.00S_MIPL		equ	0x03		;'-+'	
 =1   643       ;V3.00S_MIMI		equ	0x00		;'--'
 =1   644       ;V3.00S_MIST		equ	0x06		;'-S'
 =1   645       ;V3.00S_MITL		equ	0x07		;'-T'
 =1   646       ;V3.00S_EUROS		equ	0x29		;' euro'
 =1   647       ;V3.00S_G		equ	0x9f		;'G '
 =1   648       ;V3.00S_GPL		equ	0x93		;'G+'
 =1   649       ;V3.00S_GAST		equ	0x97		;'G*'
 =1   650       ;==============================================================================
 =1   651       P_SPC	equ	0x20	;for print " "
 =1   652       ;-----------------------------------------------------------
 =1   653       ;interrupt enable flag set:
 =1   654       
 =1   655       EF4		equ	4;(EIRL).4 /INT0
 =1   656       EF5		equ	5;(EIRL).5 INTTC1
 =1   657       EF6		equ	6;(EIRL).6 INT1
 =1   658       EF7		equ	7;(EIRL).7 INTTBT
 =1   659       EF8		equ	0;(EIRH).0 INTTC3
 =1   660       EF9		equ	1;(EIRH).1 INTSIO(High speed SIO interrupt)
 =1   661       EF10		equ	2;(EIRH).2 INTTC4
 =1   662       EF11		equ	3;(EIRH).3 INT3
 =1   663       EF12		equ	4;(EIRH).4 INT4
 =1   664       EF13		equ	5;(EIRH).5 INTTC2
 =1   665       EF14		equ	6;(EIRH).6 /INT5
 =1   666       EF15		equ	7;(EIRH).7 INTADC or INT2
 =1   667       ;interrupt request flag set:
 =1   668       IL2		equ	2;(ILL).2 INTSWI 
 =1   669       IL3		equ	3;(ILL).3 INTATRAP
 =1   670       IL4		equ	4;(ILL).4 /INT0
 =1   671       IL5		equ	5;(ILL).5 INTTC1
 =1   672       IL6		equ	6;(ILL).6 INT1
 =1   673       IL7		equ	7;(ILL).7 INTTB
 =1   674       IL8		equ	0;(ILH).0 INTTC3
 =1   675       IL9		equ	1;(ILH).1 INTSIO
 =1   676       IL10		equ	2;(ILH).2 INTTC4
 =1   677       IL11		equ	3;(ILH).3 INT3
 =1   678       IL12		equ	4;(ILH).4 INT4
 =1   679       IL13		equ	5;(ILH).5 INTTC2
 =1   680       IL14		equ	6;(ILH).6 /INT5
 =1   681       IL15		equ	7;(ILH).7 INTADC or /INT2
 =1   682       ;	DBR_LCD_RATE		equ	(0x0f33<<4)+5	;LCD DBR matrix point for "RATE"
 =1   683       ;	DBR_LCD1235_RATE	equ	(0x0f33<<4)+3	;LCD DBR matrix point for "RATE"
 =1   684       ;	DBR_LCD1297_RATE	equ	(0x0f33<<4)+4	;LCD DBR matrix point for "RATE"
 =1   685       ;	DBR_LCD120_RATE		equ	(0x0f33<<4)+4	;LCD DBR matrix point for "RATE"
 =1   686       ;	DBR_LCD1297_GT		equ	(0x0f32<<4)+2	;LCD DBR matrix point for "GT"
 =1   687       ;	;LCD_PRN		equ	(0x0f31<<4)+3	;LCD DBR matrix point for "PRINT"
 =1   688       ;	;LCD_FIN		equ	(0x0f30<<4)+3	;LCD DEB matrix point for "FIN"
 =1   689       
 =1   690       AUTOOFFTIME	equ	31250;1500
      691       	$list
      692       
      693       	public	init_scan,key_scan,key_get,init_keybuf,update_md,mdsw_update,initial_mdsw_update
      694       	public	wait_100ms,wait_50ms,wait_xms
      695       	extern	off_key,lcd_display_symbol,vft_enable,vft_disable,disp_to_dbr
      696       ROM	section	code 
      697       
      698       ;==============================================================================
      699       ;	I/O port bit assignment for reference 
      700       ;==============================================================================
      701       ;------------------------------------------------
      702       ;Port assignment (P7) key matrax scan; output low level if key pressed
      703       ;------------------------------------------------
      704       ;P90	Key matrix scan0	out	;HH______________________HH______________________
      705       ;P91	Key matrix scan1	out	;__HH______________________HH____________________
      706       ;P92	Key matrix scan2	out	;____HH______________________HH__________________
      707       ;P93	Key matrix scan3	out	;______HH______________________HH________________
      708       ;P94	Key matrix scan4	out	;________HH______________________HH______________
      709       ;P95	Key matrix scan5	out	;__________HH______________________HH____________
      710       ;P96	Key matrix scan6	out	;____________HH______________________HH__________
      711       ;P97	Key matrix scan7	out	;______________HH______________________HH________
      712       ;============================================================================
      713       ;Port assignment (P3) and P20, key scan return and slider return
      714       ;-----------------------------------------------
      715       ;key return
      716       ;P10	Key matrix return0	in	;valid senser with high level
      717       ;P11	Key matrix return1	in	;
      718       ;P12	Key matrix return2	in	;
      719       ;P13	Key matrix return3	in	;
      720       ;P15	Key matrix return4	in	;
      721       ;slider return
      722       ;P50	slide matrix return0	in	;valid senser with high level
      723       ;P51	slide matrix return1	in	;
      724       ;P52	slide matrix return2	in	;
      725       ;P53	slide matrix return3
      726       RET_GT		equ	0y00000001	;V1.23 return for GT key
      727       SCAN_GT		equ	0x03		;V1.23 scan for GT key
      728       RET_IC		equ	0y00001000	;V1.23return for IC key
      729       SCAN_IC		equ	0x07		;V1.23 scan for IC key
      730       RET_RATE	equ	0y00000001	;return for RATE key
      731       RETV1205_RATE	equ	0y00000100	;V1.28
      732       SCAN_RATE	equ	0x0a		;scan for RATE key
      733       SCANV1205_RATE	equ	0x05		;V1.28
      734       RET_FEED	equ	0y00000001	;return for FEED key
      735       SCAN_FEED	equ	0x0b		;scan for FEED key
      736       RET_SET		equ	0y00001000	;return for set(time) key
      737       SCAN_SET	equ	0x0a		;scan for set(time) key
      738       COLOR		equ	3
      739       ;==============================================================================
      740       ;		Key scan interrupt (set 800us interval for TC4)
      741       ;==============================================================================
      742       init_scan:
      743       		ld	(P9DR),0y00000000	;data latch to 0 (for initial value)
      744       		or	(P1DR),0y00111111	;
      745       		ld	(P5CR),0y00000000	;
      746       		ld	(P5DR),0y00000000	;set P50-P53 as input port
      747       ;T4CR: bit7(TFF4) bit654(TC4CK) bit3(TC4S) bit210(TC4M)
      748       		clr	(ILH).IL10			;clear TC4 interrupt flag
      749       		ld	(TC4DR),100			;16MHz/2^7/100 = 125Hz(800us)
      750       		di				;V2.05
      751       		set	(EIRH).EF10			;TC4 interrupt enable
      752       		ei				;V2.05
      753       		ld	(TC4CR),0y00000100
      754       		ld	(TC4CR),0y00100100		;TC4S=1(count start) TC4CK=001(select fc/2^7) TC4M=000(select 8bittimer mode)
      755       		ret
      756       
      757       ;==============================================================================
      758       ;		Initialize key buffer pointer, counter
      759       ;==============================================================================
      760       init_keybuf:
      761       		di
      762       		ld	(KEY_CT),0	;key counter clear
      763       		ld	(KEY_WPTR),0	;key bufeer write pointer clear
      764       		ld	(KEY_RPTR),0	;key buffer read pointer clear
      765       		ei
      766       		ret
      767       
      768       ;==============================================================================
      769       ;		Get key code from key buffer
      770       ;		out: reg.a <- key code
      771       ;		     KEYIN <- key code
      772       ;		     c clear: illegal key
      773       ;		use register:	c,hl
      774       ;==============================================================================
      775       key_get:
      776       		ld	c,(KEY_RPTR)	;key buffer read pointer-->c
      777       		ld	hl,KEY_BUF	;key buffer start address-->hl
      778       		ld	a,(hl+c)	;key code wanted-->a
      779       		ld	(KEYIN),a	;key code in a-->register KEYIN
      780       		inc	c		;prepared for next key code
      781       		and	c,0x3f		;\recycle KEY_RPTR in key buffer(3fh)
      782       		ld	(KEY_RPTR),c	;/
      783       		dec	(KEY_CT)	;key counter decrease one
      784       		cmp	a,K_MAX		;over the max key code? no, set c is OK
      785       		ret
      786       
      787       ;==============================================================================
      788       ;		and update MDFLG,DP_POS from MDFLG_RT,DP_POS_RT
      789       ;==============================================================================
      790       ;MDFLG_0:
      791       ;SW_DP0	;SW_DP1;SW_DP2;SW_DP3;SW_DP4;SW_DP5;SW_DP6;SW_ADM
      792       ;MDFLG_1:
      793       ;SW_SGT,SW_SGM,SW_SGG,SW_SGK,SW_GT,SW_MGT,SW_RNDUP,SW_RND54
      794       ;MDFLG_2:
      795       ;SW_SG,SW_ICPM,SW_IC,SW_NP,SW_OFF,SW_AC,SW_V15,SW_FEED,SW_A,SW_M2,SW_AMZ
      796       ;MDFLG_3:
      797       ;SW_DTST,SW_ADM12,SW_EUTX,SW_D14,SW_D10,SW_TA,SW_M2,SW_FIN
      798       ;MDFLG_01:no use
      799       ;MDFLG_11:no use
      800       ;MDFLG_21:no use
      801       ;------------------------------------------
      802       ;===========================================================
      803       update_md:
      804       		ld	a,(MDFLG_RT0)	;
      805       		ld	(MDFLG_0),a
      806       		ld	a,(MDFLG_RT1)	;
      807       		ld	(MDFLG_1),a	
      808       		ld	a,(MDFLG_RT2)	;
      809       		ld	(MDFLG_2),a	
      810       		ld	a,(MDFLG_RT3)	;
      811       		ld	(MDFLG_3),a
      812       		ld	a,(DP_POS_RT)	;
      813       		ld	(DP_POS),a
      815 +1    	ld	wa,M_FX_SGM
      816 +1    	test	(M_FX_SGM>>4).a		;bit -reverse-> jump status
      817 +1    	j	t,to_fix_ac		;if jump status is 1 -> branch
      818       to_fix_sgm:					;V2.06
      820 +1    	ld	wa,SW_SGM
      821 +1    	set	(SW_SGM>>4).a
      822       		
      823       to_fix_ac:
      825 +1    	ld	wa,M_FX_AC
      826 +1    	test	(M_FX_AC>>4).a		;bit -reverse-> jump status
      827 +1    	j	t,to_fix_m14		;if jump status is 1 -> branch
      829 +1    	ld	wa,SW_AC
      830 +1    	set	(SW_AC>>4).a
      831       to_fix_m14:
      833 +1    	ld	wa,M_FX_M14
      834 +1    	test	(M_FX_M14>>4).a		;bit -reverse-> jump status
      835 +1    	j	t,to_fix_54		;if jump status is 1 -> branch
      837 +1    	ld	wa,M14
      838 +1    	set	(M14>>4).a
      839       to_fix_54:					;V2.06
      840       ;V3.00		@BBC	(M_FX_54,to_fix_sd)	;V2.06
      841       ;V3.00		@SEB	(SW_RND54)		;V2.06
      842       ;V3.00to_fix_sd:					;V2.06
      843       ;V3.00		@BBC	(M_FX_SD,to_set_icpm)	;V2.06
      844       ;V3.00		@SEB	(SW_DTST)		;V2.06
      845       ;V3.00to_set_icpm:
      846       ;V3.00		@BBC	(SW_V15,to_fix_end)	;V2.07
      847       ;V3.00		@BBC	(F_ICPM,to_set_icpm_1)	;V2.07 to set IC_PM
      848       ;V3.00		@SEB	(SW_ICPM_RT)		;V2.07
      849       ;V3.00		@SEB	(SW_ICPM)		;V2.07
      850       ;V3.00		jp	to_fix_end		;V2.07
      851       ;V3.00to_set_icpm_1:
      852       ;V3.00		@CLB	(SW_ICPM_RT)		;V2.07
      853       ;V3.00		@CLB	(SW_ICPM)		;V2.07			
      854       ;V3.00to_fix_end:
      855       		ret
      856       
      857       ;V2.00disp_rate_blink:
      858       
      859       ;V2.00	ret
      860       ;==============================================================================
      861       ;auto switch off time check, 5 minutes=300000us. (AUTO_OFF_TIME)=300000/400=750
      862       ;==============================================================================
      863       ;V2.03auto_off_check:				;V1.08
      864       ;V2.03	@BBC	(M_HAND,auto_off_check_end)	;V1.18
      865       ;V2.03	ld	wa,(AUTO_OFF_TIM)
      866       ;V2.03	cmp	wa,0
      867       ;V2.03	jr	eq,auto_off_check_end
      868       ;V2.03	dec	wa
      869       ;V2.03	ld	(AUTO_OFF_TIM),wa
      870       ;V2.03	cmp	wa,0
      871       ;V2.03	jr	ne,auto_off_check_end
      872       ;V2.03	ld	wa,AUTOOFFTIME	;750 x 400=300000us=5 minutes
      873       ;V2.03	ld	(AUTO_OFF_TIM),wa
      874       ;V2.03	@SEB	(F_WAKE)
      875       ;V2.03auto_off_check_end:
      876       ;V2.03	ret
      877       ;==============================================================================
      878       ;display backlight color control green, green+red=salmon pink
      879       ;==============================================================================
      880       blink_vfd:
      881       ;V4.11	@BBS	(F_OFF,blink_vfd_off)		;V2.06
      882       ;V4.11	@BBS	(IO_MT,blink_vfd_off)		;V2.07
      883       ;V3.00	@BBS	(RATE_PROG,blink_vfd_start)
      884       ;V3.00	@BBS	(EURO_PROG,blink_vfd_start)
      885       ;V4.11	@BBS	(IC_PROG,blink_vfd_start)
      886       ;V3.00	@BBS	(RTC_SET,blink_vfd_start)
      887       ;V4.11	@CLB	(F_BLINK)	;V2.10
      888       ;V4.11	ret
      889       blink_vfd_start:
      890       ;V4.11	inc	(BLK_CT)

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