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📁 calculator code ,use toshibaor nec LSI
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     1313       		ld	e,(hl+c)		;5
     1314       		ld	(SIOBUF),e		;5
     1315       font_tx_12:
     1316       		ld	d,0
     1317       		add	de,dotcnt_tbl		;4
     1318       		ld	a,(de)			;3
     1319       		add	a,(DOT_CT)		;5
     1320       		j	cs,font_tx_2		;2
     1321       		ld	(DOT_CT),a		;5
     1322       font_tx_2:
     1323       		inc	c			;1
     1324       		cmp	c,36			;3
     1325       		j	lt,font_tx_1		;4
     1326       ;					        ----
     1327       ;						 42 cycle = 21us  *transration speed = 16us/1byte
     1329 +1    	ld	(SIOCR1),0y00001100	;SIOS=0, SIOINH=1 to abort and initial "SIOSR", SIOM=00(8bit Tx) SCK=fc/2^4
     1330 +1    	or 	(P1DR),0y11000000	;P17(CK: Hi-z), P16(EEIN: Hi-z)
     1331 +1    
     1332       		ret
     1333       sio_int:
     1334       		reti
     1335       ;----------------------------------------------------------------------
     1336       ;		   PRN_BUF(1line data)-> DOT_LINE
     1337       ;
     1338       prnbuf_to_dot:
     1339       		ld	c,0			;reg.c <-- location of PRN_BUF(0~23)
     1340       		ld	ix,DOT_LINE		;reg.ix <-- address of DOT_LINE (+0 to +35)
     1341       prn_dot_00:
     1342       		ld	hl,PRN_BUF		;
     1343       		ld	a,(hl+c)		;get 1digit character	        reg.a     reg.w
     1344       		call	font_dot		;get font data -> reg.wa      dddd dddd dddd 0000
     1345       		ld	cf,c.0			;
     1346       		j	cs,prn_dot_20		;odd digit?  yes->
     1347       		ld	(ix),wa			;DOT_LINE <-- font data  (+0 <-- reg.a  +1 <-- reg.w)
     1348       		inc	ix
     1349       		j	prn_dot_30
     1350       prn_dot_20:
     1351       		swap	a
     1352       		ld	b,a
     1353       		and	b,0xf0
     1354       		or	b,(ix)
     1355       		ld	(ix),b
     1356       		inc	ix
     1357       		swap	w
     1358       		and	a,0x0f
     1359       		or	a,w
     1360       		ld	(ix),a
     1361       		inc	ix
     1362       		or	w,(ix)
     1363       prn_dot_30:
     1364       		inc	c
     1365       		cmp	c,PRN_MAX
     1366       		j	lt,prn_dot_00
     1367       		ret
     1368       ;
     1369       ;------------------------------------------------------------------------
     1370       ; Get font data
     1371       ; In:  Reg.a <- ascii code     reg.a    reg.w
     1372       ; Out: Reg.wa <- Font data  dddd dddd dddd 0000
     1373       font_dot:
     1374       ;V4.02		sub	a,0x20
     1375       ;V4.02		j	cc,font_dot_1
     1376       ;V4.02		ld	a,0
     1377       ;V4.02font_dot_1:
     1378       		ld	b,a			;reg.b <- save character code
     1379       ;V4.02		cmp	a,0x10
     1380       ;V4.02		j	lt,font_dot_3
     1381       ;V4.02		cmp	a,0x1a
     1382       		cmp	a,10		;V4.02 to check the digitals
     1383       		j	ge,font_dot_3	;not idgit-->
     1384       ;numeric (10h to 19h)
     1385       ;3.00		@BBS	(F_SMALLNUM,font_dot_11)	;
     1386       ;V4.02		@BBS	(F_REDBAK,font_dot_12)
     1388 +1    	ld	wa,F_REDBAK
     1389 +1    	test	(F_REDBAK>>4).a		;bit -reverse-> jump status
     1390 +1    	j	t,font_dot_3		;if jump status is 1 -> branch
     1391       		ld	a,b
     1392       ;V4.02		j	font_dot_3
     1393       ;3.00font_dot_11:
     1394       ;3.00		ld	de,font_snum
     1395       ;3.00		j	font_dot_13
     1396       font_dot_12:
     1397       		ld	de,font_bnum
     1398       font_dot_13:
     1399       ;V4.02		sub	b,0x10
     1400       ;V4.02		ld	a,b
     1401       		j	font_dot_4
     1402       font_dot_3:
     1403       		ld	a,b
     1404       		ld	de,font_data
     1405       font_dot_4:
     1406       		ld	w,20*2			;20 x 2 bytes / 1font data
     1407       		mul	w,a
     1408       		add	de,wa
     1409       		ld	a,(LINE_PTR)
     1410       		shlc	a
     1411       		ld	w,0
     1412       		add	de,wa
     1413       		ld	wa,(de)			
     1414       		ret
     1415       
     1416       ;==============================================================================
     1417       ;	Timer6Interrupt (STEPPING MT / phase chopping control) 
     1418       ;==============================================================================
     1419       ;Stepping MT drive........................................................
     1420       tm2_int:
     1422 +1    	push	wa
     1423 +1    	push	bc
     1424 +1    	push	de
     1425 +1    	push	hl
     1426 +1    	push	ix
     1427 +1    	push	iy
     1429 +1    	ld	(TC2CR),0y00001110		;TC2CK(011)=fc/2^3 TC2S(0):stop TC2M(0):timer mode
     1430 +1    	clr	(EIRH).EF13			;clear TC2 enable (EIRH:bit4)
     1432 +1    	ld	wa,F_STBDLY
     1433 +1    	test	(F_STBDLY>>4).a		;bit -reverse-> jump status
     1434 +1    	j	t,timer_y_000		;if jump status is 1 -> branch
     1436 +1    	ld	wa,F_CHPOFF
     1437 +1    	test	(F_CHPOFF>>4).a		;bit -reverse-> jump status
     1438 +1    	j	t,timery_0		;if jump status is 1 -> branch
     1440 +1    	ld	wa,F_CHPOFF
     1441 +1    	clr	(F_CHPOFF>>4).a
     1443 +1    	and	(P4DR),0y11111100			;AIN1,AIN0 must set '0' for AD convert
     1444 +1    	or	(P4DR),0y00011000			;P44P43 set '1'(ENA1,ENA2)
     1446 +1    	ldw	(TC2DRL),STP_CPON			;set TC2DR
     1447       		j	tm2_exit
     1448       timery_0:
     1450 +1    	ld	wa,F_CHPOFF
     1451 +1    	set	(F_CHPOFF>>4).a
     1453 +1    	and	(P4DR),0y11100100			;AIN1,AIN0 must set '0' for AD convert,P44P43 set '0'(ENA1,ENA2)
     1455 +1    	ldw	(TC2DRL),STP_CPOF			;set TC2DR
     1456       		j	tm2_exit
     1457       ;chopping process for long strobe pulse.....
     1458       timery_add:					;Step Time + ADD(300us) + ON(300us)
     1459       ;		@SEB	(F_CHPOFF)		;Next phase ON(= 300us)
     1460       ;		@T2_SET (STP_CPON)		;set 300us
     1462 +1    	ld	wa,F_CHPOFF
     1463 +1    	set	(F_CHPOFF>>4).a
     1465 +1    	and	(P4DR),0y11100100			;AIN1,AIN0 must set '0' for AD convert,P44P43 set '0'(ENA1,ENA2)
     1467 +1    	ldw	(TC2DRL),STP_CPOF			;set TC2DR
     1468       
     1469       tm2_exit:
     1471 +1    	ld	(TC2CR),0y00001110		;TC2CK(011)=fc/2^3 TC2S(0):stop TC2M(0):timer mode
     1472 +1    	clr	(ILH).IL13		;clear TC6 request (ILH:bit4)
     1473 +1    	set	(EIRH).EF13			;set TC6 enable (EIRH:bit4)
     1474 +1    	ld	(TC2CR),0y00101110		;TC2CK(011)=fc/2^3 0.5us TC2S(1):start TC2M(0):timer mode
     1476 +1    	pop	iy
     1477 +1    	pop	ix
     1478 +1    	pop	hl
     1479 +1    	pop	de
     1480 +1    	pop	bc
     1481 +1    	pop	wa
     1482       		reti
     1483       ;
     1484       ;--------------------------------------------------------------------------------------
     1485       timer_y_000:
     1487 +1    	ld	wa,F_PRINT
     1488 +1    	test	(F_PRINT>>4).a		;bit -reverse-> jump status
     1489 +1    	j	f,timer_y_prn		;if jump status is 0 -> branch
     1491 +1    	ld	wa,F_FEED
     1492 +1    	test	(F_FEED>>4).a		;bit -reverse-> jump status
     1493 +1    	j	f,timer_y_feed		;if jump status is 0 -> branch
     1495 +1    	ld	wa,F_INIT
     1496 +1    	test	(F_INIT>>4).a		;bit -reverse-> jump status
     1497 +1    	j	f,timer_y_init		;if jump status is 0 -> branch
     1498       
     1499       ;finish rush step  --> complete printing
     1501 +1    	and	(P4DR),0y11111000			;AIN1,AIN0 must set '0' for AD convert, P42(VPR) set'0'
     1502 +1    	clr	(F_PCONT+2).6		;IO_MT		equ	(F_PCONT+2<<4)+6
     1504 +1    	and	(P4DR),0y11100100			;AIN1,AIN0 must set '0' for AD convert,P44P43 set '0'(ENA1,ENA2)
     1506 +1    	ld	(SIOCR1),0y00001100	;SIOS=0, SIOINH=1 to abort and initial "SIOSR", SIOM=00(8bit Tx) SCK=fc/2^4
     1507 +1    	or 	(P1DR),0y11000000	;P17(CK: Hi-z), P16(EEIN: Hi-z)
     1508 +1    
     1510 +1    	ld	wa,P_MOVE
     1511 +1    	clr	(P_MOVE>>4).a
     1513 +1    	ld	wa,F_RUSH
     1514 +1    	clr	(F_RUSH>>4).a
     1516 +1    	ld	wa,F_REVCAN
     1517 +1    	test	(F_REVCAN>>4).a		;bit -reverse-> jump status
     1518 +1    	j	f,timer_y_exit		;if jump status is 0 -> branch
     1519       ;		call	tempdbr_to_dbr		;copy  temporally edit area -> real DBR
     1520       ;		call	bl_on
     1521       		call	vft_enable
     1522       		j	timer_y_exit
     1523       ;
     1524       timer_y_init:
     1526 +1    	ld	wa,SW_LTP
     1527 +1    	test	(SW_LTP>>4).a		;bit -reverse-> jump status
     1528 +1    	j	f,ltp_timer_y_init		;if jump status is 0 -> branch
     1529       		inc	(STEP_CT)
     1530       		cmp	(STEP_CT),16
     1531       		j	lt,timer_y_i2
     1533 +1    	ld	wa,F_INIT
     1534 +1    	clr	(F_INIT>>4).a
     1535       		j	timer_y_rush		;---> Motor stop Rush
     1536       timer_y_i2:
     1537       		call	phase_out
     1539 +1    	ldw	(TC2DRL),STP_INIT			;set TC2DR
     1541 +1    	ld	(TC2CR),0y00001110		;TC2CK(011)=fc/2^3 TC2S(0):stop TC2M(0):timer mode
     1542 +1    	clr	(ILH).IL13		;clear TC6 request (ILH:bit4)
     1543 +1    	set	(EIRH).EF13			;set TC6 enable (EIRH:bit4)
     1544 +1    	ld	(TC2CR),0y00101110		;TC2CK(011)=fc/2^3 0.5us TC2S(1):start TC2M(0):timer mode
     1545       		j	timer_y_exit
     1546       
     1547       ltp_timer_y_init:
     1548       		inc	(STEP_CT)
     1549       		cmp	(STEP_CT),16
     1550       		j	lt,ltp_timer_y_i2
     1551       		j	ne,ltp_timer_y_i0
     1553 +1    	ld	wa,F_RVSE
     1554 +1    	clr	(F_RVSE>>4).a
     1555       		j	ltp_timer_y_i2
     1556       ltp_timer_y_i0:
     1557       		cmp	(STEP_CT),34
     1558       		j	lt,ltp_timer_y_i2
     1560 +1    	ld	wa,F_INIT
     1561 +1    	clr	(F_INIT>>4).a
     1562       		j	ltp_timer_y_rush	;---> Motor stop Rush
     1563       ltp_timer_y_i2:
     1564       		call	phase_out
     1566 +1    	ldw	(TC2DRL),STP_FEED_LTP			;set TC2DR
     1568 +1    	ld	(TC2CR),0y00001110		;TC2CK(011)=fc/2^3 TC2S(0):stop TC2M(0):timer mode
     1569 +1    	clr	(ILH).IL13		;clear TC6 request (ILH:bit4)
     1570 +1    	set	(EIRH).EF13			;set TC6 enable (EIRH:bit4)
     1571 +1    	ld	(TC2CR),0y00101110		;TC2CK(011)=fc/2^3 0.5us TC2S(1):start TC2M(0):timer mode
     1572       		j	timer_y_exit
     1573       
     1574       ;
     1575       ;--------------------------------------------------------------------------------------
     1576       timer_y_feed:
     1577       		inc	(STEP_CT)
     1578       		ld	b,(STEP_CT)
     1579       ;V3.09		@BBS	(SW_LTP,ltp_timer_y_feed)	;V3.08
     1580       		cmp	b,20+1			;10 dotline complete?
     1581       ;V3.09		jp	ltp_timer_y_feed_1		;V3.08
     1582       ltp_timer_y_feed:
     1583       ;V3.09		cmp	b,40+3+(L_FEED_LTP*2)+1			;V3.08
     1584       ltp_timer_y_feed_1:
     1585       		j	lt,timer_y_f10		;no
     1587 +1    	ld	wa,F_FDREQ
     1588 +1    	test	(F_FDREQ>>4).a		;bit -reverse-> jump status
     1589 +1    	j	f,timer_y_f01		;if jump status is 0 -> branch
     1591 +1    	ld	wa,F_FEED
     1592 +1    	clr	(F_FEED>>4).a
     1594 +1    	ld	wa,SW_LTP
     1595 +1    	test	(SW_LTP>>4).a		;bit -reverse-> jump status
     1596 +1    	j	f,ltp_timer_y_rush		;if jump status is 0 -> branch
     1597       		j	timer_y_rush		;---> Motor stop Rush
     1598       timer_y_f01:
     1599       		ld	(STEP_CT),1
     1600       		ld	b,234			;= STEP_CT
     1601       		j	timer_y_f22
     1602       timer_y_f10:
     1603       ;V3.09		@BBS	(SW_LTP,timer_y_f10x)	;V3.08
     1604       		cmp	b,16+1			;8 dotline complete ?
     1605       		jp	timer_y_f10y
     1606       timer_y_f10x:
     1607       ;V3.09		cmp	b,(40+3+(L_FEED_LTP*

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