uart.c

东南大学开发ARM7芯片UART模块测试代码

         (ReadReg(urt->DLBL)!= urt->DLBL_v)   
        return 0;

        WriteReg(urt->DLBH,urt->DLBH_v);
        if
         (ReadReg(urt->DLBH)!= urt->DLBH_v) 
        return 0; 
        
        WriteReg(urt->LCR,urt->LCR_v2);      //SEL is 0
        if
         (ReadReg(urt->LCR)!=urt->LCR_v2)   
        return 0;
           
        WriteReg(urt->IER,urt->IER_v);
        if
         (ReadReg(urt->IER)!= urt->IER_v) 
        return 0; 
        	
        return 1;
}






/*************************************************************************/
/*  FUNCTION                                                             */
/*                                                                       */
/*       UartInit3                                                       */
/*                                                                       */
/*  DESCRIPTION                                                          */
/*                                                                       */
/*       该函数的作用是用来测试自动硬件流控模式。                        */
/*                                                                       */
/*  AUTHOR                                                               */                                                                
/*                                                                       */
/*       QI Haochun, ASIC&Prochip.                                       */
/*                                                                       */
/*  INPUTS                                                               */
/*                                                                       */
/*       U32 sysclk,U32 baudrate,U32 data_bit,                           */
/*       U32 tri_level_t,U32 tri_level_r                                 */
/*                                                                       */
/*  OUTPUTS                                                              */
/*                                                                       */
/*        1:success                                                      */
/*       0:error                                                         */
/*                                                                       */
/*                                                                       */
/***************************test point 3:测试自动硬件流控模式*************/
/*************************************************************************/

U32 UartInit3(U32 sysclk,U32 baudrate,U32 data_bit,U32 tri_level_t,U32 tri_level_r)

{	
    
    U32 UART_RECORD2;
    U32 UART_RECORD;
    int i;
    U32 baud,bit,triger_r,triger_t,baudh,baudl;
    
    WriteReg(UART_RECORD2,0x0);
    WriteReg(UART_RECORD,0x0);
      
        
    baud  = sysclk/16/baudrate;
    baudh = baud >> 8;                 //波特率高8位
    baudl = baud & 0xff;               //波特率低8位   
    
    switch(data_bit)                   //bit的第八位设为1，即访问divisor latch寄存器
    
    {
        case 5: bit = 0x80;
                break;
        case 6: bit = 0x81;
                break;  
        case 7: bit = 0x82;
                break;
        case 8: bit = 0x83;
                break;
        default: ;
                break;            
    }
    
   //  bit = bit|0x08;                 //正常输出，奇校验，一个停止位
   //  bit = bit|0x3c;                 //固定校验，偶校验(0)，1.5停止位
    
    WriteReg(UART0_LCR,bit);  
    WriteReg(UART0_DLBH,baudh);
    WriteReg(UART0_DLBL,baudl);
    
    WriteReg(UART1_LCR,bit);
    WriteReg(UART1_DLBH,baudh);
    WriteReg(UART1_DLBL,baudl);
    
        
    bit &= (~(0x1<<7));                //设置访问普通寄存器     
    WriteReg(UART0_LCR,bit); 
    WriteReg(UART1_LCR,bit);        
         
    
  //配置发送FIFO触发级
    switch(tri_level_t)
    
    {
        case 0: triger_t = 0x0;
                break;
        case 2: triger_t = 0x1;
                break;  
        case 4: triger_t = 0x2;
                break;
        case 8: triger_t = 0x3;
                break;           
    }
    
    triger_t = (triger_t<<4);          //该通道接收触发级即为1(0x00)
    WriteReg(UART0_FCR,triger_t);
    WriteReg(UART1_FCR,triger_t);
  
  //配置接收FIFO触发级
    switch(tri_level_r)
    {
        case 1: triger_r = 0x0;
                break;
        case 4: triger_r = 0x1;
                break;  
        case 8: triger_r = 0x2;
                break;
        case 14: triger_r = 0x3;
                break;           
    }
    
    triger_r = (triger_r<<6);          //该通道发送触发级即为0(0x00)
    WriteReg(UART1_FCR,triger_r);      
    WriteReg(UART0_FCR,triger_r);
   
   
   
  //以下为配置工作于自动硬件流控模式
  
    WriteReg(UART1_MCR,0x20);
    WriteReg(UART0_MCR,0x20);
   
  //打开modem状态变化中断和接收FIFO触发中断
   
    WriteReg(UART0_IER,0x9);
    WriteReg(UART1_IER,0x9); 
   
    for(i=0;i<300;i++);       
    WriteReg(UART1_MCR,0x22);          //接收方准备好   
    WriteReg(UART0_MCR,0x22);
  
    return 1; 
}

   




/*************************************************************************/
/*  FUNCTION                                                             */
/*                                                                       */
/*       UartLoopbackTest                                                */
/*                                                                       */
/*  DESCRIPTION                                                          */
/*                                                                       */
/*       该函数的作用是用来测试loopback模式。                            */
/*                                                                       */
/*  AUTHOR                                                               */                                                                
/*                                                                       */
/*       QI Haochun, ASIC&Prochip.                                       */
/*                                                                       */
/*  INPUTS                                                               */
/*                                                                       */
/*       U32 sysclk,U32 baudrate,U32 data_bit,                           */
/*       U32 tri_level_t                                                 */
/*                                                                       */
/*  OUTPUTS                                                              */
/*       1:success                                                       */
/*       0:error                                                         */
/*                                                                       */
/*                                                                       */
/********************test point 4:test loopback mode**********************/
/*************************************************************************/

U32 UartLoopbackTest(U32 sysclk,U32 baudrate,U32 data_bit,U32 tri_level_t)

{	
    int i;
    U32 baud,bit,triger_t,baudh,baudl; 
    
    baud = sysclk/16/baudrate;
    baudh = baud >> 8;               //波特率高8位
    baudl =baud & 0xff;              //波特率低8位   
    
    switch(data_bit)                 //bit的第八位设为1，即访问divisor latch寄存器
    
    {
        case 5: bit = 0x80;
                break;
        case 6: bit = 0x81;
                break;  
        case 7: bit = 0x82;
                break;
        case 8: bit = 0x83;
                break;
        default: ;
                break;            
    }
    
    bit = bit|0x1c;                  //正常输出，偶校验，2个停止位
    
    *(RP)UART0_LCR = bit;       
    WriteReg(UART0_DLBH,baudh);
    WriteReg(UART0_DLBL,baudl);
    
    bit &= (~(0x1<<7));              //设置访问普通寄存器      
    WriteReg(UART0_LCR,bit);        
    
    //配置UART发送FIFO触发级
    switch(tri_level_t)
    {
        case 0: triger_t = 0x0;
                break;
        case 2: triger_t = 0x1;
                break;  
        case 4: triger_t = 0x2;
                break;
        case 8: triger_t = 0x3;
                break;           
    }
    
    triger_t = (triger_t<<4);        //UART接收触发级即为1(0x00)
    WriteReg(UART0_FCR,triger_t);
        
    //设置UART2工作于loopback模式
    WriteReg(UART0_MCR,0x10);

    //打开modem状态变化中断
    WriteReg(UART0_IER,0x1);

    //写入FIFO
    WriteReg(UART0_TXFIFO,'L');
    WriteReg(UART0_TXFIFO,'O');
    WriteReg(UART0_TXFIFO,'O');
    WriteReg(UART0_TXFIFO,'P');