📄 m16spi.lst
字号:
__text_start:
__start:
002A E5CF LDI R28,0x5F
002B E0D4 LDI R29,4
002C BFCD OUT 0x3D,R28
002D BFDE OUT 0x3E,R29
002E 51C0 SUBI R28,0x10
002F 40D0 SBCI R29,0
0030 EA0A LDI R16,0xAA
0031 8308 STD Y+0,R16
0032 2400 CLR R0
0033 E6E0 LDI R30,0x60
0034 E0F0 LDI R31,0
0035 E010 LDI R17,0
0036 36E0 CPI R30,0x60
0037 07F1 CPC R31,R17
0038 F011 BEQ 0x003B
0039 9201 ST R0,Z+
003A CFFB RJMP 0x0036
003B 8300 STD Z+0,R16
003C E5E4 LDI R30,0x54
003D E0F0 LDI R31,0
003E E6A0 LDI R26,0x60
003F E0B0 LDI R27,0
0040 E010 LDI R17,0
0041 35E4 CPI R30,0x54
0042 07F1 CPC R31,R17
0043 F021 BEQ 0x0048
0044 95C8 LPM
0045 9631 ADIW R30,1
0046 920D ST R0,X+
0047 CFF9 RJMP 0x0041
0048 940E0065 CALL _main
_exit:
004A CFFF RJMP _exit
FILE: C:\TEMP\m16spi\main.c
(0001) //ICC-AVR application builder : 2008-6-16 18:47:52
(0002) // Target : M16
(0003) // Crystal: 16.000Mhz
(0004)
(0005) #define MASTER
(0006) #include <iom16v.h>
(0007) #include <macros.h>
(0008) #include "delay.h"
(0009)
(0010) #ifdef MASTER
(0011) #warning "build as MASTER SPI"
(0012) #else
(0013) #warning "build as SLAVE SPI"
(0014) #endif
(0015) void port_init(void)
(0016) {
(0017) PORTA = 0xff;
_port_init:
004B EF8F LDI R24,0xFF
004C BB8B OUT 0x1B,R24
(0018) DDRA = 0xff;
004D BB8A OUT 0x1A,R24
(0019) PORTB = 0x00;
004E 2422 CLR R2
004F BA28 OUT 0x18,R2
(0020) DDRB = 0x00;
0050 BA27 OUT 0x17,R2
(0021) PORTC = 0x00; //m103 output only
0051 BA25 OUT 0x15,R2
(0022) DDRC = 0x00;
0052 BA24 OUT 0x14,R2
(0023) PORTD = 0x00;
0053 BA22 OUT 0x12,R2
(0024) DDRD = 0x00;
0054 BA21 OUT 0x11,R2
0055 9508 RET
(0025) }
(0026)
(0027) //SPI initialize
(0028) // clock rate: 1000000hz
(0029) void spi_init(void)
(0030) {
(0031) #ifdef MASTER
(0032) SPCR = 0x51; //setup SPI Master
_spi_init:
0056 E581 LDI R24,0x51
0057 B98D OUT 0x0D,R24
(0033) #else
(0034) SPCR = 0x41|0x80; //setup SPI Slave
(0035) #endif
(0036) SPSR = 0x00; //setup SPI
0058 2422 CLR R2
0059 B82E OUT 0x0E,R2
005A 9508 RET
(0037) }
(0038)
(0039) //call this routine to initialize all peripherals
(0040) void init_devices(void)
(0041) {
(0042) //stop errant interrupts until set up
(0043) CLI(); //disable all interrupts
_init_devices:
005B 94F8 BCLR 7
(0044) port_init();
005C DFEE RCALL _port_init
(0045) spi_init();
005D DFF8 RCALL _spi_init
(0046)
(0047) MCUCR = 0x00;
005E 2422 CLR R2
005F BE25 OUT 0x35,R2
(0048) GICR = 0x00;
0060 BE2B OUT 0x3B,R2
(0049) TIMSK = 0x00; //timer interrupt sources
0061 BE29 OUT 0x39,R2
(0050) SEI(); //re-enable interrupts
0062 9478 BSET 7
0063 9508 RET
(0051) //all peripherals are now initialized
(0052) }
(0053)
(0054) #pragma interrupt_handler SPI_RXC_ISR:18
(0055) void SPI_RXC_ISR(void)
(0056) {
_SPI_RXC_ISR:
0064 9518 RETI
(0057) //unsigned char data_temp;
(0058) //SPDR=0xab;
(0059) //data_temp=SPDR;
(0060) #ifdef MASTER
(0061) #else
(0062) PORTA=SPDR;
(0063) #endif
(0064) }
(0065) //
(0066) void main(void)
(0067) {
(0068) unsigned char n=0;
_main:
n --> R20
0065 2744 CLR R20
(0069) init_devices();
0066 DFF4 RCALL _init_devices
(0070) //insert your functional code here...
(0071) #ifdef MASTER
(0072) DDRB|=0x10;
0067 9ABC SBI 0x17,4
(0073) PORTB|=0x10;
0068 9AC4 SBI 0x18,4
0069 C00C RJMP 0x0076
(0074) #else
(0075) PORTB|=0x10;
(0076) #endif
(0077) while(1)
(0078) {
(0079) n++;
006A 9543 INC R20
(0080) #ifdef MASTER
(0081) PORTB&=0xef;
006B B388 IN R24,0x18
006C 7E8F ANDI R24,0xEF
006D BB88 OUT 0x18,R24
(0082) SPDR=n;
006E B94F OUT 0x0F,R20
(0083) /* 启动数据传输 */
(0084)
(0085) /* 等待传输结束 */
(0086) while(!(SPSR & (1<<SPIF)));
006F 9B77 SBIS 0x0E,7
0070 CFFE RJMP 0x006F
(0087) PORTB|=0x10;
0071 9AC4 SBI 0x18,4
(0088) #else
(0089) //PORTA=~n;
(0090) #endif
(0091) delay_nms(200);
0072 EC08 LDI R16,0xC8
0073 E010 LDI R17,0
0074 940E0087 CALL _delay_nms
0076 CFF3 RJMP 0x006A
0077 9508 RET
FILE: C:\TEMP\m16spi\delay.c
(0001)
(0002) /**************************************************************
(0003) * 文件名： delay.c *
(0004) * 描述： 延时函数实现文件 *
(0005) * 作者： zhang *
(0006) * 编写日期： 2006.8.12 *
(0007) * 注意事项： ?? *
(0008) * 修改人： ?? *
(0009) * 修改日期： ?? *
(0010) * 备注： ?? *
(0011) **************************************************************/
(0012)
(0013) #include "delay.h"
(0014) #include "macros.h"
(0015)
(0016) void delay_1ms(void)
(0017) {
(0018) uint i;
(0019) for (i=1;i<(uint)(xtal*143-2);i++)
_delay_1ms:
i --> R16
0078 E001 LDI R16,1
0079 E010 LDI R17,0
007A C002 RJMP 0x007D
007B 5F0F SUBI R16,0xFF
007C 4F1F SBCI R17,0xFF
007D 3E0E CPI R16,0xEE
007E E0E8 LDI R30,0x8
007F 071E CPC R17,R30
0080 F3D0 BCS 0x007B
0081 9508 RET
(0020) ;
(0021) }
(0022)
(0023) void delay_1us(void)
(0024) {
(0025) asm("nop");
_delay_1us:
0082 0000 NOP
(0026) asm("nop");
0083 0000 NOP
(0027) asm("nop");asm("nop");
0084 0000 NOP
0085 0000 NOP
0086 9508 RET
_delay_nms:
i --> R20
n --> R22
0087 940E00B0 CALL push_gset2
0089 01B8 MOVW R22,R16
(0028) }
(0029)
(0030) void delay_nms(uint n)
(0031) {
(0032) uint i=0;
008A 2744 CLR R20
008B 2755 CLR R21
(0033) for ( i=0; i<n; i++)
008C C003 RJMP 0x0090
(0034) {
(0035) delay_1ms();
008D DFEA RCALL _delay_1ms
008E 5F4F SUBI R20,0xFF
008F 4F5F SBCI R21,0xFF
0090 1746 CP R20,R22
0091 0757 CPC R21,R23
0092 F3D0 BCS 0x008D
(0036) }
(0037) WDR();
0093 95A8 WDR
0094 940E00A7 CALL pop_gset2
0096 9508 RET
_delay_nus:
i --> R20
n --> R22
0097 940E00B0 CALL push_gset2
0099 01B8 MOVW R22,R16
(0038) }
(0039)
(0040) void delay_nus(uint n)
(0041) {
(0042) uint i=0;
009A 2744 CLR R20
009B 2755 CLR R21
(0043) for ( i=0; i<n; i++)
009C C003 RJMP 0x00A0
(0044) {
(0045) delay_1us();
009D DFE4 RCALL _delay_1us
009E 5F4F SUBI R20,0xFF
009F 4F5F SBCI R21,0xFF
00A0 1746 CP R20,R22
00A1 0757 CPC R21,R23
00A2 F3D0 BCS 0x009D
(0046) }
(0047) WDR();
FILE: <library>
00A3 95A8 WDR
00A4 940E00A7 CALL pop_gset2
00A6 9508 RET
pop_gset2:
00A7 E0E2 LDI R30,2
00A8 940C00B6 JMP pop
push_gset5:
00AA 92FA ST R15,-Y
00AB 92EA ST R14,-Y
push_gset4:
00AC 92DA ST R13,-Y
00AD 92CA ST R12,-Y
push_gset3:
00AE 92BA ST R11,-Y
00AF 92AA ST R10,-Y
push_gset2:
00B0 937A ST R23,-Y
00B1 936A ST R22,-Y
push_gset1:
00B2 935A ST R21,-Y
00B3 934A ST R20,-Y
00B4 9508 RET
pop_gset1:
00B5 E0E1 LDI R30,1
pop:
00B6 9149 LD R20,Y+
00B7 9159 LD R21,Y+
00B8 FDE0 SBRC R30,0
00B9 9508 RET
00BA 9169 LD R22,Y+
00BB 9179 LD R23,Y+
00BC FDE1 SBRC R30,1
00BD 9508 RET
00BE 90A9 LD R10,Y+
00BF 90B9 LD R11,Y+
00C0 FDE2 SBRC R30,2
00C1 9508 RET
00C2 90C9 LD R12,Y+
00C3 90D9 LD R13,Y+
00C4 FDE3 SBRC R30,3
00C5 9508 RET
00C6 90E9 LD R14,Y+
00C7 90F9 LD R15,Y+
00C8 9508 RET
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