reg_access.sv

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// 
// -------------------------------------------------------------
//    Copyright 2004-2008 Synopsys, Inc.
//    All Rights Reserved Worldwide
// 
//    Licensed under the Apache License, Version 2.0 (the
//    "License"); you may not use this file except in
//    compliance with the License.  You may obtain a copy of
//    the License at
// 
//        http://www.apache.org/licenses/LICENSE-2.0
// 
//    Unless required by applicable law or agreed to in
//    writing, software distributed under the License is
//    distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
//    CONDITIONS OF ANY KIND, either express or implied.  See
//    the License for the specific language governing
//    permissions and limitations under the License.
// -------------------------------------------------------------
// 


`include "ral_env.svh"

`ifndef RAL_TB_ENV
`define RAL_TB_ENV tb_env
`endif


program reg_access;

vmm_log log = new("Reg Access", "Test");
`RAL_TB_ENV env = new;

initial
begin
   vmm_ral_block_or_sys ral_model;
   vmm_ral_reg regs[];

   ral_model = env.ral.get_model();
   if (ral_model == null) begin
      `vmm_fatal(log, "No RAL abstraction model was specified");
   end

   env.reset_dut();
   ral_model.reset();

   // Iterate over all registers, checking accesses
   ral_model.get_registers(regs);
   foreach (regs[i]) begin: next_reg
      string domains[];

      // Can only deal with registers with backdoor access
      if (regs[i].get_backdoor() == null) begin
         `vmm_warning(log, $psprintf("Register \"%s\" does not have a backdoor mechanism available",
                                     regs[i].get_fullname()));
         continue;
      end

      // Registers may be accessible from multiple physical interfaces (domains)
      regs[i].get_domains(domains);

      // Cannot test access if register contains RO or OTHER fields
      begin
         vmm_ral_field fields[];
         regs[i].get_fields(fields);
         foreach (fields[j]) begin
            foreach (domains[k]) begin
               if (fields[j].get_access(domains[k]) == vmm_ral::RO) begin
                  `vmm_warning(log, $psprintf("Register \"%s\" has RO bits",
                                              regs[i].get_fullname()));
                  disable next_reg;
               end
               if (fields[j].get_access(domains[k]) >= vmm_ral::OTHER) begin
                  `vmm_warning(log, $psprintf("Register \"%s\" has OTHER or USER bits",
                                              regs[i].get_fullname()));
                  disable next_reg;
               end
            end
         end
      end

      // Access each register:
      // - Write complement of reset value via front door
      // - Read value via backdoor and compare against mirror
      // - Write reset value via backdoor
      // - Read via front door and compare against mirror
      foreach (domains[j]) begin
         vmm_rw::status_e status;
         bit [`VMM_RAL_DATA_WIDTH-1:0] v, exp;
      
         `vmm_note(log, $psprintf("Verifying access of register %s in domain \"%s\"...",
                                  regs[i].get_fullname(), domains[j]));

         v = regs[i].get();

         regs[i].write(status, ~v, vmm_ral::BFM, domains[j]);
         if (status != vmm_rw::IS_OK) begin
            `vmm_error(log, $psprintf("Status was %s when writing \"%s\" through domain \"%s\".",
                                      status.name(), regs[i].get_fullname(), domains[j]));
         end

         regs[i].mirror(status, vmm_ral::VERB, vmm_ral::BACKDOOR);
         if (status != vmm_rw::IS_OK) begin
            `vmm_error(log, $psprintf("Status was %s when reading reset value of register \"%s\" through backdoor.",
                                      status.name(), regs[i].get_fullname()));
         end

         regs[i].write(status, v, vmm_ral::BACKDOOR, domains[j]);
         if (status != vmm_rw::IS_OK) begin
            `vmm_error(log, $psprintf("Status was %s when writing \"%s\" through backdoor.",
                                      status.name(), regs[i].get_fullname()));
         end

         regs[i].mirror(status, vmm_ral::VERB, vmm_ral::BFM, domains[j]);
         if (status != vmm_rw::IS_OK) begin
            `vmm_error(log, $psprintf("Status was %s when reading reset value of register \"%s\" through domain \"%s\".",
                                      status.name(), regs[i].get_fullname(), domains[j]));
         end
      end
   end
   
   env.log.report();
end
endprogram: reg_access