hw_reset.sv

VMM 文档加源码, synopsys公司很好的验证资料

// 
// -------------------------------------------------------------
//    Copyright 2004-2008 Synopsys, Inc.
//    All Rights Reserved Worldwide
// 
//    Licensed under the Apache License, Version 2.0 (the
//    "License"); you may not use this file except in
//    compliance with the License.  You may obtain a copy of
//    the License at
// 
//        http://www.apache.org/licenses/LICENSE-2.0
// 
//    Unless required by applicable law or agreed to in
//    writing, software distributed under the License is
//    distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
//    CONDITIONS OF ANY KIND, either express or implied.  See
//    the License for the specific language governing
//    permissions and limitations under the License.
// -------------------------------------------------------------
// 


`include "ral_env.svh"

`ifndef RAL_TB_ENV
`define RAL_TB_ENV tb_env
`endif


program hw_reset;

vmm_log log = new("Reset Value", "Test");
`RAL_TB_ENV env = new;

initial
begin
   vmm_ral_block_or_sys ral_model;
   vmm_ral_reg regs[];

   ral_model = env.ral.get_model();
   if (ral_model == null) begin
      `vmm_fatal(log, "No RAL abstraction model was specified");
   end

   env.reset_dut();
   ral_model.reset();

   // Iterate over all registers, checking the reset values
   ral_model.get_registers(regs);
   foreach (regs[i]) begin
      string domains[];

      // Registers may be accessible from multiple physical interfaces (domains)
      regs[i].get_domains(domains);

      // Verify the initial (reset) value in each domain
      foreach (domains[j]) begin
         vmm_rw::status_e status;
         bit [`VMM_RAL_DATA_WIDTH-1:0] v;
      
         `vmm_note(log, $psprintf("Verifying reset value of register %s in domain \"%s\"...",
                                  regs[i].get_fullname(), domains[j]));

         regs[i].mirror(status, vmm_ral::VERB, vmm_ral::BFM, domains[j]);
         if (status != vmm_rw::IS_OK) begin
            `vmm_error(log, $psprintf("Status was %s when reading reset value of register \"%s\" through domain \"%s\".",
                                      status.name(), regs[i].get_fullname(), domains[j]));
         end
      end
   end
   
   env.log.report();
end
endprogram: hw_reset