📄 mf_rc500.lst
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C51 COMPILER V7.08 MF_RC500 01/18/2004 17:34:11 PAGE 1
C51 COMPILER V7.08, COMPILATION OF MODULE MF_RC500
OBJECT MODULE PLACED IN MF_RC500.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE MF_RC500.c ROM(COMPACT) BROWSE DEBUG OBJECTEXTEND
line level source
1 #include "MF_RC500.h"
2 #include "MF_Func.h"
3
4
5 void RC_WriteRawData(unsigned char Address,unsigned char value)
6 {XBYTE[Address]=value;}
7 unsigned char RC_ReadRawData(unsigned char Address)
8 {return XBYTE[Address];}
9
10 //write to mfrc500
11 void RC_WriteRC(unsigned char Address, unsigned char value)
12 {
13 1 RC_WriteRawData(0x0,GetRegPage(Address));
14 1 RC_WriteRawData(Address,value);
15 1 }
16 //read from mfrc500
17 unsigned char RC_ReadRC(unsigned char Address)
18 {
19 1 RC_WriteRawData(0x0,GetRegPage(Address));
20 1 return RC_ReadRawData(Address);
21 1 }
22
23 void RC_SetTmod(unsigned char tmoLength)
24 {
25 1
26 1 switch(tmoLength)
27 1 {
28 2 case tmod_1ms: // 1ms
29 2 RC_WriteRC(RegTimerClock,0x07);
30 2 RC_WriteRC(RegTimerReload,0x6a);
31 2 break;
32 2 case tmod_1_5ms: // 1.5ms
33 2 RC_WriteRC(RegTimerClock,0x07);
34 2 RC_WriteRC(RegTimerReload,0xa0);
35 2 break;
36 2 case tmod_6ms: // 6ms
37 2 RC_WriteRC(RegTimerClock,0x09);
38 2 RC_WriteRC(RegTimerReload,0xa0);
39 2 break;
40 2 case tmod_9_6ms: //9.6ms
41 2 RC_WriteRC(RegTimerClock,0x09);
42 2 RC_WriteRC(RegTimerReload,0xff);
43 2 break;
44 2 default:
45 2 RC_WriteRC(RegTimerClock,0x07);
46 2 RC_WriteRC(RegTimerReload,tmoLength);
47 2 break;
48 2 }
49 1 }
50 char RC_Command(unsigned char cmd,
51 volatile unsigned char data *rcv,
52 MfCmdInfo idata *info)
53 {
54 1 char idata status = MI_OK;
55 1 char idata tmpStatus ;
C51 COMPILER V7.08 MF_RC500 01/18/2004 17:34:11 PAGE 2
56 1 unsigned char idata lastBits;
57 1 unsigned int idata timecnt=0;
58 1
59 1 unsigned char idata irqEn = 0x00;
60 1 unsigned char idata waitFor = 0x00;
61 1 unsigned char idata timerCtl = 0x00;
62 1
63 1 RC_WriteRC(RegInterruptEn,0x7F);
64 1 RC_WriteRC(RegInterruptRq,0x7F);
65 1 RC_WriteRC(RegCommand,PCD_IDLE);
66 1
67 1 RC_FlushFIFO();
68 1 MpIsrInfo = info;
69 1 MpIsrOut = rcv;
70 1 info->irqSource = 0x0;
71 1 switch(cmd)
72 1 {
73 2 case PCD_IDLE:
74 2 irqEn = 0x00;
75 2 waitFor = 0x00;
76 2 break;
77 2 case PCD_WRITEE2:
78 2 irqEn = 0x11;
79 2 waitFor = 0x10;
80 2 break;
81 2 case PCD_READE2:
82 2 irqEn = 0x07;
83 2 waitFor = 0x04;
84 2 break;
85 2 case PCD_LOADCONFIG:
86 2 case PCD_LOADKEYE2:
87 2 case PCD_AUTHENT1:
88 2 irqEn = 0x05;
89 2 waitFor = 0x04;
90 2 break;
91 2 case PCD_CALCCRC:
92 2 irqEn = 0x11;
93 2 waitFor = 0x10;
94 2 break;
95 2 case PCD_AUTHENT2:
96 2 irqEn = 0x04;
97 2 waitFor = 0x04;
98 2 break;
99 2 case PCD_RECEIVE:
100 2 info->nBitsReceived = -(RC_ReadRC(RegBitFraming) >> 4);
101 2 irqEn = 0x06;
102 2 waitFor = 0x04;
103 2 break;
104 2 case PCD_LOADKEY:
105 2 irqEn = 0x05;
106 2 waitFor = 0x04;
107 2 break;
108 2 case PCD_TRANSMIT:
109 2 irqEn = 0x05;
110 2 waitFor = 0x04;
111 2 break;
112 2 case PCD_TRANSCEIVE:
113 2 info->nBitsReceived = -(RC_ReadRC(RegBitFraming) >> 4);
114 2 irqEn = 0x3D;
115 2 waitFor = 0x04;
116 2 break;
117 2 default:
C51 COMPILER V7.08 MF_RC500 01/18/2004 17:34:11 PAGE 3
118 2 status = MI_UNKNOWN_COMMAND;
119 2 }
120 1 if (status == MI_OK)
121 1 {
122 2 irqEn |= 0x20;
123 2 waitFor |= 0x20;
124 2 timecnt=1000;
125 2 RC_WriteRC(RegInterruptEn,irqEn | 0x80);
126 2 RC_WriteRC(RegCommand,cmd);
127 2 while (!(MpIsrInfo->irqSource & waitFor||!(timecnt--)));
128 2 RC_WriteRC(RegInterruptEn,0x7F);
129 2 RC_WriteRC(RegInterruptRq,0x7F);
130 2 RC_SetBit(RegControl,0x04);
131 2 RC_WriteRC(RegCommand,PCD_IDLE);
132 2 if (!(MpIsrInfo->irqSource & waitFor))
133 2 {
134 3 status = MI_ACCESSTIMEOUT;
135 3 }
136 2 else
137 2 status = MpIsrInfo->status;
138 2
139 2 if (status == MI_OK)
140 2 {
141 3 if (tmpStatus = (RC_ReadRC(RegErrorFlag) & 0x17))
142 3 {
143 4 if (tmpStatus & 0x01)
144 4 {
145 5 info->collPos = RC_ReadRC(RegCollPos);
146 5 status = MI_COLLERR;
147 5 }
148 4 else
149 4 {
150 5 info->collPos = 0;
151 5 if (tmpStatus & 0x02)
152 5 {
153 6 status = MI_PARITYERR;
154 6 }
155 5 }
156 4 if (tmpStatus & 0x04)
157 4 {
158 5 status = MI_FRAMINGERR;
159 5 }
160 4 if (tmpStatus & 0x10)
161 4 {
162 5 RC_FlushFIFO();
163 5 status = MI_OVFLERR;
164 5 }
165 4 if (tmpStatus & 0x08)
166 4 {
167 5 status = MI_CRCERR;
168 5 }
169 4 if (status == MI_OK)
170 4 status = MI_NY_IMPLEMENTED;
171 4 }
172 3 if (cmd == PCD_TRANSCEIVE)
173 3 {
174 4 lastBits = RC_ReadRC(RegSecondaryStatus) & 0x07;
175 4 if (lastBits)
176 4 info->nBitsReceived += (info->nBytesReceived-1) * 8 + lastBits;
177 4 else
178 4 info->nBitsReceived += info->nBytesReceived * 8;
179 4 }
C51 COMPILER V7.08 MF_RC500 01/18/2004 17:34:11 PAGE 4
180 3 }
181 2 else
182 2 {
183 3 info->collPos = 0x00;
184 3 }
185 2 }
186 1 MpIsrInfo = 0;
187 1 MpIsrOut = 0;
188 1 MpIsrOut = 0;
189 1 return status;
190 1 }
191
192 char RC_SetBit(unsigned char reg,unsigned char mask) //
193 {
194 1 char idata tmp = 0x0;
195 1
196 1 tmp = RC_ReadRC(reg);
197 1 RC_WriteRC(reg,tmp | mask); // set bit mask
198 1 return 0x0;
199 1 }
200
201 char RC_ClearBit(unsigned char reg,unsigned char mask) //
202 {
203 1 char idata tmp = 0x0;
204 1
205 1 tmp = RC_ReadRC(reg);
206 1 RC_WriteRC(reg,tmp & ~mask); // clear bit mask
207 1 return 0x0;
208 1 }
209
210 void RC_FlushFIFO(void)
211 {
212 1 RC_SetBit(RegControl,0x01);
213 1 }
214 // M I F A R E H A L T
215 char MF_Halt(void)
216 {
217 1 char idata status = MI_CODEERR;
218 1
219 1 // ************* Cmd Sequence **********************************
220 1 ResetInfo(MInfo);
221 1 SerBuffer[0] = PICC_HALT ; // Halt command code
222 1 SerBuffer[1] = 0x00; // dummy address
223 1 MInfo.nBytesToSend = 2;
224 1 status = RC_Command(PCD_TRANSCEIVE,
225 1 SerBuffer,
226 1 &MInfo);
227 1 if (status)
228 1 {
229 2 // timeout error ==> no NAK received ==> OK
230 2 if (status == MI_NOTAGERR || status == MI_ACCESSTIMEOUT)
231 2 status = MI_OK;
232 2 }
233 1 //reset command register - no response from tag
234 1 RC_WriteRC(RegCommand,PCD_IDLE);
235 1 return status;
236 1 }
237
238
239
240 char MF_Reset(void)
241 {
C51 COMPILER V7.08 MF_RC500 01/18/2004 17:34:11 PAGE 5
242 1 char idata status = MI_OK;
243 1 unsigned int idata timecnt=0;
244 1 RC500RST = 0;
245 1 delay_1ms(50);
246 1 RC500RST = 1;
247 1 delay_1ms(20);
248 1 RC500RST = 0;
249 1 delay_1ms(20);
250 1 timecnt=1000;
251 1 while ((RC_ReadRC(RegCommand) & 0x3F)&&timecnt--);
252 1 if(!timecnt)
253 1 status = MI_RESETERR;
254 1 if (status == MI_OK)
255 1 {
256 2 RC_WriteRC(RegPage,0x80);
257 2
258 2 timecnt=1000;
259 2 while (RC_ReadRC(RegCommand)&&timecnt--);
260 2 if(!timecnt)
261 2 status = MI_INTERFACEERR;
262 2 RC_WriteRC(RegPage,0x00);
263 2 timecnt=1000;
264 2 while (RC_ReadRC(RegCommand)&&timecnt--);
265 2 if(!timecnt)
266 2 status = MI_INTERFACEERR;
267 2
268 2 /*
269 2 if (RC_ReadRC(RegCommand) != 0x00)
270 2 {
271 2 status = MI_INTERFACEERR;
272 2 }
273 2 */
274 2 }
275 1 return status;
276 1 }
277
278 void MF_Config(void)
279 {
280 1 if (MF_Reset()!= MI_OK)
281 1 while(1)
282 1 {
283 2 LED1=0;
284 2 WDG=!WDG;
285 2 }
286 1 RC_WriteRC(RegClockQControl,0x0);
287 1 RC_WriteRC(RegClockQControl,0x40);
288 1 delay_50us(2);
289 1 RC_ClearBit(RegClockQControl,0x40);
290 1 RC_WriteRC(RegBitPhase,0xAD);
291 1 RC_WriteRC(RegRxThreshold,0xFF);
292 1 RC_WriteRC(RegRxControl2,0x01);
293 1 RC_WriteRC(RegFIFOLevel,0x1A);
294 1 RC_WriteRC(RegTimerControl,0x02);
295 1 RC_WriteRC(RegIRqPinConfig,0x03);
296 1 RC_WriteRC(RegMfOutSelect,2&0x7);
297 1 MF_RfReset(1);
298 1 }
299 char MF_Request(unsigned char req_code,unsigned char *atq)
300 {
301 1 char idata status = MI_OK;
302 1
303 1 RC_SetTmod(tmod_6ms);
C51 COMPILER V7.08 MF_RC500 01/18/2004 17:34:11 PAGE 6
304 1 RC_WriteRC(RegChannelRedundancy,0x03);
305 1 RC_ClearBit(RegControl,0x08);
306 1 RC_WriteRC(RegBitFraming,0x07);
307 1 RC_SetBit(RegTxControl,0x03);
308 1 ResetInfo(MInfo);
309 1 SerBuffer[0] = req_code;
310 1 MInfo.nBytesToSend = 1;
311 1 status = RC_Command(PCD_TRANSCEIVE,SerBuffer,&MInfo);
312 1 if (status)
313 1 *atq = 0;
314 1 else
315 1 {
316 2 if (MInfo.nBitsReceived != 16)
317 2 {
318 3 *atq = 0;
319 3 status = MI_BITCOUNTERR;
320 3 }
321 2 else
322 2 {
323 3 status = MI_OK;
324 3 memcpy(atq,SerBuffer,2);
325 3 }
326 2 }
327 1 return status;
328 1 }
329
330 char MF_Conflict (unsigned char bcnt,
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