syspciautoconfig.c

Vxworks的bsp软件开发包(基于wrPpmc74xx)

/* sysPciAutoConfig.c - Wind River PPMC74xx PCI autoconfig support */

/* Copyright 1984-2001 Wind River Systems, Inc. */


/*
modification history
--------------------
01d,09nov01,g_h  Remove include "wrPpmc74xx.h".
01c,23oct01,g_h   Cleaning for T2.2
01b,08aug01,g_h   changing sysPciAutoConfigIntAsgn() to return 0.
01a,30mar01,g_h   written.
*/

/*
DESCRIPTION

This module contains the "non-generic" or "board specific" PCI-PCI
bridge initialization code.  The module contains code to:

  1.  Determine if a particular function is to be excluded from the
          automatic configuration process.
  2.  Program the "interrupt line" field of the PCI configuration header.

*/

/* includes */

#include "vxWorks.h"
#include "logLib.h"
#include "taskLib.h"
#include "config.h"

#include "drv/pci/pciAutoConfigLib.h"

/* globals */

PCI_SYSTEM sysParams;

/* locals */

/* forward declarations */

LOCAL UCHAR  sysPciAutoConfigIntAsgn ( PCI_SYSTEM * pSys, PCI_LOC * pFunc, UCHAR intPin );
LOCAL STATUS sysPciAutoConfigInclude ( PCI_SYSTEM *pSys, PCI_LOC *pciLoc, UINT devVend );

/* Latency Timer value - 64 PCI clocks */
#undef  PCI_LAT_TIMER
#define PCI_LAT_TIMER	0x40

/* subroutines */

/***************************************************************************
*
* sysPciAutoConfigInclude - Determine if function is to be autoConfigured
*
* This function is called with PCI bus, device, function, and vendor
* information.  It returns an indication of whether or not the particular
* function should be included in the automatic configuration process.
* This capability is useful if it is desired that a particular function
* NOT be automatically configured.  Of course, if the device is not
* included in automatic configuration, it will be unusable unless the
* user's code made provisions to configure the function outside of the
* the automatic process.
*
* RETURNS: TRUE if function is to be included in automatic configuration,
* FALSE otherwise.
*/

LOCAL int sysPciAutoConfigInclude
    (
    PCI_SYSTEM *pSys,		/* input: AutoConfig system information */
    PCI_LOC *pciLoc,		/* input: PCI address of this function */
    UINT     devVend		/* input: Device/vendor ID number      */
    )
    {
    STATUS retVal = OK ; 

    switch (devVend)
	 {
	 /* example code for an excluded device */
	 default:
	     retVal = OK;
	     break;
	 }

    return(retVal);
    }

/***************************************************************************
*
* sysPciAutoConfigIntAssign - Assign the "interrupt line" value.
*
* This routiner assign the interrupt line value.
*
* RETURNS: "interrupt line" value.
*/

LOCAL UCHAR sysPciAutoConfigIntAsgn
    ( 
    PCI_SYSTEM * pSys,		/* input: AutoConfig system information */
    PCI_LOC * pFunc,
    UCHAR intPin 		/* input: interrupt pin number */
    )
    {
    UCHAR retVal = 0xFF;

    switch(pFunc->bus)
         {
         case MPC107PCI_BRIDGE:
	     /* Base board */
             retVal = PCI_INTA_MPC107_IRQ0; /* Carrier board PCI slot */
    	     break;
         case INTEL21154PCI_BRIDGE:
	     /* PCI Expansion board */
             #ifdef INT_ON_EXPANTION_BOARD_TAID
             retVal = PCI_INTA_MPC107_IRQ0;
             #else /* Interrupt are not taid */
             switch (pFunc->device)
                  {
                  case EXPANTION_BOARD_1PCI_SLOT:
                      retVal = PCI_INTA_MPC107_IRQ0;
	              break;
                  case EXPANTION_BOARD_2PCI_SLOT:
                      retVal = PCI_INTB_MPC107_IRQ1;
                      break;
                  case EXPANTION_BOARD_3PCI_SLOT:
                      retVal = PCI_INTC_MPC107_IRQ2;
                      break;
                  case EXPANTION_BOARD_4PCI_SLOT:
                      retVal = PCI_INTD_MPC107_IRQ3;
                      break;
                  }     
             #endif /* INT_ON_EXPANTION_BOARD_TAID */
        }

    return(retVal);
    }


/****************************************************************************
* sysPciConfigWrite - write to one PCI configuration space register location
*
* This routine writes one PCI configuration space register location of the 
* specified size (1, 2 or 4 bytes).
*
* RETURNS: OK
*
* SEE ALSO: sysPciConfigRead()
*/

STATUS sysPciConfigWrite
    (
    int bus,
    int device,
    int function,
    int offset,     /* offset into the configuration space */
    int width,      /* data width                          */
    UINT data       /* data to be written                  */
    )
    {
    int             key;
    UINT            busDevFunc;
    volatile UINT32 tmpData;

    /*
     * bit 31 must be 1 and bits 1:0 must be 0 (note LE bit notation)
     */
    busDevFunc = pciConfigBdfPack (bus, device, function);

#ifdef HOST_BRIDGE_IDSEL
    if ( ((busDevFunc >> 11) & 0x1f) == HOST_BRIDGE_IDSEL )
	return (OK);
#endif

    key = intLock();
	
    tmpData = sysMpc107CfgRead (0xC0,REG_32BIT);

    sysMpc107CfgWrite (0xC0,0,REG_32BIT);

    sysMpc107PciOutLong (PCI_ADDRESS_REGISTER, busDevFunc | 0x80000000 | (offset & ~3));

    switch (width)
	 {
	 case 4:
	     sysMpc107PciOutLong (PCI_DATA_REGISTER, data);
             break;
	 case 2:
	     sysMpc107PciOutWord (PCI_DATA_REGISTER + (offset & 3), data);
	     break;
	 case 1:
	 default:
	     sysMpc107PciOutByte (PCI_DATA_REGISTER + (offset & 3), data);
	     break;
	}

    sysMpc107CfgWrite (0xC1,0xFF,REG_8BIT);
    sysMpc107CfgWrite (0xC5,0xFF,REG_8BIT);
    sysMpc107CfgWrite (0x06,0xFF00,REG_16BIT);
    sysMpc107CfgWrite (0xC0,tmpData,REG_8BIT);

    intUnlock (key);

    return (OK);
    }

/***************************************************************************
*
* sysPciConfigRead - reads one PCI configuration space register location
*
* This routine reads one PCI configuration space register location of the
* specified size (1, 2 or 4 bytes).
*
* RETURNS : OK
*
* SEE ALSO: sysPciConfigWrite()
*/
STATUS sysPciConfigRead
    (
    int    bus,
    int    device,
    int    function,
    int    offset,     /* offset into the configuration space */
    int    width,      /* data width                          */
    void  *pResult
    )
    {
    int             key;
    UINT32          data;
    UCHAR *         pCfgByte;
    UINT16 *        pCfgWord;
    UINT *          pCfgLong;
    UINT            busDevFunc;
    volatile UINT32 tmpData;


    /*
     * bit 31 must be 1 and bits 1:0 must be 0 (note LE bit notation)
     */
    busDevFunc = pciConfigBdfPack (bus, device, function);

    #ifdef HOST_BRIDGE_IDSEL
    if ( ((busDevFunc >> 11) & 0x1F) == HOST_BRIDGE_IDSEL )
	{
	data = (UINT32)-1;
	pCfgLong  = (UINT *)pResult;
        *pCfgLong = (UINT)data;
	return (OK);
	}
    #endif

    key = intLock();

    tmpData = sysMpc107CfgRead (0xC0,REG_32BIT);

    sysMpc107CfgWrite (0xC0,0,REG_32BIT);

    sysMpc107PciOutLong (PCI_ADDRESS_REGISTER, busDevFunc | 0x80000000 | (offset & ~3));

    switch (width)
         {
         case 4:
             data = sysMpc107PciInLong (PCI_DATA_REGISTER);
             pCfgLong  = (UINT *)pResult;
             *pCfgLong = (UINT)data;
             break;
	 case 2:
	     data = sysMpc107PciInWord(PCI_DATA_REGISTER + (offset & 3));
             pCfgWord  = (UINT16 *)pResult;
             *pCfgWord = (UINT16)data;
	     break;
	 case 1:
	 default:
	     data = sysMpc107PciInByte (PCI_DATA_REGISTER + (offset & 3));
             pCfgByte  = (UCHAR *)pResult;
             *pCfgByte = (UCHAR)data;
             break;
	}

    sysMpc107CfgWrite (0xC1,0xFF,REG_8BIT);
    sysMpc107CfgWrite (0xC5,0xFF,REG_8BIT);
    sysMpc107CfgWrite (0x06,0xFF00,REG_16BIT);
    sysMpc107CfgWrite (0xC0,tmpData,REG_8BIT);

    intUnlock (key);                            /* mutual exclusion stop */
	
    return (OK);
    }

/***************************************************************************
*
* sysPciAutoConfig - PCI autoConfig support routine
*
* This routine instantiates the PCI_SYSTEM structure needed to configure
* the system. This consists of assigning address ranges to each category
* of PCI system resource: Prefetchable and Non-Prefetchable 32-bit Memory, and
* 16- and 32-bit I/O. Global values for the Cache Line Size and Maximum
* Latency are also specified. Finally, the four supplemental routines for 
* device inclusion/exclusion, interrupt assignment, and pre- and
* post-enumeration bridge initialization are specified. 
*
* RETURNS: N/A
*/

void sysPciAutoConfig 
    (
    void
    )
    {
    UINT32	ultmp,picr1;
    UINT16	ustmp, pciStatus;


    sysParams.pciMemIo32           = PCI_PP_MEM_START;
    sysParams.pciMemIo32Size       = PCI_PP_MEM_SIZE;

    /* 32-bit Prefetchable Memory Space */

    sysParams.pciMem32             = 0;
    sysParams.pciMem32Size         = 0;

    /* 16-bit ISA I/O Space - First block of memory in the I/O space */

    sysParams.pciIo16              = BRD_PCIIO_CPU2PCI(PCI_PP_IO16_START,HOST_BRIDGE_NUM);
    sysParams.pciIo16Size          = PCI_PP_IO16_SIZE;

    /* 32-bit PCI I/O Space - Remaining memory in the I/O space */

    sysParams.pciIo32              = BRD_PCIIO_CPU2PCI(PCI_PP_IO_START,HOST_BRIDGE_NUM);
    sysParams.pciIo32Size          = PCI_PP_IO_SIZE;

    /* Configuration space parameters */
 
    sysParams.cacheSize            = ( _CACHE_ALIGN_SIZE / 4 );
    sysParams.maxLatency           = PCI_LAT_TIMER;
    sysParams.autoIntRouting       = FALSE;
    sysParams.includeRtn           = sysPciAutoConfigInclude;
    sysParams.intAssignRtn         = sysPciAutoConfigIntAsgn;
    sysParams.bridgePreConfigInit  = NULL;
    sysParams.bridgePostConfigInit = NULL;

    pciConfigInLong (0,0,0,0xa8,&ultmp);	/* read PICR1 */
    picr1 = ultmp;
    ultmp &= ~0x00000c00;			/* diable TEA and MCP */
    pciConfigOutLong (0,0,0,0xa8,ultmp);
	
    pciConfigInLong (0,16,0,0x00,&ultmp);	/* read dev 0x10 */
    pciConfigInWord (0,0,0,6,&ustmp);
    pciStatus = ustmp;
    pciConfigOutWord (0,0,0,6,ustmp);
    pciConfigInLong (0,17,0,0x00,&ultmp);	/* read dev 0x11 */
    pciConfigInWord (0,0,0,6,&ustmp);
    pciStatus &= ustmp;
    pciConfigOutWord (0,0,0,6,ustmp);
    pciConfigOutLong (0,0,0,0xa8,picr1);

    /* Perform AutoConfig */
    if (!(pciStatus & 0x2000))
	{
	pciAutoConfig (&sysParams);
	}
}