target.nr

Vxworks的bsp软件开发包(基于wrPpmc74xx)

command line in order to get the card Ethernet address.

.SS "ROM Considerations"
bootrom_uncmp.bin is provided with this BSP. The bootrom is configured to 
a ROM base address of 0x0. When programing the bootrom to the FLASH an offset
of 0xFFF00100 need to be given, also it's configured to use the 4 MByte on 
board Flash ROM and the 100/10BaseT Intel 82557/9 PCI Ethernet card as default 
boot device and the RS232 as console device. The bootrom takes approximately 10 
seconds to boot, using the vWARE it take 1 second.

.SS "BOOT FLASH"
The BSP configures to use the 4MByte On Board Flash. This is the only Flash on 
the board.

.SS "Serial Configuration"
The NS 16550 UART is configured as UART devices with 8 data bits, 1 stop
bit, hardware handshaking, and parity disabled.

.SS "Serial Connections"
This VxWorks PPMC74xx board uses a simple 3 wire connection and standard 
phone jacks where pin 1 = RIN, pin 2 = TOUT, pin 3 = NC, and pin 4 = GND.

.SS "SCSI Configuration"
There is no SCSI interface on this board.

.SS "VME Access"
N/A

.SS "PCI Access"
Two 32-bit address, 32-bit data; complies with PCI Local Bus Specification, 
Revision 2.1 The MPC107 on the PMC module is the PCI bridge.

.SS "Delivered Objects"
The following images are delivered with the wrPpmc74xx BSP:

.IP
bootrom_uncmp
.IP
bootrom_uncmp.hex
.IP
bootrom
.IP
bootrom.hex
.IP
vxWorks
.IP
vxWorks.st
.LP

.SS "Make Targets"
Only bootrom_uncmp, bootrom & vxWorks have been tested.

.SH "SPECIAL CONSIDERATIONS"
This section describes miscellaneous information that the user needs
to know about the BSP.

.SS "Problem using visionPROBE II/visionICE II running vxWorks image or bootrom"
When using visionPROBE II or visionICE II to run vxWorks image or bootrom you need to set
the VECTOR table location to low. To do this type the following command in visionCLICK Terminal window
or SingleStep commandline window:

.CS
    CF VECTOR LOW
.CE

And press enter after it. Failing to do this will result with crushing  at address 0x0 after pressing the GO
button. The reason for this is, VxWorks is setting the Vector table to LOW, and by default visionPROBE/ICE
ia setting it to HIGH.

** NOTE: If you are using visionPROBE II/visionICE II to program the Flash, this option should be set to high.

.CS
    CF VECTOR HIGH
.CE

.SS "Known Problems"

.SS "PCI Arbiter PLD version"
In order to be able to work with the Intel 82557/9 NIC the
PCI ARB PLD version should be 4.0 or higher. The 
PCI ARB PLD is the chip in socket UX1. On the chip you can
see a label with the version number.

.SH "BOARD LAYOUT"
The diagram below shows the location of jumpers relevant to VxWorks:

.bS

 _______________________________________________________________________
|                       +------------+                                  |
|                       |     J4     |                                  |
|                       +------------+                                  |
|    +----------------+ +------------+                                  |
|    |                | |     J3     |                            +---+ |
|    |    Motorola    | +------------+                            |   | |
|+-+ |                | +------------+                            |   | |
||J| |    XPC 7400    | |     J1     |                            |   | |
||P| |                | +------------+                            |   | |
||3| |                | +---+      +---+              +---+       | J | |
||9| |                | |JP1|      |JP5|              |UX1|       | P | |
|+-+ +----------------+ +---+      +---+              +---+       | 3 | |
| +------+              +---+ +---+ +---+                         | 8 | |
| |6 LEDs|              |SW1| |SW2| |SW3|                         |   | |
| +------+ +-------+    +---+ +---+ +---+                         |   | |
|+----+    |  JP6  |      +------------+                          |   | |
|| RS |    +-------+      |     J2     |                          |   | |
||232 |                   +------------+    \                     +---+ |
|+----+   +--------+      +------------+   JP4                          |
|         |  JP36  |      |     J5     |                                |
|         +--------+      +------------+                    PPMC- 7400  |
|_______________________________________________________________________|

.bE
    Key:
    UX1  - Clock Oscillator Socket
    J1   - Mictor Connectors
    J2   - Mictor Connectors
    J3   - Mictor Connectors
    J4   - Mictor Connectors
    J5   - Mictor Connectors
    JP4  - Ground Test Loop
    JP6  - 16 Pin JTAG/COP Debug Interface (Motorola Specified)
    JP36 - Wind River Mailbox Connector
    JP37 - MPC107 Watchpoint Trigger Control
    JP38 - Power Module Connector
    JP39 - EPLD ISP Header
	
	SW1/2/3 - Configuration Switches.
	          SW1-SW3 are three DIP switches that enable the user to configure
              the board to match the desired processor.
.bS

 _______________________________________________________________________
|                     ______________________________                    |
|                    |                              |                   |
|                    |                              |                   |
|                    |                              |                   |
|                     )     J6 - SODIMM SOCKET     (                    |
|                    |                              |                   |
|                    |                              |                   |
|                    |                              |                   |
|                    |                              |                   |
|                    |                              |                   |
|                     ------------------------------                    |
|                                  +----------------+     +-+     +-+   |
|                                  |    Motorola    |     | | P1  | |P2 |
|                                  |                |     | |     | |   |
|                                  |      +--+      |     | |     | |   |
|                                  |      |  |      |     | | +-+ | |   |
|                                  |      |  |      |     | | | | | |   |
|                                  |      |  |      |     | | | | | |   |
|                                  |      +--+      |     | | +-+ | |   |
|                                  |                |     | | JP40| |   |
|                                  |    XPC 107A    |     | |     | |   |
| Reverse side of PPMC - 7400      +----------------+     +-+     +-+   |  
|_______________________________________________________________________|

.bE
    Key:
    
    P1   - Standard 64-pin PPMC Connector
    P2   - Standard 64-pin PPMC Connector
    J6   - SODIMM Socket 
    JP40 - Auxiliary Power Connector

 .bS
 _______________       _________      
|               |     |         |     
|               |_____|         |     
|                               |     
|                               |     
|                               |     
|                               |     
|                               |     
|                        +-----+|     
|                        | SW1 ||     
|                        +-----+|     
|                               |     
|                               |     
|                               |     
|                               |     
|                               |     
|                               |     
|                               |     
|                               |     
|                               |     
|                _____  Power   |     
|               |     | Module  |     
|_______________|     |_________|     
.bE

.bS
  _________       _______________
 |     |  ||     |               |
 |     |J7||_____|               |
 |     |  |                      |
 |     +--+                      |
 | +---+                         |
 | |   |                         |
 | |   |                         |
 | |   |                         |
 | |   |                         |
 | |   |                         |
 | |   | J38                     |
 | |   |                         |
 | |   |                         |
 | |   |                         |
 | |   |                         |
 | |   |                         |
 | |   |                         |
 | +---+                         |
 |                               |
 |          _____ Reverse side of|
 |         |     |  Power Module |
 |_________|     |_______________|
.bE
    Key:
 
   SW1 6-Way DIP Switch Settings (used to set the processor core VCC settings)
   
   SW1-1 - PWR MOD SW1.1 (VID 4)
   SW1-2 - PWR MOD SW1.2 (VID 3)
   SW1-3 - PWR MOD SW1.3 (VID 2)
   SW1-4 - PWR MOD SW1.4 (VID 1)
   SW1-5 - PWR MOD SW1.5 (VID 0)
   SW1-6 - PWR MOD SW1.6 (N/C)
   
   J7    - Primary Power Input Connector
   JP38  - Power Module Connector

.bS
                                                      _______________________ 
                                                     |            |          |
 ____________________________________________________|     J2     |    J1    |_
|                                                    |____________|__________| |
|     JP8 \   -- JP4                         JP7 \                             |
|                                                                              |
|   +----------------+                                                         |
|   |      J22       |                                                         |
|   +----------------+                                                         |
|                                                                              |
|         +----+                                                               |
|         |JP10|                                                               |
|         +----+                                                               |
|   +----------------+ +----------------+                                      |
|   |      J21       | |      J20       |                                      |
|   +----------------+ +----------------+                                      |
|                                          +---+ +---+                         |
|                                          |   | |   |                         |
|                                          |   | |   |                         |
|                                          |   | |   |                         |
|                                          |   | |   |                         |
|                                          |PCI| |PCI|     ______              |
|                                          |   | |   |    |      \             |
|                                          |   | |   |    |  PCI  |       _____|
|                                          |   | |   |    |  ARB  |   F1 |J24  |
|                                          |   | |   |    |_______|  +-+ |_____|
|                                          |   | |   |               | |       |
|                                          |   | |   |        -- JP3 | |  _____|
|                                          |   | |   |  JP6 /        | | |     |
|                                          |   | |   |               | | | JP2 |
|                                          |   | |   |               | | |     |
|                                          |   | |   |               +-+ |_____|
|                                          |   | |   |                         |
|                                          +---+ +---+                  +-+    |
|                                            J4    J3                   | |    |
|                                                                  +--+ | |    |
|                                                                  |  | | |F2  |
|                                                                  |  | | |    |
|                                                                  |S1| | |    |
|                                                                  |  | +-+    |
|  PPMC Carrier Board                                              |  |        |
|                                                                  +--+        |
|______________________________________________________________________________|

.bE

	Key:

    S1   - Power ON/Off Switch
    F1   - F5A L 250V  Feuse
    F2   - F10A L 250V Feuse
    J1   - cPCI Connector
    J2   - cPCI Connector
    J3   - 32 bit PCI Connector
    J4   - 32 bit PCI Connector
    J20  - Standard 64-pin PPMC Connector
    J21  - Standard 64-pin PPMC Connector
    J22  - Standard 64-pin PPMC Connector
    J24  - Primar Power Input Connector +5V 5A
    JP2  - Primar Power Input Connector +5V 10A
    JP3  - PCI bus arbitration jumper
    JP4  - Causes the card to operate as Host
    JP6  - Ground Test Loop
    JP7  - Ground Test Loop
    JP8  - Ground Test Loop
    JP10 - Auxiliary Power Connector

SH "BIBLIOGRAPHY"
.iB "PPMC 750/755/7400 User's Manual"
.iB "Motorola MPC750 RISC Microprocessor User's Manual,"
.iB "Motorola PowerPC Microprocessor Family: The Programming Environments,"
.iB "Peripheral Component Interconnect (PCI) Local Bus Specification, Rev 2.1,"
.iB "PCI to PCI Bridge Architecture Specification 2.0,"
.iB "PICMG 2.0 D2.14 CompactPCI Specification,"
.iB "IEEE P1386.1 Draft 2.0 - PCI Mezzanine Card Specification (PMC),"