syslib.c

vxworks的bsp开发包(基于POWERPC的PRPMC800)

        {
        /* perform PCI configuration */

        if ( !PCI_AUTOCONFIG_DONE )
            {
            /* in ROM boot phase, OK to continue and configure PCI busses. */

            sysPciAutoConfig ();

            /* Remember that PCI is configured */

            PCI_AUTOCONFIG_FLAG = TRUE;     
            }

        }
    else
        {
        
#ifndef SLAVE_OWNS_ETHERNET

        /* Disable End interface for slaves */

        endDevTbl [0].endLoadFunc = END_TBL_END; 

#endif /* SLAVE_OWNS_ETHERNET */

        /* Wait for Host to enumerate my harrier */

        prpmcSlaveWaitConfig();
        }

    /* Now fix up the input translation offsets for Harrier, if necessary */

    (void) sysHarrierFixInp ();


#ifdef INCLUDE_DEC2155X

    /* 
     * Wait for the primary side Dec2155x configuring agent to
     * enable bus mastering.  By the time bus mastering is
     * enabled the primary Dec2155x configuring agent will
     * have filled in the primary side BARs which is necessary
     * to be done before we call sysDec2155xCapt().
     * The call to sysDec2155xInit() will fill
     * the translation tables which are ultimately used by
     * sysBusToLocalAdrs() and sysLocalToBusAdrs().
     */

    prpmcDec2155xWaitConfig();

   /* Capture the Dec 2155x address translation info. */

    sysDec2155xCapt ();

#endif

    /*
     *  Initialize the non-PCI Config Space registers of the
     *  Harrier Mpic.
     */

    sysMpicInit();

    /* set pointer to bus probing hook */

    _func_vxMemProbeHook = (FUNCPTR)sysBusProbe;

    /* Initialize COM1 serial channel */

    sysSerialHwInit();

    /* clear Harrier error conditions */

    sysHarrierErrClr ();

    /* Upon completion, clear BFL (Board Fail) LED */

    *(UINT32 *)HARRIER_MISC_CONTROL_STATUS_REG &= ~HARRIER_MCSR_BRDFL;

    }

/*******************************************************************************
*
* sysDramSize - returns the real top of local DRAM.
*
* RETURNS: The address of the top of DRAM.
*
*/

UINT32 sysDramSize (void)
    {
    UINT32        dramIndex;
    int           i;
    UINT32        localDram = 0;

    static UINT32 dramSize[] =
        {
        0x00000000,             /*  0:    0MB          */
        0x02000000,             /*  1:   32MB (4Mx16)  */
        0x04000000,             /*  2:   64MB (8Mx8)   */
        0x04000000,             /*  3:   64MB (8Mx16)  */
        0x08000000,             /*  4:  128MB (16Mx4)  */
        0x08000000,             /*  5:  128MB (16Mx8)  */
        0x08000000,             /*  6:  128MB (16Mx16) */
        0x10000000,             /*  7:  256MB (32Mx4)  */
        0x10000000,             /*  8:  256MB (32Mx8)  */
        0x10000000,             /*  9:  256MB (32Mx16) */
        0x20000000,             /* 10:  512MB (64Mx4)  */
        0x20000000,             /* 11:  512MB (64Mx8)  */
        0x20000000,             /* 12:  512MB (64Mx16) */
        0x40000000,             /* 13: 1024MB (128Mx4) */
        0x40000000,             /* 14: 1024MB (128Mx8) */
        0x80000000,             /* 15: 2048MB (256Mx4) */
        };

    static UINT32 *dramAttr[] =
        {
        (UINT32 *) HARRIER_REG_SDRAM_BLOCK_ADDRESSING_A,
        (UINT32 *) HARRIER_REG_SDRAM_BLOCK_ADDRESSING_B,
        (UINT32 *) HARRIER_REG_SDRAM_BLOCK_ADDRESSING_C,
        (UINT32 *) HARRIER_REG_SDRAM_BLOCK_ADDRESSING_D,
        (UINT32 *) HARRIER_REG_SDRAM_BLOCK_ADDRESSING_E,
        (UINT32 *) HARRIER_REG_SDRAM_BLOCK_ADDRESSING_F,
        (UINT32 *) HARRIER_REG_SDRAM_BLOCK_ADDRESSING_G,
        (UINT32 *) HARRIER_REG_SDRAM_BLOCK_ADDRESSING_H
        };

    /*
     * Since Harrier memory controller chip has already been set to
     * control all memory, just read and interpret its DRAM Attributes
     * Registers.
     */

    for (i = 0; i < NELEMENTS(dramAttr); i++)
        {
        if (*dramAttr[i] & (UINT32)HARRIER_SDBA_ENB)
            {
            dramIndex = (*dramAttr[i] & (UINT32)HARRIER_SDBA_SIZE_MASK) >> 16;
            localDram += dramSize [dramIndex];
            }
        }
    return (localDram);
    }

/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* Normally, the user specifies the amount of physical memory with the
* macro LOCAL_MEM_SIZE in config.h.  BSPs that support run-time
* memory sizing do so only if the macro LOCAL_MEM_AUTOSIZE is defined.
* If not defined, then LOCAL_MEM_SIZE is assumed to be, and must be, the
* true size of physical memory.
*
* NOTE: Do not adjust LOCAL_MEM_SIZE to reserve memory for application
* use.  See sysMemTop() for more information on reserving memory.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
    {
    UINT32 localDram = 0;

    if (sysPhysMemSize == NULL)
        {
        localDram = sysDramSize();

#ifdef LOCAL_MEM_AUTOSIZE
        sysPhysMemSize = (char *)localDram;
#else /* not LOCAL_MEM_AUTOSIZE, use defined constants. */
        sysPhysMemSize = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);
#endif /* LOCAL_MEM_AUTOSIZE */

        /* Adjust initial DRAM size to actual physical memory. */

        sysPhysMemDesc[SYS_DECS_DRAM_INDEX].len = 
            (ULONG)sysPhysMemSize - 
            (ULONG)sysPhysMemDesc[SYS_DECS_DRAM_INDEX].physicalAddr;

        }
    return sysPhysMemSize;
    }


/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/

char * sysMemTop (void)
    {
    return ((char *)(sysPhysMemTop () - USER_RESERVED_MEM));
    }


/******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor.  Normally, it is called
* only by reboot()--which services ^X--and by bus errors at interrupt level.
* However, in some circumstances, the user may wish to introduce a
* <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*/

STATUS sysToMonitor
    (
    int startType    /* parameter passed to ROM to tell it how to boot */
    )
    {
    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 8); /* Warm reboot (for Max) */

#if (defined(INCLUDE_CACHE_SUPPORT) && defined(INCLUDE_CACHE_L2))
    sysL2CacheDisable ();    /* Disable the L2 Cache */
#endif
#if defined(INCLUDE_CACHE_SUPPORT)
    cacheDisable (0);       /* Disable the Instruction Cache */
    cacheDisable (1);       /* Disable the Data Cache */
#endif
    sysSerialReset ();        /* reset serial devices */
    sysHarrierErrClr ();        /* clear Harrier error conditions */

    /* Clear the MSR */

    vxMsrSet (0);

    /* Turn on the board fail light */

    *(UINT32 *)HARRIER_MISC_CONTROL_STATUS_REG |= HARRIER_MCSR_BRDFL;

    WRS_ASM("sync");/* Ensure all data transfers and instructions completed */

    (*pRom) (startType);

    return (OK);    /* in case we ever continue from ROM monitor */
    }


/******************************************************************************
*
* sysHwInit2 - initialize additional system hardware
*
* This routine connects system interrupt vectors and configures any 
* required features not configured by sysHwInit().
*
* RETURNS: N/A
*/

void sysHwInit2 (void)
    {
    static BOOL configured = FALSE;

    /* Int connects for various devices */

    if (!configured)
        {

#ifdef INCLUDE_AUX_CLK
        sysAuxClkInit ();
        intConnect (INUM_TO_IVEC(TIMER0_INT_VEC), sysAuxClkInt, 0);
        intEnable (TIMER0_INT_LVL);
#endif /* INCLUDE_AUX_CLK */

#ifdef INCLUDE_HARRIER_DMA
	harrierDmaInit(0, (UINT32 *)HARRIER_XCSR_BASE);
#endif /* INCLUDE_HARRIER_DMA */

        /* initialize serial interrupts */

        sysSerialHwInit2();

        /* capture harrier window configuration */

        sysHarrierCapt ();

#ifdef INCLUDE_DEC2155X


        /*
         * capture the base address of the 2155x assigned during PCI
         * auto-configuration.
         */

        sysDec2155xAdrsGet ();

        /* if we are the PCI Host */

        if (sysMonarchMode)
            {

            /* Initialize Dec2155x interrupts. */

            sysDec2155xInit2 ();
            }

#endif

#ifdef INCLUDE_BPE

        /* enable processor data and address bus parity checking */

        sysConfigBpe ();

#endif

#ifdef INCLUDE_DPM

        /* enable dynamic power management */

        sysConfigDpm ();

#endif

#ifdef INCLUDE_CACHE_L2
#ifdef INCLUDE_CACHE_SUPPORT
#ifdef USER_L2_CACHE_ENABLE
        /* initialize the L2 cache */

        sysL2CacheInit();
#else   /* USER_L2_CACHE_ENABLE */
        sysL2CacheDisable();
#endif  /* USER_L2_CACHE_ENABLE */
#endif  /* INCLUDE_CACHE_SUPPORT */
#endif  /* INCLUDE_CACHE_L2 */

#if (CARRIER_TYPE == PRPMC_G)
	/* Initialize the gigabit chip */

	sys543PciInit ();
#endif /* (CARRIER_TYPE == PRPMC_G) */

#if     defined (INCLUDE_ALTIVEC)
       _func_altivecProbeRtn = sysAltivecProbe;
#endif  /* INCLUDE_ALTIVEC */

        /* report any errors detected before they could be reported. */

        reportBootromErrors ();

        configured = TRUE;
        }
    }


/******************************************************************************
*
* sysProcNumGet - get the processor number
*
* This routine returns the processor number for the CPU board, which is
* set with sysProcNumSet().
*
* RETURNS: The processor number for the CPU board.
*
* SEE ALSO: sysProcNumSet()
*/

int sysProcNumGet (void)
    {
    return (sysProcNum);
    }


/******************************************************************************
*
* sysProcNumSet - set the processor number
*
* This routine sets the processor number for the CPU board.  Processor numbers
* should be unique on a single backplane.  It also maps local resources onto
* the Compact PCI Bus.
*
* RETURNS: N/A
*
* SEE ALSO: sysProcNumGet()
*
*/

void sysProcNumSet
    (
    int     procNum            /* processor number */
    )
    {

    /* Init global variable */

    sysProcNum = procNum;

    }


/* miscellaneous support routines */

/******************************************************************************
*
* sysHarrierCapt - capture Harrier window information
*
* This routine captures the configuration of the Harrier PPC and PCI slave
* registers. This information is used to perform address translations from
* CPU to PCI addresses and vice versa.  
*
* RETURNS: N/A
*
* SEE ALSO: sysBusToLocalAdrs(), sysLocalToBusAdrs(), sysCpuToPciAdrs(),
* sysPciToCpuAdrs(), and sysHarrierTransAdrs().
*/

LOCAL void sysHarrierCapt (void)
    {
    UINT32 index;       /* window counter   */
    UINT32 attr;        /* window attribute */
    UINT32 range;       /* working variable */
    UINT32 size;	/* working variable */
    UINT32 base;	/* working variable */
    UINT32 offset;	/* working variable */
    UINT16 trans;        /* window translation value */
    HARRIER_OFFSETS_OUTBOUND * pHarrierOffO; /* ptr to harrier addr/offsets */
    HARRIER_OFFSETS_INBOUND * pHarrierOffI; /* ptr to harrier addr/offsets */
    HARRIER_WIN_STRUCT * pHarrierCpu; /* pointer to cpu windows */
    HARRIER_WIN_STRUCT * pHarrierPci; /* poiner to pci windows */

    /* Two arrays are initialized:
     * sysHarrierPciToCpuWin[] and sysHarrierCpuToPciWin[].  Each
     * array element is of type HARRIER_WIN_STRUCT which consists
     * of three fields representing type, base address and limit
     * address.  Harrier inbound translation windows are queried
     * first and an associated sysHarrierPciToCpuWin[] entry is
     * filled in.  With PCI-based type, base and limit entries.
     * For each sysHarrierCpuToPciWin[] entry made an  associated 
     * sysHarrierCpuToPciWin[] will be  made at the same array index
     * value but this one will contain the CPU-based view of this
     * window.  Thus, the two arrays will contain encoding for