📄 syslib.c
字号:
{ (void *) PRPMC800_XPORT3_ADDR, (void *) PRPMC800_XPORT3_ADDR, PRPMC800_XPORT3_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT },#endif /* INCLUDE_PRPMC800XT */ { /* MPIC Regs */ (void *) MPIC_BASE_ADRS, (void *) MPIC_BASE_ADRS, MPIC_REG_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_GUARDED, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT | VM_STATE_GUARDED }, /* Access to PCI ISA I/O space */ { (void *) ISA_MSTR_IO_LOCAL, (void *) ISA_MSTR_IO_LOCAL, ISA_MSTR_IO_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_GUARDED, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT | VM_STATE_GUARDED }, /* Access to PCI I/O space */ { (void *) PCI_MSTR_IO_LOCAL, (void *) PCI_MSTR_IO_LOCAL, PCI_MSTR_IO_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_GUARDED, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT | VM_STATE_GUARDED }, { (void *) HARRIER_XCSR_BASE, (void *) HARRIER_XCSR_BASE, HARRIER_XCSR_SIZE, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_GUARDED, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT | VM_STATE_GUARDED }, /* * Apart from DRAM, virtual = physical addresses. * * ROM (in fact, Bank 1 of the Flash memory used as ROM) * * ROM is normally marked as uncacheable by VxWorks. We leave it * like that for the time being, even though this has a severe impact * on execution speed from ROM. * * In order to use the Flash as NVRAM, the Flash area must be * writable. Strictly speaking, only the first and last pages need * be marked as writable. */#ifdef INCLUDE_TFFS { (void *) FLASH_BASE_ADRS, (void *) FLASH_BASE_ADRS, SIZE_32MB, VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE, VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT },#endif };int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);int sysBus = BUS_TYPE_PCI; /* system bus type */int sysCpu = CPU; /* CPU type */char * sysBootLine = BOOT_LINE_ADRS; /* address of boot line */char * sysExcMsg = EXC_MSG_ADRS; /* catastrophic message area */int sysProcNum; /* processor number of this CPU */int sysFlags; /* boot flags */char sysBootHost [BOOT_FIELD_LEN]; /* name of host from which we booted */char sysBootFile [BOOT_FIELD_LEN]; /* name of file from which we booted */UINT sysVectorIRQ0 = INT_VEC_IRQ0;/* vector for IRQ0 */HARRIER_WIN_STRUCT sysHarrierCpuToPciWin[HARRIER_WIN_CNT] = { { 0 } };HARRIER_WIN_STRUCT sysHarrierPciToCpuWin[HARRIER_WIN_CNT] = { { 0 } };int sysValidHarrierWindows = 0; /* number of valid entries */#ifdef INCLUDE_SM_COMMON MAILBOX_INFO sysMailbox = {FALSE, NULL, 0};#endifUINT32 sysProbeFault = 0; /* used by dsi exception trap handler */BOOL sysMonarchMode = FALSE; /* TRUE if Monarch */#ifdef INCLUDE_DEC2155X STATUS sysPciConfig21554InLong (int, int, int, int, UINT32 *); void prpmcDec2155xWaitConfig (void);#endif/* locals */#ifdef INCLUDE_SM_COMMON# if (SYS_SM_BUS_NUMBER == SYS_BACKPLANE_BUS_NUMBER) # define SM_PCI_CONFIG_IN_LONG sysPciConfig21554InLong# else# define SM_PCI_CONFIG_IN_LONG pciConfigInLong# endif#endifLOCAL char sysModelStr[80];LOCAL char sysWrongCpuMsg[] = WRONG_CPU_MSG;#ifdef SYS_SM_ANCHOR_POLL_LISTstatic SYS_SM_ANCHOR_POLLING_LIST sysSmAnchorPollList[] = { SYS_SM_ANCHOR_POLL_LIST { 0xffffffff, 0xffffffff, 0xffffffff } /* marks end of list */ };#endifLOCAL int sysSmUtilTasValue = 0; /* special soft tas value *//* forward declarations */void sysCpuCheck (void);void sysModeCheck (void);char * sysPhysMemTop (void);STATUS sysPciExtHarrierInit (int, int, int);UCHAR sysNvRead (ULONG);void sysNvWrite (ULONG,UCHAR);STATUS sysBusProbe (char *, int, int, char *);void sysUsDelay (UINT);void sysConfigBpe (void);void sysConfigDpm (void);void reportBootromErrors (void);BOOL sysSysconAsserted (void);void sysDelay (void);LOCAL void sysHarrierCapt (void);void sysPciInsertLong (UINT32, UINT32, UINT32);void sysPciInsertWord (UINT32, UINT16, UINT16);void sysPciInsertByte (UINT32, UINT8, UINT8);void sysPciOutLongConfirm (UINT32, UINT32);void sysPciOutWordConfirm (UINT32, UINT16);void sysPciOutByteConfirm (UINT32, UINT8);UCHAR inboundSizeCode (UINT32 dramSize);void prpmcSlaveWaitConfig (void);#ifdef INCLUDE_BPE void sysConfigBpe (void);#endif#ifdef INCLUDE_DPM void sysConfigDpm (void);#endif#ifdef INCLUDE_SM_COMMON int sysSmIntTypeCompute (void); int sysSmArg1Compute (int intType); int sysSmArg2Compute (int intType); int sysSmArg3Compute (void);# if (SM_OFF_BOARD == TRUE)# ifdef SYS_SM_ANCHOR_POLL_LIST LOCAL UINT sysSmAnchorCandidate ( UINT, UINT, UINT);# endif LOCAL STATUS sysSmAnchorFind ( int, char **); LOCAL char *sysSmAnchorPoll (void); char * sysSmAnchorAdrs (); /* Anchor address (dynamic) */# endif#endif/* externals */IMPORT UCHAR sysInByte (ULONG);IMPORT void sysOutByte (ULONG, UCHAR);IMPORT UINT16 sysIn16 (UINT16 *);IMPORT void sysOut16 (UINT16 *, UINT16);IMPORT UINT32 sysIn32 (UINT32 *);IMPORT void sysOut32 (UINT32 *, UINT32);IMPORT void sysPciRead32 (UINT32, UINT32 *);IMPORT void sysPciWrite32 (UINT32, UINT32);IMPORT void sysClkIntCIO (void);IMPORT STATUS sysMemProbeSup (int length, char * src, char * dest);IMPORT int sysProbeExc();IMPORT VOIDFUNCPTR smUtilTasClearRtn;IMPORT UINT32 sysTimeBaseLGet (void);IMPORT UINT sysHid1Get (void);IMPORT UCHAR sysProductStr[];IMPORT STATUS sysMotI2cRead (UCHAR, UCHAR, UCHAR *, UCHAR);IMPORT STATUS sysMotI2cWrite (UCHAR, UCHAR, UCHAR *, UCHAR);IMPORT UINT32 sysDramSize (void);IMPORT END_TBL_ENTRY endDevTbl[];IMPORT STATUS harrierDmaInit (UINT32, UINT32 *);/* BSP DRIVERS */#include "pci/pciConfigLib.c"#ifdef INCLUDE_NETWORK# include "./sysNet.c"# ifdef INCLUDE_END# include "./sysGei82543End.c"# include "./sysFei82557End.c"# include "./sysDec21x40End.c"# endif /* INCLUDE_END */#endif /* INCLUDE_NETWORK */#include "sysSerial.c"#include "mem/byteNvRam.c"#include "sysMotVpd.c"#include "timer/ppcDecTimer.c" /* PPC603 & 604 have on chip timers */#ifdef INCLUDE_SHOW_ROUTINES# include "pci/pciConfigShow.c" /* display of PCI config space */# include "sysMotVpdShow.c"# include "harrierSmcShow.c"#endif /* INCLUDE_SHOW_ROUTINES */#include "sysBusPci.c"#include "sysCache.c"#include "harrierPhb.c"#include "harrierMpic.h"#include "sysMpic.c"#ifdef INCLUDE_AUX_CLK# include "harrierAuxClk.c"#endif /* INCLUDE_AUX_CLK */#ifdef INCLUDE_HARRIER_DMA# include "harrierDma.c"#endif /* INCLUDE_HARRIER_DMA *//* M48t59 watchdog timer support. */ #ifdef INCLUDE_M48T559WDT# include "m48tWdt.c"#endif#ifdef INCLUDE_DEC2155X# include "dec2155xCpci.c"#endif#if (CARRIER_TYPE == PRPMC_G)# include "w83601Gpio.h"# include "w83782HwMon.h"#endif /* (CARRIER_TYPE == PRPMC_G) */#if defined (INCLUDE_ALTIVEC)/********************************************************************************* sysAltivecProbe - Check if the CPU has ALTIVEC unit.** This routine returns OK it the CPU has an ALTIVEC unit in it.* Presently it checks for 7400* RETURNS: OK - for 7400 Processor type* ERROR - otherwise.*/int sysAltivecProbe (void) { ULONG regVal; int altivecUnitPresent = ERROR; /* The CPU type is indicated in the Processor Version Register (PVR) */ regVal = CPU_TYPE; switch (regVal) { case CPU_TYPE_NITRO: case CPU_TYPE_MAX: altivecUnitPresent = OK; break; default: break; } /* switch */ return (altivecUnitPresent); }#endif /* INCLUDE_ALTIVEC *//******************************************************************************** sysModel - return the model name of the CPU board** This routine returns the model name of the CPU board. The returned string* depends on the board model and CPU version being used.** RETURNS: A pointer to the string.*/char * sysModel (void) { UINT cpu; char cpuStr[80]; /* Determine CPU type and build display string */ cpu = CPU_TYPE; switch (cpu) { case CPU_TYPE_604E: sprintf(cpuStr, "604e"); break; case CPU_TYPE_604R: sprintf(cpuStr, "604r"); break; case CPU_TYPE_603P: sprintf(cpuStr, "603p"); break; case CPU_TYPE_603E: sprintf(cpuStr, "603e"); break; case CPU_TYPE_750: sprintf(cpuStr, "750"); break; case CPU_TYPE_NITRO: sprintf(cpuStr, "7410"); break; case CPU_TYPE_MAX: if (CPU_REV < CPU_REV_NITRO) sprintf(cpuStr, "7400"); else sprintf(cpuStr, "7410"); break; default: sprintf (cpuStr, "60%d", cpu); break; } sprintf (sysModelStr, "Motorola %s- MPC %s", sysProductStr, cpuStr); return (sysModelStr); }/********************************************************************************* sysBspRev - return the BSP version and revision number** This routine returns a pointer to a BSP version and revision number, for* example, 1.1/0. BSP_REV is concatenated to BSP_VERSION and returned.** RETURNS: A pointer to the BSP version/revision string.*/char * sysBspRev (void) { return (BSP_VERSION BSP_REV); }/******************************************************************************** sysHwInit - initialize the system hardware** This routine initializes various features of the CPU board. It is called* by usrInit() in usrConfig.c. This routine sets up the control registers* and initializes various devices if they are present.** NOTE: This routine should not be called directly by the user application. It* cannot be used to initialize interrupt vectors.** RETURNS: N/A*/void sysHwInit (void) { /* Determine operating mode */ sysMonarchMode = sysSysconAsserted (); /* * If mmu tables are used, this is where we would dynamically * update the entry describing main memory, using sysPhysMemTop(). * We must call sysPhysMemTop () at sysHwInit() time to do * the memory autosizing if available. */ sysPhysMemTop (); /* Do the Harrier PCI-Host Bridge phase 1 init */ (void) sysHarrierPhbInit (); /* Initialize the VPD information */ (void) sysVpdInit (); /* Do the Harrier PCI-Host Bridge phase 2 init */ (void) sysHarrierPhbInit2 (); /* Validate CPU type */ sysCpuCheck(); /* Report the operating mode. */ sysModeCheck(); /* * If MPC7400 (Max): * Setup exception addresses. * Disable & invalidate if L2 enabled. */ if (CPU_TYPE == CPU_TYPE_MAX || CPU_TYPE == CPU_TYPE_NITRO) {#if defined(INCLUDE_CACHE_SUPPORT) && defined(INCLUDE_CACHE_L2) sysL2CacheDisable ();#endif } /* Initialize PCI driver library. */ if (pciConfigLibInit (PCI_MECHANISM_1, PCI_PRIMARY_CAR, PCI_PRIMARY_CDR, 0) != OK) sysToMonitor (BOOT_NO_AUTOBOOT); /* Initialize the extended portion of the Harrier's PCI Header. */ (void)sysHarrierInitPhbExt ();#ifdef INCLUDE_DEC2155X /* Configure the Dec 2155x setup registers if we are the PCI Host */ if (sysMonarchMode) sysDec2155xInit ();#endif if (sysMonarchMode)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -