sysfei82557end.c

vxworks的bsp开发包(基于POWERPC的PRPMC800)

    
    /*    logMsg ("Inside sys557Init %d\n", unit,0,0,0,0,0); */
    

    if (unit >= feiUnits)
	{
	logMsg ("Bmattr: %d\n", unit, 0,0,0,0,0);
        return (ERROR);
	}
 
    /* locate the 82557 based adapter. PRO100B and XXX */
 
    if (pReso->boardType == TYPE_PRO100B_PCI)   /* only setup once */
        {
        }
    else
        {
        /* read the configuration in EEPROM */
 
        for (ix = 0; ix < EE_SIZE; ix++)
            {
            value = sys557eepromRead (unit, ix);
            pReso->eeprom[ix] = value;
            sum += value;
            }
 
        if (sum != EE_CHECKSUM)
            printf ("i82557(%d): Invalid EEPROM checksum %#4.4x\n", unit, sum);
 
        /* DP83840 specific setup */
 
        if (((pReso->eeprom[6]>>8) & 0x3f) == DP83840)
            {
            int reg23 = sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, 23);
            sys557mdioWrite (unit, pReso->eeprom[6] & 0x1f, 23, reg23 | 0x0420);
            }
 
        /* perform a system self-test. */
 
        pReso->timeout     = 16000;             /* Timeout for set-test.  */
        pReso->pResults    = (int *) ((((int) pReso->str) + 0xf) & ~0xf);
        pReso->pResults[0] = 0;
        pReso->pResults[1] = -1;

        sysOutLong (PCI_MEMIO2LOCAL ((pReso->membaseCsr + SCB_PORT)),
                    (int)pReso->pResults | 1 | PCI_SLV_MEM_BUS );

        do  {
            sysUsDelay (1000);        /* delay for one IO READ cycle */
            } while ((pReso->pResults[1] == -1)  &&  (--pReso->timeout >= 0));

        pReso->boardType = TYPE_PRO100B_PCI;

        }
 
    /* initializes the board information structure */
 
    pBoard->vector        = pReso->irq + INT_NUM_IRQ0;
    pBoard->baseAddr      = pReso->membaseCsr;
    
    for (ix = 0, iy = 0; ix < 3; ix++)
        {
        pBoard->enetAddr[iy++] = pReso->eeprom[ix] & 0xff;
        pBoard->enetAddr[iy++] = (pReso->eeprom[ix] >> 8) & 0xff;
        }
 
    /*
    pBoard->intEnable     = sysLanIntEnable;
    pBoard->intDisable    = sysLanIntDisable;
    */
    pBoard->intEnable     = sys557IntEnable;
    pBoard->intDisable    = sys557IntDisable;
    pBoard->intAck        = sys557IntAck;
    pBoard->sysLocalToBus = sys557LocalToPciBusAdrs;
    pBoard->sysBusToLocal = sys557PciBusToLocalAdrs;

    /*        
    logMsg ("vector = 0x%x baseAddr = 0x%x\n", pBoard->vector, pBoard->baseAddr, 0,0,0,0);
    logMsg ("intEnable = 0x%x intAck = 0x%x\n", pBoard->intEnable, pBoard->intAck, 0,0,0,0);
    logMsg ("sysLocalToBus = 0x%x sysBusToLocal = 0x%x\n", pBoard->sysLocalToBus, pBoard->sysBusToLocal, 0,0,0,0);
    
    logMsg ("CPU PCI BAse Address 0x%x\n",PCI_SLV_MEM_BUS,0,0,0,0,0); 
    */
 
#ifdef FEI_10MB
    pBoard->phySpeed      = NULL;
    pBoard->phyDpx        = NULL;
#endif
 
    return (OK);
    }
 
/*******************************************************************************
*
* sys557IntAck - acknowledge an 82557 interrupt
*
* This routine performs any 82557 interrupt acknowledge that may be
* required.  This typically involves an operation to some interrupt
* control hardware.
*
* This routine gets called from the 82557 driver's interrupt handler.
*
* This routine assumes that the PCI configuration information has already
* been setup.
*
* RETURNS: OK, or ERROR if the interrupt could not be acknowledged.
*/
 
LOCAL STATUS sys557IntAck
    (
    int unit            /* unit number */
    )
    {
    FEI_RESOURCE *pReso = &feiResources [unit];
 
    switch (pReso->boardType)
        {
        case TYPE_PRO100B_PCI:          /* handle PRO100B LAN Adapter */
           /* no addition work necessary for the PRO100B */
            break;
 
        default:
            return (ERROR);
        }
 
    return (OK);
    }
 
 
/*******************************************************************************
*
* sys557eepromRead - read a word from the 82557 EEPROM
*
* RETURNS: the EEPROM data word read in.
*/
 
UINT16 sys557eepromRead
    (
    int unit,           /* unit number */
    int location        /* address of word to be read */
    )
    {
    UINT32 membase;
    UINT32 retval = 0;
    UINT32 dataval;
    volatile UINT32 dummy;
    int ix;

    membase = PCI_MEMIO2LOCAL (feiResources[unit].membaseCsr);

    /*    logMsg ("Emattr: 0x%x >> 0x%x\n", feiResources[unit].membaseCsr, membase, 0,0,0,0);
     */
    sysOutWord (membase + SCB_EEPROM, EE_CS);    /* enable EEPROM */
 
    /* write the READ opcode */
 
    for (ix = EE_CMD_BITS - 1; ix >= 0; ix--)
        {
        dataval = (EE_CMD_READ & (1 << ix)) ? EE_DI : 0;
 
        sysOutWord (membase + SCB_EEPROM, EE_CS | dataval);
 
        sysUsDelay (1000);    /* delay for one IO READ cycle */
 
        sysOutWord (membase + SCB_EEPROM, EE_CS | dataval | EE_SK);
 
        sysUsDelay (1000);    /* delay for one IO READ cycle */
        }
 
    /* write the location */
 
    for (ix = EE_ADDR_BITS - 1; ix >= 0; ix--)
        {
        dataval = (location & (1 << ix)) ? EE_DI : 0;
        sysOutWord (membase + SCB_EEPROM, EE_CS | dataval);
        sysUsDelay (1000);    /* delay for one IO READ cycle */
        sysOutWord (membase + SCB_EEPROM, EE_CS | dataval | EE_SK);
        sysUsDelay (1000);    /* delay for one IO READ cycle */
        sysOutWord (membase + SCB_EEPROM, EE_CS | dataval);
        sysUsDelay (1000);    /* delay for one IO READ cycle */
        dummy = sysInWord (membase + SCB_EEPROM);
        }
 
    if ((dummy & EE_DO) == 0)           /* dummy read */
        ;
 
    /* read the data */
 
    for (ix = EE_DATA_BITS - 1; ix >= 0; ix--)
        {
        sysOutWord (membase + SCB_EEPROM, EE_CS | EE_SK);
 
        sysUsDelay (1000);    /* delay for one IO READ cycle */
 
        retval = (retval << 1) |
                 ((sysInWord (membase + SCB_EEPROM) & EE_DO) ? 1 : 0);
 
        sysOutWord (membase + SCB_EEPROM, EE_CS);
 
        sysUsDelay (1000);    /* delay for one IO READ cycle */
        }
 
    sysOutWord (membase + SCB_EEPROM, 0x00);     /* disable EEPROM */
 
    return (retval);
    }
 
/*******************************************************************************
*
* sys557mdioRead - read MDIO
*
* RETURNS: read value
*/
 
LOCAL UINT16 sys557mdioRead
    (
    int unit,           /* unit number */
    int phyId,          /* PHY ID */
    int location        /* location to read */
    )
    {
    UINT32 membase;
    int timeout   = 64*4;       /* <64 usec. to complete, typ 27 ticks */
    int val;
    membase = PCI_MEMIO2LOCAL((feiResources[unit].membaseCsr));
     
    sysOutLong (membase + SCB_MDI, 0x08000000 | (location<<16) | (phyId<<21));
 
    do {
        sysUsDelay (1000);    /* delay for one IO READ cycle */
        val = sysInLong (membase + SCB_MDI);
        if (--timeout < 0)
            printf ("sys557mdioRead() timed out with val = %8.8x.\n", val);
        } while (! (val & 0x10000000));
 
    return (val & 0xffff);
    }
 
/*******************************************************************************
*
* sys557mdioWrite - write MDIO
*
* RETURNS: write value
*/
 
LOCAL UINT16 sys557mdioWrite
    (
    int unit,           /* unit number */
    int phyId,          /* PHY ID */
    int location,       /* location to write */
    int value           /* value to write */
    )
    {
    UINT32 membase = PCI_MEMIO2LOCAL((feiResources[unit].membaseCsr));
    int timeout   = 64*4;       /* <64 usec. to complete, typ 27 ticks */
    int val;
 
    sysOutLong (membase + SCB_MDI,
                0x04000000 | (location<<16) | (phyId<<21) | value);
    do {
        sysUsDelay (1000);    /* delay for one IO READ cycle */
        val = sysInLong (membase + SCB_MDI);
        if (--timeout < 0)
            printf ("sys557mdioWrite() timed out with val = %8.8x.\n", val);
        } while (! (val & 0x10000000));
 
    return (val & 0xffff);
    }
 
/*******************************************************************************
*
* sys557Show - shows 82557 configuration
*
* this routine shows (Intel Pro Express 100) configuration
*
* RETURNS: N/A
*/
 
void sys557Show
    (
    int unit            /* unit number */
    )
    {
    FEI_RESOURCE *pReso = &feiResources [unit];
    UINT32 membase        = PCI_MEMIO2LOCAL (pReso->membaseCsr);
    UCHAR etheraddr[6];
    int ix;
    int iy;
    if (unit >= feiUnits)
        {
        printf ("none\n");
        return;
        }
 
    for (ix = 0, iy = 0; ix < 3; ix++)
        {
        etheraddr[iy++] = pReso->eeprom[ix];
        etheraddr[iy++] = pReso->eeprom[ix] >> 8;
        }
 
    printf ("82557(%d): Intel EtherExpress Pro 10/100 at %#3x ", unit, membase);
 
    for (ix = 0; ix < 5; ix++)
        printf ("%2.2X:", etheraddr[ix]);
 
    printf ("%2.2X\n", etheraddr[ix]);
 
    printf ("CSR mem base address = 0x%x, Flash mem base address = 0x%x\n",
            pReso->membaseCsr, pReso->membaseFlash);
    printf ("PCI bus no. = 0x%x, device no. = 0x%x"
            ", function no. = 0x%x, IRQ = %d\n",
            pReso->pciBus, pReso->pciDevice, pReso->pciFunc, pReso->irq);
 
    if (pReso->eeprom[3] & 0x03)
        printf ("Receiver lock-up bug exists -- enabling work-around.\n");
 
    printf ("Board assembly %4.4x%2.2x-%3.3d, Physical connectors present:",
        pReso->eeprom[8], pReso->eeprom[9]>>8, pReso->eeprom[9] & 0xff);

    for (ix = 0; ix < 4; ix++)
        if (pReso->eeprom[5] & (1 << ix))
            printf (connectors [ix]);
 
    printf ("\nPrimary interface chip %s PHY #%d.\n",
        phys[(pReso->eeprom[6]>>8)&7], pReso->eeprom[6] & 0x1f);
    if (pReso->eeprom[7] & 0x0700)
        printf ("Secondary interface chip %s.\n",
                phys[(pReso->eeprom[7]>>8)&7]);
 

    /* ToDo: Read and set PHY registers through MDIO port. */
    for (ix = 0; ix < 2; ix++)
        printf ("MDIO register %d is %4.4x.\n",
                ix, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, ix));
   for (ix = 5; ix < 7; ix++)
        printf ("MDIO register %d is %4.4x.\n",
                ix, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, ix));
   printf ("MDIO register %d is %4.4x.\n",
            25, sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, 25));
 
    if (pReso->timeout < 0)
        {               /* Test optimized out. */
        printf ("Self test failed, status %8.8x:\n"
                " Failure to initialize the 82557.\n"
                " Verify that the card is a bus-master capable slot.\n",
               pReso->pResults[1]);
        }
    else
        {
        printf ("General self-test: %s.\n"
                " Serial sub-system self-test: %s.\n"
                " Internal registers self-test: %s.\n"
                " ROM checksum self-test: %s (%#8.8x).\n",
                pReso->pResults[1] & 0x1000 ? "failed" : "passed",
                pReso->pResults[1] & 0x0020 ? "failed" : "passed",
                pReso->pResults[1] & 0x0008 ? "failed" : "passed",
                pReso->pResults[1] & 0x0004 ? "failed" : "passed",
                pReso->pResults[0]);
        }
    }
 
/******************************************************************************
*
* sys557LocalToPciBusAdrs - convert a local address to a bus address
*
* This routine returns a PCIbus address for the LOCAL bus address.
*
*/
 
LOCAL UINT32 sys557LocalToPciBusAdrs
    (
    int unit,
    UINT32      adrs    /* Local Address */
    )
    {
    if(adrs>PCI2DRAM_MAP_SIZE) logMsg("Local To Pci Address is 0x%x\n",(int)adrs,0,0,0,0,0);    
    return (LOCAL2PCI_MEMIO(adrs));
    }
 
 
/******************************************************************************
*
* sys557PciBusToLocalAdrs - convert a bus address to a local address
*
* This routine returns a local address that is used to access the PCIbus.
* The bus address that is passed into this routine is the PCIbus address
* as it would be seen on the local bus.
*
*/
 
LOCAL UINT32 sys557PciBusToLocalAdrs
    (
    int unit,
    UINT32      adrs    /* PCI Address */
    )
    {
    volatile int localAdrs;
    localAdrs = PCI_MEMIO2LOCAL(adrs);
    if(localAdrs>PCI2DRAM_MAP_SIZE) logMsg("Pci Bus To Local Address is 0x%x\n",(int)localAdrs,0,0,0,0,0);
    return (localAdrs);
    }


/*******************************************************************************
*
* sys557IntEnable - enable 82557 interrupts
*
* This routine enables 82557 interrupts.  This may involve operations on
* interrupt control hardware.
*
* The 82557 driver calls this routine throughout normal operation to terminate
* critical sections of code.
*
* This routine assumes that the PCI configuration information has already
* been setup.
*
* RETURNS: OK, or ERROR if interrupts could not be enabled.
*/

LOCAL STATUS sys557IntEnable
    (
    int unit            /* unit number */
    )
    {
    FEI_RESOURCE *pReso = &feiResources [unit];

    return (intEnable (pReso->irq));
    }

/*******************************************************************************
*
* sys557IntDisable - disable 82557 interrupts
*
* This routine disables 82557 interrupts.  This may involve operations on
* interrupt control hardware.
*
* The 82557 driver calls this routine throughout normal operation to enter
* critical sections of code.
*
* This routine assumes that the PCI configuration information has already
* been setup.
*
* RETURNS: OK, or ERROR if interrupts could not be disabled.
*/

LOCAL STATUS sys557IntDisable
    (
    int unit            /* unit number */
    )
    {
    FEI_RESOURCE *pReso = &feiResources [unit];

    return (intDisable (pReso->irq));
    }

#endif /* defined (INCLUDE_FEI_END) && defined (INCLUDE_NETWORK) */