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📄 sysgei82543end.c

📁 vxworks的bsp开发包(基于POWERPC的PRPMC800)
💻 C
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    UINT16 phyId1;          /* phy Id 1 */    UINT16 phyId2;          /* phy ID 2 */    UINT32 retVal;          /* return value */    UINT32 phyOui = 0;      /* PHY's manufacture ID */    UINT32 phyMode;         /* PHY mode number */    /* Intel Pro1000T adaptor uses Alaska transceiver */    /* read device ID to check Alaska chip available */    MII_READ (phyAddr, MII_PHY_ID1_REG, &phyId1, retVal);        MII_READ (phyAddr, MII_PHY_ID2_REG, &phyId2, retVal);           phyOui =  phyId1 << 6 | phyId2 >> 10;    phyMode = (phyId2 & MII_ID2_MODE_MASK) >> 4;    if (phyOui == MARVELL_OUI_ID && (phyMode == MARVELL_ALASKA_88E1000 ||                                      phyMode == MARVELL_ALASKA_88E1000S))        {         /* This is actually a Marvell Alaska 1000T transceiver */         /* disable PHY's interrupt */                  MII_READ (phyAddr, ALASKA_INT_ENABLE_REG, &regVal, retVal);         regVal = 0;         MII_WRITE (phyAddr, ALASKA_INT_ENABLE_REG, regVal, retVal);         /* CRS assert on transmit */         MII_READ (phyAddr, ALASKA_PHY_SPEC_CTRL_REG, &regVal, retVal);         regVal |= ALASKA_PSCR_ASSERT_CRS_ON_TX;         MII_WRITE (phyAddr, ALASKA_PHY_SPEC_CTRL_REG, regVal, retVal);        /* set the clock rate when operate in 1000T mode */         MII_READ (phyAddr, ALASKA_EXT_PHY_SPEC_CTRL_REG, &regVal, retVal);         regVal |= ALASKA_EPSCR_TX_CLK_25;         MII_WRITE (phyAddr, ALASKA_EXT_PHY_SPEC_CTRL_REG, regVal, retVal);        }     /* other PHYS .... */     return;     }/******************************************************************************* sys543IntAck - acknowledge an 82543 interrupt** This routine performs any 82543 interrupt acknowledge that may be* required.  This typically involves an operation to some interrupt* control hardware.** This routine gets called from the 82543 driver's interrupt handler.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if the interrupt could not be acknowledged.*/LOCAL STATUS sys543IntAck    (    int    unit        /* unit number */    )    {    GEI_RESOURCE *pReso = &geiResources [unit];    switch (pReso->boardType)    {    case TYPE_PRO1000F_PCI:        /* handle PRO1000F/T LAN Adapter */    case TYPE_PRO1000T_PCI:        /* no addition work necessary for the PRO1000F/T */        break;    default:        return (ERROR);    }    return (OK);    }/******************************************************************************** sys543LocalToPciBusAdrs - convert a local address to a bus address** This routine returns a PCIbus address for the LOCAL bus address.**/ LOCAL UINT32 sys543LocalToPciBusAdrs    (    int unit,    UINT32      adrs    /* Local Address */    )    {    if(adrs>localDramSize)          return (CPCI2PCI(adrs));    if(adrs>PCI2DRAM_MAP_SIZE)       logMsg("ERROR:sys543LocalToPciBusAdrs: Local Address 0x%x is outside of PCI DRAM WINDOW\n",(int)adrs,0,0,0,0,0);    return (LOCAL2PCI_MEMIO(adrs));    }  /******************************************************************************** sys543PciBusToLocalAdrs - convert a bus address to a local address** This routine returns a local address that is used to access the PCIbus.* The bus address that is passed into this routine is the PCIbus address* as it would be seen on the local bus.**/ LOCAL UINT32 sys543PciBusToLocalAdrs    (    int unit,    UINT32      adrs    /* PCI Address */    )    {    volatile UINT32 localAdrs;    if((adrs<PCI_SLV_MEM_BUS)||(adrs>(PCI_SLV_MEM_BUS+PCI2DRAM_MAP_SIZE)))      return(PCI2CPCI(adrs));    localAdrs = PCI2LOCAL_MEMIO(adrs);    if(localAdrs>PCI2DRAM_MAP_SIZE)       logMsg("ERROR:sys543PciBusToLocalAdrs: Address 0x%x is outside of PCI DRAM WINDOW\n",(int)localAdrs,0,0,0,0,0);    return (localAdrs);    }/******************************************************************************* sys543IntEnable - enable 82543 interrupts** This routine enables 82543 interrupts.  This may involve operations on* interrupt control hardware.** The 82543 driver calls this routine throughout normal operation to terminate* critical sections of code.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if interrupts could not be enabled.*/LOCAL STATUS sys543IntEnable    (    int    unit        /* local unit number */    )    {    return (OK);    }/******************************************************************************* sys543IntDisable - disable 82543 interrupts** This routine disables 82543 interrupts.  This may involve operations on* interrupt control hardware.** The 82543 driver calls this routine throughout normal operation to enter* critical sections of code.** This routine assumes that the PCI configuration information has already* been setup.** RETURNS: OK, or ERROR if interrupts could not be disabled.*/LOCAL STATUS sys543IntDisable    (    int    unit        /* local unit number */    )    {    return (OK);    }/******************************************************************************* sys543Show - shows 82543 configuration ** This routine shows (Intel Pro 1000F/T) adapters configuration ** RETURNS: N/A*/void sys543Show    (    int    unit        /* unit number */    )    {    int ix;    GEI_RESOURCE *pReso = &geiResources [unit];    if (unit >= geiUnits)        {        printf ("invalid unit number: %d\n", unit);        return;        }     if (pReso->boardType == PRO1000F_BOARD)        printf ("********* Intel PRO1000 F Adapter ***********\n");    else if (pReso->boardType == PRO1000T_BOARD)        printf ("********* Intel PRO1000 T Adapter ***********\n");          else        printf ("********* UNKNOWN Adaptor ************ \n");     printf ("  CSR PCI Membase address = 0x%x\n", pReso->memBaseLow);     printf ("  Flash PCI Membase address = 0x%x\n", pReso->flashBase);    printf ("  PCI bus no.= 0x%x, device no.= 0x%x, function no.= 0x%x\n",              pReso->pciBus, pReso->pciDevice, pReso->pciFunc);    printf ("  IRQ = %d\n", pReso->irq);      if (pReso->iniStatus == ERROR)        return;    printf ("  Adapter Ethernet Address");    for (ix = 0; ix < 6; ix ++)        printf (":%2.2X", (UINT32)pReso->enetAddr[ix]);    printf ("\n");    printf ("  EEPROM Initialization Control Word 1 = 0x%4.4X\n",             pReso->eeprom_icw1);    printf ("  EEPROM Initialization Control Word 2 = 0x%4.4X\n",             pReso->eeprom_icw2);    printf ("*********************************************\n");    return;    }/*************************************************************************** sys543eepromWriteWord - Write a word to EEPROM** RETURNS: value in WORD size*/UINT16 sys543eepromWriteWord    (    int          unit,		/* device unit to be accessed. */    UINT32       index,		/* index in EEPROM address range. */    UINT16       value		/* value to write. */    )    {    UINT32 tmp;    UINT32 timeout = 10000;    if (index >= EEPROM_WORD_SIZE)        {        printf ("Invalid index:%d to EEPROM\n", index);        return 0;        }    tmp = GEI_SYS_READ_REG(unit, INTEL_82543GC_EECD);    /* Enable writing */    GEI_SYS_WRITE_REG(unit, INTEL_82543GC_EECD, EECD_CS_BIT);    /* wait 1000ns */    sysUsDelay(1);    /* write the write enable opcode out */    sys543eepromWriteBits (unit, EEPROM_WRITE_EN_OPCODE, EEPROM_ENABLE_BITS);    /* clean up access to EEPROM and disable chip select */          tmp &= ~(EECD_DI_BIT | EECD_DO_BIT | EECD_CS_BIT);    GEI_SYS_WRITE_REG(unit, INTEL_82543GC_EECD, tmp);    /* wait 1000ns */    sysUsDelay(1);    /* write the data out, enable the chip select */    GEI_SYS_WRITE_REG(unit, INTEL_82543GC_EECD, EECD_CS_BIT);    /* wait 1000ns */    sysUsDelay(1);    /* write the opcode out */    sys543eepromWriteBits (unit, EEPROM_WRITE_OPCODE, EEPROM_CMD_BITS);    /* write the index out */    sys543eepromWriteBits (unit, index, EEPROM_INDEX_BITS);        /* write the data */    sys543eepromWriteBits (unit, value, EEPROM_DATA_BITS);    /* clean up access to EEPROM and disable chip select */          tmp &= ~(EECD_DI_BIT | EECD_DO_BIT | EECD_CS_BIT);    GEI_SYS_WRITE_REG(unit, INTEL_82543GC_EECD, tmp);    /* wait 1000ns */    sysUsDelay(1);    /* Complete write cycle */    GEI_SYS_WRITE_REG(unit, INTEL_82543GC_EECD, EECD_CS_BIT);    /* wait 10ms for write cycle */    sysUsDelay(10000);    while(!((tmp = GEI_SYS_READ_REG(unit, INTEL_82543GC_EECD)) & EECD_DO_BIT)          && (timeout-- > 0))	sysUsDelay(1);    /* clean up access to EEPROM and disable chip select */          tmp &= ~(EECD_DI_BIT | EECD_DO_BIT | EECD_CS_BIT);    GEI_SYS_WRITE_REG(unit, INTEL_82543GC_EECD, tmp);    /* Disable writing */    GEI_SYS_WRITE_REG(unit, INTEL_82543GC_EECD, EECD_CS_BIT);    /* wait 1000ns */    sysUsDelay(1);    /* write the write enable opcode out */    sys543eepromWriteBits (unit, EEPROM_WRITE_DIS_OPCODE, EEPROM_ENABLE_BITS);    /* clean up access to EEPROM and disable chip select */          tmp &= ~(EECD_DI_BIT | EECD_DO_BIT | EECD_CS_BIT);    GEI_SYS_WRITE_REG(unit, INTEL_82543GC_EECD, tmp);    return (OK);    }/*************************************************************************** sys543EepromDump - Dump contents of EEPROM** This routine dumps the 82543 EEPROM** RETURNS: OK or ERROR*/STATUS sys543EepromDump    (    int unit,			/* device unit to be accessed. */    char *adr			/* address of buffer to store data. */    )    {    UINT32 ix;    UINT32 count = 0;    UINT32 checkSum = 0;    UINT16 val;    printf("sys543EepromDump:\n\r");    for (ix = 0; ix < EEPROM_WORD_SIZE; ix++)         {        /* get word i from EEPROM */        val = sys543eepromReadWord (unit, (UINT16)(EEPROM_IA_ADDRESS + ix));        checkSum += val;        adr [count++] = (UCHAR)val;        adr [count++] = (UCHAR) (val >> 8);        }    for (ix = 0; ix < EEPROM_WORD_SIZE * 2; ix++)         {	printf("%x: 0x%x\n\r", ix, adr[ix]);        }    printf("sys543EepromDump: checksum: 0x%x\n\r", checkSum);    return (OK);    }/*************************************************************************** sys1000NsDelay - Call sysUsDelay with a value of 1000 (ns).** This routine delays for 1000 ns.** RETURNS: NA*/void   sys1000NsDelay (void)    {    sysUsDelay (1);    return;    }#endif /*defined(INCLUDE_GEI_END) && (INCLUDE_NETWORK) &&  (INCLUDE_END)) */

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