tmbtnanddrv_internal.h

pnx8950 nand flash 驱动

/*
                           Boot (tmbtNandDrv)
                         -----------------------------


   Copyright (c) 2004 Koninklijke Philips Electronics N.V. All rights reserved

   This source code and any compilation or derivative thereof is the
   proprietary information of Koninklijke Philips Electronics N.V.
   and is confidential in nature.
   Under no circumstances is this software to be exposed to or placed
   under an Open Source License of any type without the expressed
   written permission of Koninklijke Philips Electronics N.V.

   COMPANY CONFIDENTIAL

Filename  :     tmbtNandDrv_internal.h


Rev Date       Author      Comments
--------------------------------------------------------------------------------
001 23/11/2004 A Charrett  Original
002 25/05/2005 A Charrett  Update with new macro names.
003 24/10/2005 burningh    Adding support for larger devices (4 addr cycles)
004 02/02/2006 batelaan    Ensured MMIO is declared volatile
                           (rather than using compiler -fvolatile option).
*/

/** Description
    Internal header file for NAND flash driver
*/
#ifndef _TMBTNANDDRV_INTERNAL_H
#define _TMBTNANDDRV_INTERNAL_H
/*******************
* INCLUDE FILES    *
********************/

#include "tmNxCompId.h"

/*******************
* EXPORTED MACROS  *
********************/
#define VIRT_TO_PHYS(__addr)     ((UInt32)(__addr) & 0x1FFFFFFF)
#define PHYS_TO_UNCACHED(__addr) ((UInt32)(__addr) | K1BASE)
#define PHYS_TO_CACHED(__addr)   ((UInt32)(__addr) | K0BASE)

#define NAND_CMD_READ_ID        0x90
#define NAND_CMD_READ_MAIN      0x00
#define NAND_CMD_READ_SPARE     0x50
#define NAND_CMD_WRITE_A        0x80
#define NAND_CMD_WRITE_B        0x10
#define NAND_CMD_ERASE_A        0x60
#define NAND_CMD_ERASE_B        0xD0
#define NAND_CMD_READ_STATUS    0x70

#define XIO_REG(__offset) ((gptmbtNandDrvXioBase[__offset / 4]))

#define NAND_CMD_WITH_DATA(_numCmds, _numAddrs, _64mb, _cmdA, _cmdB) \
    XIO_REG(MMIO_NAND_CTRL) = INC_DATA_M | (_numCmds << NUM_OF_COMMANDS) | (_numAddrs << NUM_OF_ADDRESS) \
                              | (_64mb << EN_64MB) \
                              | (_cmdB << COMMAND_B)| (_cmdA << COMMAND_A);

#define NAND_CMD(_numCmds, _numAddrs, _64mb, _cmdA, _cmdB) \
    XIO_REG(MMIO_NAND_CTRL) = (_numCmds << NUM_OF_COMMANDS) | (_numAddrs << NUM_OF_ADDRESS) \
                              | (_64mb << EN_64MB) \
                              | (_cmdB << COMMAND_B)| (_cmdA << COMMAND_A);

/*********************
* EXPORTED TYPEDEFS  *
**********************/

/*******************
* EXPORTED DATA    *
********************/
extern volatile UInt32 * gptmbtNandDrvXioBase;
extern volatile UInt32 * gptmbtNandDrvNandBase;

extern UInt32 gtmbtNandDrvAddressCyclesRW;
extern UInt32 gtmbtNandDrvAddressCyclesBE;
extern UInt32 gtmbtNandDrv64MegDevice;

/********************************
* EXPORTED FUNCTIONS PROTOTYPES *
*********************************/
/******************************************************************************/
/** +++ tmbtNandDrvDMA

    Function to transfer data to/from NAND Flash using the DMA engine.

    +++ Parameter         Flow    Description
        internal          IN      Internal Memory Address (RAM)
        external          IN      External Memory Address (Flash)
        length            IN      Length of data to transfer
        cmd               IN      DMA engine command, (read/write)

    +++ Return value
    TM_OK on success
    OR
    TM_BT_ERR_NAND_DRV_DMA_TIMEOUT if the DMA took too long

    +++ Additional Notes

*/
/******************************************************************************/
tmErrorCode_t tmbtNandDrvDMA(UInt32 internal, UInt32 external, UInt32 length, UInt cmd);
#endif